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image-RECONSTRUCTION USING THE TRANSPUTER

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1986年第3期133卷 139-144页

作者： KINGSWOOD, N DAGLESS, EL BELCHAMBER, RM BETTERIDGE, D LILLEY, T ROBERTS, JDM BP RES CTR SUNBURY THAMES TW16 7LNMIDDXENGLAND

image reconstruction by computer tomography provides a nonintrusive method of imaging the internal structure of objects. From measurements of radiation (e.g. x-rays or gamma rays) passed through an object, it is possible to reconstruct the internal structure. There is great interest in the potential of such methods in industrial applications but a number of problems need to be solved before these opportunities can be realised. The reconstruction process is computationally intensive and requires imaginative parallel processing algorithms to attain ‘real-time’ performance. The work carried out has involved evaluating how these algorithms can be used in multiprocessor concurrent architectures to obtain rapid image reconstruction. A suitable computer architecture has been simulated in occam. This allows execution on a collection of transputers.

关键词： computer tomography internal structure imaging internal structure multiprocessor concurrent architectures computerised pattern recognition computer architecture computerised tomography Radiation and radioactivity applications in biomedicine Biology and medical computing transputer rapid image reconstruction industrial applications parallel processing algorithms Pattern recognition and computer vision equipment image reconstruction nonintrusive method

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A versatile image processor for digital diagnostic imaging and its application in computed radiography

A versatile image processor for digital diagnostic imaging a...

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Application of Optical Instrumentation in Medicine xIV and Picture Archiving and Communication systems (PACS IV) for Medical applications 1986

作者： Blume, H. Alexandria, R. Applegate, R. Giordano, T. Kamiya, K. Kresina, R. Philips Medical Systems Inc. 710 Bridgeport Ave. SheltonCT06434 United States MSB Systems Inc. NorwalkCT United States

In a digital diagnostic imaging department, the majority of operations for handling and processing of images can be grouped into a small set of basic operations, such as image data buffering and storage, image processing and analysis, image display, image data transmission and image data compression. These operations occur in almost all nodes of the diagnostic imaging communications network of the department. An image processor architecture was developed in which each of these functions has been mapped into hardware and software modules. The modular approach has advantages in terms of economics, service, expandability and up-gradeability. The architectural design is based on the principles of hierarchical functionality, distributed and parallel processing and aims at real time response. parallel processing and real time response is facilitated in part by a dual bus system: a VME control bus and a high speed image data bus, consisting of 8 independent parallel 16-bit busses, capable of handling combined up to 144 MBytes/sec. The presented image processor is versatile enough to meet the video rate processing needs of digital subtraction angiography, the large pixel matrix processing requirements of static projection radiography, or the broad range of manipulation and display needs of a multimodality diagnostic work station. Several hardware modules are described in detail. For illustrating the capabilities of the image processor, processed 2000 x 2000 pixel computed radiographs are shown and estimated computation times for executing the processing operations are presented. © 1986 SPIE. All rights reserved.

关键词： Pixels

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Hmesh: A vlsi architecture for parallel processing 2nd

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2nd Conference on algorithms and Hardware for parallel processing, CONPAR 1986

作者： Raghavendra, C.S. Electrical Engineering-Systems Department University of Southern California Los AngelesCA90089-0781 United States

ISBN: (纸本)9783540168119

Enhancements to array processors in the form of broadcast buses have been proposed for improving the speeds of algorithms in linear algebra, image processing and computational geometry. In this paper, we consider certain practical issues in such arrays which include fewer processors connected to the broadcast buses and finite time, namely log N time for broadcasting data to N processors. We propose a modified broadcast bus VLSI architecture which consists of a √N × √N mesh connected structure and a hierarchy of broadcast buses in each row and in each column such that every bus has k PE's. That is, in any row or column, in the first level there are √N/k buses with groups of k PE's connected to each bus. One PE from each of this group is connected to second level of buses in a similar manner. This is recursively done until there are only k PE's left which are connected by a broadcast bus. With this architecture, maximum, minimum, or sum of N values can be found in O(log N), median row of a binary picture in O(log N), shortest distance between two points in O(log N). This architecture is well suited for parallel processing of applications in Linear Algebra, image processing, Computational Geometry and Numerical Computations. These restricted connections to buses reduces the I/O ports significantly, and therefore, is more suitable for VLSI implementation. © 1986, Springer-Verlag.

关键词： Computational geometry

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A distributed image processing architecture based on a high-speed local area network

A distributed image processing architecture based on a high-...

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Application of Optical Instrumentation in Medicine xIV and Picture Archiving and Communication systems (PACS IV) for Medical applications 1986

作者： Alexander, Thomas Fahy, James B. Kim, Yongmin Department of Electrical Engineering University of Washington SeattleWA98195 United States

This paper seeks to describe work in progress towards the development of a very-highspeed (80-200 Mbits/sec) Local Area Network (LAN) for the support of a distributed image processing system. The current practice in most medical, scientific and industrial image acquisition and processing equipment is to use complete, stand-alone image processors dedicated to a particular application. Such a system is not very expandable or flexible and is not cost-effective. A better approach would be to put together a distributed system from individual subsystems (digitizers, preprocessors, array processors, disks, highresolution displays, etc.) and to link them all together with a high-capacity LAN, capable of the transfer of complete images at near-real-time rates. This would result in a flexible system, reconfigurable and upgradable by simply adding more powerful devices to the existing installation, and also ensure a standard, unified interface between different components. Some possible architectures for the network are discussed. Other factors affecting the design are also considered, based on typical medical imaging systems and needs. A parallel is drawn between the proposed system and the Digital imaging Network for the Picture Archiving and Communications System (DIN/PACS) currently under development. © 1986 SPIE. All rights reserved.

关键词： Local area networks

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Architecture for an image filing and indexing system

Architecture for an image filing and indexing system

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Application of Optical Instrumentation in Medicine xIV and Picture Archiving and Communication systems (PACS IV) for Medical applications 1986

作者： Hack, Stanley N. Paoni, Robert A. Robeson, Glenn H. Albany Medical College Department of Radiology AlbanyNY12208 United States Rensselaer Polytechnic Institute Department of Electrical Computer and Systems Engineering TroyNY12181 United States

We are developing an in-house Picture Archiving and Communication System (PACS) targeted to the centralized storage of images acquired from our computer-assisted imaging modalities and to the display of these images on multi-modality viewing stations. The central image database is distributed between two system modules with image processing capabilities located at the viewing stations. The first module of the image database is an image filing subsystem used for the storage and retrieval of complete image files. In our initial work, this module consists of a Data General MV/6000 computer system with 1.16 Gbytes of on-line disk storage. However, more efficient dedicated filing systems may be substituted for this general purpose computer in future revisions. The second module is an image file indexing subsystem which has been implemented on a DEC PDP-11/44 computer and is tightly integrated with our MARS ii (ADAC Laboratories) Radiology Information System. These two image database modules communicate via low-speed, serial communications lines. This report focuses on our developmental work on the image file indexing subsystem and its communications protocol with the image filing subsystem. The image file indexing subsystem automatically inserts image file locators for studies referenced by patient when an image is transmitted from the acquisition device (eg, CT) to the image filing subsystem. It also locates image files at the request of a viewing station user based on patient name, physician name, or study type for either read or unread studies. Other capabilities include cross-referencing patient attributes with the MARS ii system, deleting studies based on predefined criteria, storing requests for hard copy, storing user selected image processing attributes for individual images, flagging the archival status of an image, and complete managerial functions. This centralized image filing and indexing system comprises what will become the central element of our PACS. © 1

关键词： Computerized tomography

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A new architecture for real-time image processing

A new architecture for real-time image processing

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Architectures and algorithms for Digital image processing ii 1985

作者： Reader, Cliff Searing, S. Skubic, J. Vasquez, M. Weiner, L. Bose, G. International Imaging Systems 1500 Buckeye Drive MilpitasCA95035-7484 United States

The architecture is based upon a general, flexible core together with modular functional subunits. Configurations can address a wide range of applications and budgets. At one extreme we can configure a system to support a single user who roams at a real-time speed across an 8kx8k pixel image, performing real-time interactive warping and large kernel convolution on a lkxlk displayed image. At the other extreme, eight users can be working at dedicated workstations performing simple functions continuously, and occasionally performing a warp or convolution. Alternatively, a configuration with no display at all can be dedicated at a receiving station to registering images to latitude/longitude coordinate space, and correcting for radiometric nonlinearity in the sensor. We hope this will be a very utilitarian machine. © 1985 SPIE. All rights reserved.

关键词： Convolution

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A high speed recirculating neighborhood processing architecture

A high speed recirculating neighborhood processing architect...

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Architectures and algorithms for Digital image processing ii 1985

作者： Lougheed, Robert M. Intelligent Machine Technology Department Environmental Research Institute of Michigan P. O. Box 8618 Ann ArborMI48107 United States

The Environmental Research Institute of Michigan (ERIM) has developed the fourth generation of its cellular image processing systems, known as Cytocomputers®. These systems have been developed over the past nine years, primarily for image analysis and machine vision. Other applications have been demonstrated in image enhancement, computer aided design, and signal processing. The new system utilizes the well-proven and mathematically supported neighborhood processing stages with modules for image storage, multiple-image combinations and high-speed image transfer. These modules support the cellular processor stages in an open, extendable architecture which allows enhancement through the addition of modules optimized for particular transformations. This paper first discusses the special requirements of machine vision and image analysis systems and the types of operations required. Next, an overview of the alternative architectures for image processors is presented, along with a discussion of the tradeoffs and criteria which must be weighed in system design. Finally, the new system is described and examples of its operation are discussed. © 1985 SPIE. All rights reserved.

关键词： image enhancement

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Modular real time architectures for image understanding applications 2

Modular real time architectures for image understanding appl...

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Architectures and algorithms for Digital image processing ii 1985

作者： Wehner, William W. Signal and Image Processing Group Systems and Research Center 2600 Ridgway Parkway N.E. MN17-2306 MinneapolisMN55413 United States

Diverse image understanding (IU) system applications and attendant reduced life cycle cost requirements call for real time system architectures which are increasingly flexible, maintainable, reprogrammable, and upgradable. The requirements for algorithm mapping to architecture are sufficiently complex to require automated functional analysis tools. Algorithm complexity dictates higher order language (HOL) system programmability for acceptable software development cycles. Architecture complexity requires automated architecture simulation/emulation support for acceptable hardware development cycles. Honeywell, through external contracts and IR&D, is pursuing the definition and development of real time IU architectures (and algorithms) which cost-effectively support diverse applications including tactical targeting and reconnaissance, scene analysis, robot vision, and autonomous navigation. We are addressing the systems requirements of these applications with designs which are modular, expandable, and software configurable. Our presentation will overview the IU applications we are pursuing, our architectural approach to meeting system real time throughput requirements, and our underlying design methodology for architecture development. © 1985 SPIE. All rights reserved.

关键词： Real time systems

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System design for local neighborhood processing

System design for local neighborhood processing

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Architectures and algorithms for Digital image processing ii 1985

作者： Leonard, Patrick F. Mudge, Trevor N. Synthetic Vision Systems Inc. 3744 Plaza Drive Ann ArborMI48104 United States Electrical Engineering and Computer Science Department University of Michigan Ann ArborMI48109 United States

A class of processors which perform local neighborhood or cellular operations has well-documented applications in image processing. The architectural feature which unites these processors is their use of special-purpose hardware to compute image transformations based both on the values and on the spatial relationship of pixels in the input image. Typical operations include 3×3 convolution and mathematical morphology. processing elements which compute cellular operations have been incorporated in a variety of system architectures. These range from single-processor, recirculating buffer systems to systems which have thousands of processors in a four-way interconnected mesh. Another feature which unites these processors is that they operate on images in the iconic domain. A new class of non-iconic processor is introduced here which uses image encoding schemes to reduce the number of operations required for certain classes of operations by between one and two orders of magnitude. © 1985 SPIE. All rights reserved.

关键词： Mathematical morphology

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A study of the discrete Hartley transform for image compression applications

A study of the discrete Hartley transform for image compress...

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Architectures and algorithms for Digital image processing ii 1985

作者： Tzou, Kou-Hu Hsing, To R. GTE Laboratories Incorporated WalthamMA02254 United States Telco Systems Optics Corporation NorwoodMA02062 United States

The discrete Hartley transform (DHT) and its fast algorithm were introduced recently. One of the advantages of the DHT is that the forward and inverse transforms are of the same form except for a normalization constant. Therefore, the forward and the inverse transform can be implemented by the same subroutine or hardware when the normalization constant is properly taken care of. In this paper, the applications of the DHT to image compression are studied. The distribution of the DHT coefficients is tested using the Kolmogorov-Smirnov goodness-of-fit test. The compression efficiency of DHT coding is found to be about the same as discrete Fourier transform (DFT) coding. The DHT coding system incorporated with a human visual system model is also studied and this system offers about the same subjective image quality as a straightforward DCT coding system. © 1985 SPIE. All rights reserved.

关键词： image compression

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