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International image processing, applications and systems Conference (IPAS)

作者： Marwa Karray Mohamed Krid Amir Gargouri Dorra Sellami Masmoudi Computers Imaging Electronics and Systems Group (CIELS) from Sfax Engineering School Sfax Tunisia

This paper present a novel architecture for image segmentation. The design is based on the fuzzy c-means algorithm based gaussian function in pulse mode for reducing the large storage requirement. The proposed algorithm is tested in mammogram image segmentation approximately with 0.92 of segmentation index. The pulse mode stochastic computing technique is implemented with a simple bloc avoiding the use of conventional multipliers for sake of compactness. The whole modified FCM is implemented on a Virtex ii PRO FPGA platform and synthesis results are presented.

关键词： image segmentation Indexes Algorithm design and analysis Clustering algorithms Computer architecture Registers Field programmable gate arrays

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Real-time 3D shape measurement system with full temporal resolution and spatial resolution

Real-time 3D shape measurement system with full temporal res...

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Conference on Three-Dimensional image processing, Measurement (3DIPM), and applications

作者： Zhong, Kai Li, Zhongwei Zhou, xiaohui Zhan, Guomin Liu, xingJian Shi, Yusheng Wang, Congjun Huazhong Univ Sci & Technol State Key Lab Mat Proc & Die & Mould Technol Wuhan 430074 Peoples R China Wuhan Univ BSchool Geodesy & Geomat Wuhan 430074 Peoples R China

ISBN: (纸本)9780819499301

Numerous fast 3D shape measurement systems based on pattern projection method have been developed in recent years, but measuring arbitrary dynamic 3D shape with full resolution, including temporal resolution and spatial resolution, is still a big challenging problem. This paper presents a real-time 3D measurement system with full spatial resolution and temporal resolution. In this system, three-step phase-shifting algorithm is employed for full spatial resolution measurement, and a multi-view phase-shifting correspondence is used to search the corresponding point independently without additional images. So any adjacent three phase-shifting images in the continuous capturing stream can be used to reconstruct arbitrary 3D shape, the 3D acquisition speed can be as fast as the camera capturing speed to achieve full temporal resolution. Moreover, for developing an accurate measurement system the calibration method is also presented, and it can obtain more accurate internal and external parameters than traditional method in presence of inaccuracy of calibration target. And a hybrid computing architecture based accelerate calculation method is introduced to achieve real-time 3D measurement, and the computation speed can be above 280 times faster than before. The experiments indicate that our system can perform 1024 x 768 full spatial resolution and 220 fps full temporal resolution 3D measurement, and it can also realize real-time 3D measurement at average speed of 50 fps.

关键词： Real-time 3D measurement pattern projection measurement full temporal resolution full spatial resolution GPU parallel computing system calibration

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HNCP-ii: A 16-core 65nm microprocessor ASIC for image processing algorithms

HNCP-II: A 16-core 65nm microprocessor ASIC for image proces...

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International Workshop on Reconfigurable Communication-Centric systems-on-Chip (ReCoSoC)

作者： Mohamed Amine Boussadi Thierry Tixier Alexis Landrault Jean-Pierre Derutin Institut Pascal - UMR 6602 CNRS / UBP / IFMA 24 Avenue des Landais 63171 Aubiere France

In many video and image processing applications, complexity has reached a point where the performance requirements can no longer be supported by standard architectures based on a single processor. This is why many systems are based on multiprocessor architecture. In this paper, we present HNCP-ii a 16-core flexible distributed memory ASIC dedicated to embedded application field (image processing applications). Connected through a torus on-chip network, each tile of the overall system includes an open-source RISC processor, a floating point unit, a video management module and a set of built in hardware features for multicore communication. This specific hardware enables to meet most relevant overall parallelism scheme (parallel skeletons) thanks to software-configurable modules. Results are presented for two image processing algorithms in term of execution time, speedup and efficiency. Area, power and timing performance of the synthesized ASIC are given for a CMOS 65nm technology node.

关键词： Computer architecture Skeleton Application specific integrated circuits Hardware Field programmable gate arrays Clocks Topology

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Hardware accelerator for fast image/video thinning

Hardware accelerator for fast image/video thinning

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IEEE International Workshop on imaging systems and Techniques (IST)

作者： Daniele Davalle Berardino Carnevale Sergio Saponara Luca Fanucci Pierangelo Terreni Department of Information Engineering University of Pisa Pisa Italy

image thinning algorithms are widely used in image processing to simplify elaboration preserving geometrical features. Standard approaches are based on iterative methods and on distance transforms. Both techniques are well known to be computationally intensive. In this work we propose a parallel, fast and flexible hardware architecture for image thinning to achieve real-time performance. The test case is the 720 × 576 PAL standard video at 25 frame per second (fps). Synthesis was performed for a Stratix ii FPGA EP2S30 and for a standard cell 65 nm CMOS technology. The former showed a usage of 4%slices and 1% registers, the latter gave an occupation of 5 kgates for the processing core. The execution time for one frame was 0.03 s on the FPGA and 0.009 s on the 65 nm, resulting in a maximum throughput of 33 fps and 111 fps, respectively.

关键词： Computer architecture Field programmable gate arrays Random access memory Standards image segmentation Algorithm design and analysis Hardware

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Fast 3D Object Alignment from Depth image with 3D Fourier Moment Matching on GPU

Fast 3D Object Alignment from Depth Image with 3D Fourier Mo...

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International Conference on 3D imaging, Modeling, processing, Visualization and Transmission (3DIMPVT)

作者： Hong-Ren Su Hao-Yuan Kuo Shang-Hong Lai Chin-Chia Wu Institute of Information Systems and Applications National Tsing Hua University Hsinchu Taiwan Dept. of Computer Science National Tsing Hua University Hsinchu Taiwan

In this paper, we develop a fast and accurate 3D object alignment system which can be applied to detect objects and estimate their 3D pose from a depth image containing cluttered background. The proposed 3D alignment system consists of two main algorithms: the first is the 3D detection algorithm to detect the top-level object from a depth map of the cluttered 3D objects, and the second is the 3D Fourier based point-set alignment algorithm to estimate the 3D object pose from an input depth image. We also implement the proposed 3D alignment algorithm on a GPU computing platform to speed up the computation of the object detection and Fourier-based image alignment algorithms in order to align the 3D object in real time.

关键词： Three-dimensional displays Graphics processing units image segmentation Object detection Fourier transforms parallel processing

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parallel architecture for accelerating affine transform in high-speed imaging systems

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JOURNAL OF REAL-TIME image processing 2013年第1期8卷 69-79页

作者： Biswal, Pradyut Kumar Mondal, Pulak Banerjee, Swapna Indian Inst Technol Kharagpur Dept Elect & Elect Engn Kharagpur 721302 W Bengal India

Affine transform is widely used in the high speed image processing systems. This transform plays an important role in various high speed applications like Optical quadrature microscopy (OQM), image stabilisation in digital camera and image registration etc. In these applications, transformations of image consume most of the execution time. Hence, for high speed imaging systems, acceleration of Affine transform is very much sought for. In this paper, the pipelined architecture implementation of a proposed inherent parallel algorithm for Affine transform has been presented. The acceleration of the image transformation will help in reducing the processing time of high speed imaging systems. The architecture is mapped in Field programmable gate array (FPGA) and the result shows that the proposed algorithm is almost 4 times faster than the conventional algorithm while retaining the image quality. Using the proposed algorithm, an image of size 1,920 x 1,080 can be transformed with a frame rate of 540 frames per second and the multiplane image synthesis for image stabilisation on the same digital image can be performed with a frame rate of 65 fps.

关键词： Affine transform Optical quadrature microscopy Multiplane image stabilization Digital camera parallel processing FPGA

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Ultrafast Streaming Camera Platform for Scientific applications

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2013年第5期60卷 3669-3677页

作者： Caselle, Michele Chilingaryan, Suren Herth, Armin Kopmann, Andreas Stevanovic, Uros Vogelgesang, Matthias Balzer, Matthias Weber, Marc Karlsruhe Inst Technol Inst Inst Data Proc & Elect D-76021 Karlsruhe Germany

x-ray computer tomography is a powerful method for nondestructive investigations in many fields. Three-dimensional images of internal structure are reconstructed from a sequence of two-dimensional projections. The polychromatic high density photon flux of modern synchrotron light sources offer hard x-ray imaging with spatio-temporal resolution up to the micrometer and micrometers range. Existing indirect x-ray image detection systems can be adapted for fast image acquisition by high-speed visible-light cameras. In this paper, we present a platform for custom high-speed CMOS cameras with embedded field-programmable gate array (FPGA) processing. This modular system is characterized by a high-throughput PCI Express (PCIe) interface and efficient communication blocks. It has been used to develop a novel architecture for a self-event trigger that increases the effective image frame rate and reduces the amount of received data. Thanks to a low-noise design, high frame rates in the kilohertz range, and high-throughput data transfer, this camera is well suited for ultrafast synchrotron-based x-ray radiography and tomography. The camera setup is accomplished by high-throughput Linux drivers and a seamless integration in our GPU computing framework.

关键词： CMOS-image sensor FPGA real-time parallel data processing high-speed imaging

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The DFrame: parallel programming using a distributed framework implemented in MPI.

The DFrame: Parallel programming using a distributed framewo...

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12th International Symposium on Distributed Computing and applications to Business, Engineering and Science (DCABES)

作者： Mclay, Tony Hoppe, Andreas Greenhill, Darrel R. Khaddaj, Souheil Univ Kingston Fac Comp Informat Syst & Math Kingston Upon Thames KT1 2EE Surrey England

ISBN: (纸本)9780769550602

High content throughput imaging systems must apply time consuming complex image processing algorithms to multiple bio-medical image streams. These systems are typically designed to use parallel resources in order to achieve results in reasonable time scales. This paper presents the design of a distributed framework that provides separation of the largely orthogonal parallelisation from the domain image processing algorithm development. This allows reuse and pluggable extension of parallelising patterns, as well as providing for extensibility of domain image processing. (Abstract)

关键词： component distributed computing mpi image processing

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Using C to implement high-efficient computation of dense optical flow on FPGA-accelerated heterogeneous platforms

Using C to implement high-efficient computation of dense opt...

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IEEE International Conference on Field-Programmable Technology (FPT)

作者： Zhilei Chai Haojie Zhou Zhibin Wang Dong Wu School of Internet of Things Engineering Jiangnan University Wuxi China State Key Laboratory of Mathematical Engineering and Advanced Computing Wuxi China

ISBN: (纸本)9781479962464

High-quality algorithms for dense optical flow computation are computationally intensive. To compute them with high speed and low power is vital to make optical flow computation applicable in real-world applications. In contrast to only the Horn-Schunck model being studied on FPGA-based systems today, one of the best linear variational methods for dense optical flow computation, Combine-Brightness-Gradient, is implemented on FPGA-accelerated heterogeneous platforms in this paper. C instead of HDLs is employed and optimizing techniques based on the algorithmic parallelism and hardware architecture are introduced. Experimental results show that 30-110x improvement of the computing efficiency over CPUs was achieved. The FPGA-accelerated version is able to process 640 × 480 image at 12 fps with 0.38 J per frame, while it is 0.8 fps and around 40 J on CPUs. Through demonstrating high performance and low power of dense optical flow algorithm on FPGA-based heterogeneous platforms implemented in C, this paper shows that the off-the-shelf commodity FPGAs coupled with High-Level-Synthesis (HLS) tools could provide an available option when computational efficiency together with development speed are required.

关键词： Optical imaging Optical computing Nonlinear optics Field programmable gate arrays parallel processing Computer vision Computational modeling

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Vasculature segmentation using parallel multi-hypothesis template tracking on heterogeneous platforms

Vasculature segmentation using parallel multi-hypothesis tem...

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Conference on image processing - algorithms and systems xI

作者： Zhang, Dong Ping Howes, Lee Adv Micro Devices Inc Res Grp Sunnyvale CA 94088 USA

ISBN: (纸本)9780819494283

We present a parallel multi-hypothesis template tracking algorithm on heterogeneous platforms using a layered dispatch programming model. The contributions of this work are: an architecture-specific optimised solution for vasculature structure enhancement, an approach to segment the vascular lumen network from volumetric CTA images and a layered dispatch programming model to free the developers from hand-crafting mappings to particularly constrained execution domains on high throughput architecture. This abstraction is demonstrated through a vasculature segmentation application and can also be applied in other real-world applications. Current GPGPU programming models define a grouping concept which may lead to poorly scoped local/shared memory regions and an inconvenient approach to projecting complicated iterations spaces. To improve on this situation, we propose a simpler and more flexible programming model that leads to easier computation projections and hence a more convenient mapping of the same algorithm to a wide range of architectures. We first present an optimised image enhancement solution step-by-step, then solve a separable nonlinear least squares problem using a parallel Levenberg-Marquardt algorithm for template matching, and perform the energy efficiency analysis and performance comparison on a variety of platforms, including multi-core CPUs, discrete GPUs and APUs. We propose and discuss the efficiency of a layered-dispatch programming abstraction for mapping algorithms onto heterogeneous architectures.

关键词： image Enhancement Cardiac imaging GPU computing Programming Model

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