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检索条件"任意字段=Internation Conference on Embedded Systems and Applications/International Conference on VLSI"

共 884 条记录，以下是51-60 订阅

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Enhancing Mobility for the Visually Impaired using CMOS Implementation of Multipath Fully Differential OTA with Two Flipped Voltage Follower at 65 and 45nm CMOS Technology 15

Enhancing Mobility for the Visually Impaired using CMOS Impl...

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15th international conference on Advances in Computing, Control, and Telecommunication Technologies, ACT 2024

作者： Lakshmi, N. Pavithra, G. Manjunath, T.C. VLSI Design & Embedded Systems Specialization Dept. of Electronics & Communication Engineering Dayananda Sagar College of Engineering Bangalore India Dept. of Electronics & Communication Engineering Dayananda Sagar College of Engineering Karnataka Bangalore India

ISBN: (纸本)9798331300579

The article presents the CMOS implementation of multipath differential OTA (operational trans conductance amplifier) with two flipped voltage follower. OTA is a type of analog amplifier used in integrated circuits for signal processing applications and used to convert input voltage signal into an output current signal. The design aims to enhance performance metrics such as gain, bandwidth and addressing the demands for modern analog and mixed signal applications. Utilizing two Flipped' Voltages Followers [FVF's] cell as variable current's source will enables both class A-B operation & adaptive in biased for all other type of driver units. The structures incorporates multiple input-to-output paths serving as dynamic current's boosters in the time of their slewing rates phases, enhancing their slewing rate performances. The amplifier performance is analyzed in terms of gain and bandwidth. Their proposed method of two stage flipped voltage follower with multipath fully differential OTA was developed at 50nm using 1.4V and 75 nm using 1.6V CMOS technology and finally this work was developed in Tanner EDA tool. This paper explores advancements in assistive technology aimed at enhancing mobility for individuals with visual impairments. The proposed solution involves the CMOS implementing of the multiple path full difference type of Operational Transconductance Amplifier (OTA), incorporating 2 Flip type of Voltage level Followers (FVF) cell. The study investigates the effectiveness of this design in both 75nm and 50nm CMOS technologies. The results showcase improvements in transconductance and operational characteristics, offering a promising avenue for the development of assistive devices. The findings contribute to the ongoing efforts to create inclusive and accessible technological solutions for individuals facing challenges in visual navigation. © Grenze Scientific Society, 2024.

关键词： CMOS integrated circuits

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SANNA: Secure Acceleration of Neural Network applications

SANNA: Secure Acceleration of Neural Network Applications

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international conference on vlsi Design

作者： Akash Poptani Abhishek Mittal Rishit Saiya Rajshekar Kalayappan Sandeep Chandran IIT Dharwad Dharwad India IIT Palakkad Palakkad India

The threat of Hardware Trojans looms large on safety-critical systems. A Design-For-Trust technique to mitigate this threat without significant loss in performance is to implement these systems as a Heterogeneous Secure System $-HSS$ . An HSS is built using an array of trustworthy home-grown cores and untrusted but fast third-party cores in a way that prevents unverified results from third-party cores reaching IO peripherals and devices. In this work, we propose to use the unverified results to initiate a speculative execution of subsequent layers of a Neural Network (NN) application on trustworthy cores. Our experiments on six popular NN applications show that on an average, the secure execution on an HSS is slower than the corresponding untrusted execution by up to 6.26% as compared to the slowdown of 80.89% experienced by a conventional trustworthy system.

关键词： Performance evaluation embedded systems Source coding Discrete Fourier transforms Artificial neural networks Very large scale integration Hardware

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Margin Propagation based Analog Soft-Gates for Probabilistic Computing

Margin Propagation based Analog Soft-Gates for Probabilistic...

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international conference on vlsi Design

作者： Ankita Nandi Pratik Kumar Shantanu Chakrabartty Chetan Singh Thakur Department of Electronic Systems Engineering NeuRonICS Lab Indian Institute of Science Bengaluru India Department of Electrical and Systems Engineering Washington University in St. Louis St. Louis MO USA

Soft computing gates offer a promising approach for efficient and parallel processing of probabilistic signals. These gates are widely used in Bayesian networks and various machine learning models. However, unlike digital logic gates, the design and scaling of analog Soft-Gates is challenging due to analog artifacts, i.e., sensitivity to biasing, mismatch, and temperature variations. In this paper, we present a systematic framework for designing analog Soft-Gates that leverage the bias and temperature scalability of the Margin Propagation principle. Specifically, the paper proposes an adaptive design strategy to alleviate mismatch artifacts and to trade-off probabilistic computational accuracy, area efficiency, and power consumption. We demonstrate the design synthesis of a Soft-Gate and apply it to error correction decoding and filtering tasks. The reported Mean Square Error of the Soft-Gate is less than $10 ^{-2}$, indicating its accuracy in probabilistic computations. For edge filtering applications, the proposed Soft-Gates can achieve an average Structural Similarity Index of 0.95. The estimated energy consumption in 180nm CMOS technology is in the order of pico-Joules, validating the gate’s energy efficiency.

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An Investigation on Inherent Robustness of Posit Data Representation 34

An Investigation on Inherent Robustness of Posit Data Repres...

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34th international conference on vlsi Design / 20th international conference on embedded systems (vlsiD)

作者： Alouani, Ihsen Ben Khalifa, Anouar Merchant, Farhad Leupers, Rainer INSA Hauts De France IEMN Lab CNRS UMR 8520 Valenciennes France Univ Sousse Natl Engn Sch Sousse Sousse Tunisia Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst Aachen Germany

ISBN: (纸本)9781665440875

As the dimensions and operating voltages of computer electronics shrink to cope with consumers' demand for higher performance and lower power consumption, circuit sensitivity to soft errors increases dramatically. Recently, a new data-type is proposed in the literature called posit data type. Posit arithmetic has absolute advantages such as higher numerical accuracy, speed, and simpler hardware design than IEEE 754-2008 technical standard-compliant arithmetic. In this paper, we propose a comparative robustness study between 32-bit posit and 32-bit IEEE 754-2008 compliant representations. At first, we propose a theoretical analysis for IEEE 754 compliant numbers and posit numbers for single bit flip and double bit flips. Then, we conduct exhaustive fault injection experiments that show a considerable inherent resilience in posit format compared to classical IEEE 754 compliant representation. To show a relevant use-case of fault-tolerant applications, we perform experiments on a set of machine-learning applications. In more than 95% of the exhaustive fault injection exploration, posit representation is less impacted by faults than the IEEE 754 compliant floating-point representation. Moreover, in 100% of the tested machine-learning applications, the accuracy of posit-implemented systems is higher than the classical floating-point-based ones.

关键词： Computer Arithmetic Posit Arithmetic Machine Learning Reliability

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Exploring the Intersection of vlsi and embedded systems: Technological Advancements and Future applications

Exploring the Intersection of VLSI and Embedded Systems: Tec...

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Advances in Computation, Communication and Information Technology (ICAICCIT), international conference on

作者： V.Samuthira Pandi S Aaron James S Jaishika D Shobana J Lakshmi Priya P. Pattunnarajam Centre for Advanced Wireless Integrated Technology Chennai Institute of Technology Chennai Tamil Nadu India Department of Engineering & Technology Electrical and Electronics Section University of Technology and Applied Sciences Ibri Sultanate of Oman Department of Information Technology Sri Sairam Institute of Technology SaiLeo Nagar West Tambaram Chennai. Department of Mechatronics Engineering Rajalakshmi Engineering College Chennai Department of ECE Saveetha Engineering College Chennai Department of ECE Sri Venkateswara College of Engineering Sriperumbudur

ISBN: (数字)9798331541217

ISBN: (纸本)9798331541224

In this study, we look at the present and future of embedded systems as well as vlsi (Very Large Scale Integration) technology to see how the two work together. In particular, very large scale integration (vlsi) technology has altered the landscape of consumer electronics and medical diagnostics by enabling the integration of millions of transistors onto a single chip. Whereas bigger systems rely on embedded systems for their operation, the latter perform tasks that are unique to their settings. One area that has benefited greatly from vlsi technology’s incorporation into embedded systems is the automotive industry, which uses it to power cutting-edge electronic systems like navigation and voice recognition. Communication device development, 5 G evolution, and beyond have all relied heavily on this integration, demonstrating vlsi’s significance in the field of future communication technologies. Trends in very large scale integration (vlsi) technology that are yet to come include developments in semiconductor manufacturing, AI, and new fields like neuromorphic engineering and quantum computing. embedded systems stand to benefit from these developments, which should increase their efficiency, power, and adaptability to new uses. In particular, this research looks at how very large scale integration (vlsi) and embedded systems can change sectors including consumer electronics, healthcare, and the automobile industry in the future. For a full picture of how these technologies will influence the future of technology, it also discusses the pros and cons of integrating them.

关键词： Industries Performance evaluation Technological innovation embedded systems Machine learning Very large scale integration Semiconductor device manufacture Transistors Consumer electronics Automotive engineering

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ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework 34

ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework

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34th international conference on vlsi Design / 20th international conference on embedded systems (vlsiD)

作者： Merchant, Farhad Sisejkovic, Dominik Reimann, Lennart M. Yasotharan, Kirthihan Grass, Thomas Leupers, Rainer Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst Aachen Germany

ISBN: (纸本)9781665440875

With the growing demands of consumer electronic products, the computational requirements are increasing exponentially. Due to the applications' computational needs, the computer architects are trying to pack as many cores as possible on a single die for accelerated execution of the application program codes. In a multiprocessor system-on-chip (MPSoC), striking a balance among the number of cores, memory subsystems, and network-on-chip parameters is essential to attain the desired performance. In this paper, we present ANDROMEDA, a RISC-V based framework that allows us to explore the different configurations of an MPSoC and observe the performance penalties and gains. We emulate the various configurations of MPSoC on the Synopsys HAPS-80D Dual FPGA platform. Using STREAM, matrix multiply, and N-body simulations as benchmarks, we demonstrate our framework's efficacy in quickly identifying the right parameters for efficient execution of these benchmarks.

关键词： design space exploration multiprocessor system-on-chip RISC-V performance tuning

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Prototype for Parking Shield System Using Raspberry Pi

Prototype for Parking Shield System Using Raspberry Pi

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international conference on vlsi, Signal Processing, Power Electronics, IoT, Communication and embedded systems, VSPICE-2022

作者： Rajeshwari, Rai B. Mahaveera, K. Dept. of Electronics and Communication Engg NMAM Institute of Technology Karnataka Nitte574110 India

ISBN: (纸本)9789819944439

The automotive industry is seen to be making a transformation from manual to semi-autonomous to fully autonomous vehicles. Advanced Driver Assistance System (ADAS) forms a major building block for the next generation of highly Autonomous Vehicles. ADAS is among the fastest-growing segments in automotive electronics and includes large number of applications like Antilock braking system, automatic speed control, Parking assistance system, lane keeping assist etc. Parking assistant system supports several functionalities like Parking line detection, object detection, pedestrian classification, parking support functions etc. These functions are mainly implemented using Surround View Camera System (SVCS) which provides real-time view of the area surrounding the car. Parking Shield System (PSS) is one such parking support function which works with the help of SVCS. PSS is used as an aid to identify the damage caused to the parked vehicle. This work proposes a prototype development for PSS using Raspberry Pi. Acceleration sensor is used to detect the movement of the vehicle and once the vehicle movement is detected, LEDs glow (indicating opening of flaps and mirrors). Immediately, USB Camera connected to Raspberry Pi captures the image and is displayed in VNC Viewer window. © 2024, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

关键词： Advanced driver assistance systems

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Next-Generation embedded systems with Synergies vlsi with Deep Learning: Design Methodologies, Optimization Techniques, and Real-World applications

Next-Generation Embedded Systems with Synergies VLSI with De...

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IEEE Students' conference on Electrical, Electronics and Computer Science (SCEECS)

作者： G. Kalarani M. Mohanapriya P. Pattunnarajam G. Sasikala J. Sivakumar M. Suresh Department of Electronics and Instrumentation Engineering Jaya Engineering College Chennai Tamil Nadu India Department of Computer Science and Engineering SRM Valliammai Engineering College Chennai Tamil Nadu India Department of ECE Sri Venkateswara College of Engineering Sriperumbudur Tamil Nadu India Department of ECE Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology Chennai Tamil Nadu India Department of Electronics and Communication Engineering St. Joseph’s College of Engineering Chennai Tamil Nadu India Department of Mathematics R.M.D. Engineering College Thiruvallur Tamil Nadu India

ISBN: (数字)9798331529833

ISBN: (纸本)9798331529840

New generation of embedded systems with superior intelligence, energy efficiency, and performance have emerged as a result of the merging of deep learning with Very-Large-Scale Integration (vlsi) technology. Methodologies for design, optimisation strategies, and practical uses of next-generation embedded systems are the foci of this study, which investigates the ways in which vlsi and deep learning might work together. These systems have the potential to transform several industries, such as transportation, medicine, robotics, and the IoT, by harnessing the processing power of deep neural networks with the improvements in semiconductor fabrication. Prior to delving into the advantages of bespoke hardware design for deep learning inference and training, we trace the history of very large scale integration (vlsi) technology and its incorporation with deep learning algorithms. Investigated here are the design techniques that, when applied to very large scale integration (vlsi) architectures like FPGAs and ASICs, allow for the efficient mapping of deep learning models onto these devices. We show case studies that show how these methods work and talk about the trade-offs between performance, power consumption, and adaptability. The development of next-generation embedded systems relies heavily on optimisation approaches. Model compression, quantisation, and pruning are some of the optimisation strategies that we examine; they lessen the memory and computational demands of deep learning models without drastically altering their accuracy. For embedded devices with limited resources, these methods are crucial for implementing deep learning models. Additionally, we explore the practical uses of embedded systems augmented with vlsi and deep learning. By capitalising on the complementary strengths of vlsi and deep learning, applications like autonomous driving, medical imaging, and smart home automation are revolutionising entire industries. In this paper, we examine the desig

关键词： Deep learning Industries Technological innovation embedded systems Design methodology Very large scale integration Hardware Optimization Autonomous vehicles Next generation networking

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An Image Processing Application: Design of vlsi based Bilateral Filter using Distance Matrix Method 2

An Image Processing Application: Design of VLSI based Bilate...

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2nd IEEE international conference on Advanced Technologies in Intelligent Control, Environment, Computing and Communication Engineering, ICATIECE 2022

作者： Saranya, C. Vijayananth, M.V. Mouleeshwaran, S. Kaviyarasu, D. K.S.Rangasamy College of Technology Department of ECE Tiruchengode India

ISBN: (纸本)9781665493963

The entire design structure is being impacted by advancements in electronic technology, which is posing a number of challenges for digital systems. In the fields of communications, image processing, and multimedia, vlsi-based image filter architectures are essential. Numerous applications based on vlsi architecture experience problems with significant size components that result in a filter design error during the floating-point arithmetic stages. The increased complexity of the filter design's component list is the issue encountered in the vlsi architecture. Noise removal often involves using the image filtering technique. There is a greater need for performance-based hardware sorting algorithms for low power embedded real-Time image filtering applications. Noise often taints an image while being transmitted from one location to another. The purpose of the denoising technique is to reduce noise while keeping any potential signal features that may be significant. Compare to the prior method, the usage of multipliers can be reduced based on the techniques of distance matrix and hardware resource sharing. The speed of the proposed vlsi architecture for the bilateral filter can be faster than the existing approach. © 2022 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Towards Scalability and Performance: Framework for Heterogeneous Cluster Integration in Deep Learning Accelerators

Towards Scalability and Performance: Framework for Heterogen...

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international conference on vlsi systems, Architecture, Technology and applications (vlsi-SATA)

作者： K Bhagirath Dheeraj Pant Abhishek Tiwari Vivek Khaneja Embedded Systems Division Centre for Development of Advanced Computing Noida IN

ISBN: (数字)9798350362268

ISBN: (纸本)9798350362275

This paper presents a streamlined approach to address the challenges of integrating heterogeneous clusters in deep learning(DL) accelerators. As the demand for scalable and high-performance computing in DL continues to grow, the proposed framework offers an easy implementation solution, ensuring efficiency without compromise. The method details core components and design principles, guiding the inclusion of heterogeneous clusters step by step. Extensive experiments show the framework's adaptability, handling diverse workloads and cluster architectures. Our exploration integrates various dataflows, dynamically selected by NN during runtime for optimal performance. Results indicate improved scalability and robustness compared to existing methods. This research provides a valuable resource for practitioners seeking efficient and accessible solutions for harnessing the power of heterogeneous clusters in DL acceleration, with implications for advancements in AI and computational efficiency.

关键词： Deep learning Runtime Scalability High performance computing systems architecture Computer architecture Very large scale integration

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