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检索条件"任意字段=International Conference on Application Specific Array Processors"

共 3452 条记录，以下是11-20 订阅

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Proceedings of the international conference on application specific array processors (Cat. No.90CH2920-7)

Proceedings of the International Conference on Application S...

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international conference on application specific array processors

Presents the front cover of the proceedings record.

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Development of pMUT Linear array Included with Fresnel Zone Plate Focusing Function 38

Development of pMUT Linear Array Included with Fresnel Zone ...

引用

38th IEEE international conference on Micro Electro Mechanical Systems, MEMS 2025

作者： Shimoyama, Tatsuya Teshigahara, Akihiko Yoshida, Shinya Shibaura Institute of Technology Japan

ISBN: (纸本)9798331508890

We have proposed a method to focus an ultrasonic beam transmitted from piezoelectric micromachined ultrasonic transducer (pMUT) array based on the principle of phase-type Fresnel Zone Plate (FZP) lens. In this idea, two types of pMUT elements, i.e. one drives in phase and the other drives in anti-phase, are prepared. Each element is respectively arranged in the transparent zone and phase-shift zone corresponding to an FZP lens. As a result, the ultrasonic beam is focused. In this study, the two different types were fabricated by simply changing the shape of the upper electrode. Next, a linear array of AlN pMUT was fabricated with the assumption of application to beam focusing in the short-axis direction. The measurement experiment of the distribution of the sound pressure transmitted from the array demonstrated that the beam was focused in the same manner with a simulation result. This idea has the potential to eliminate acoustic lenses and simplify the structure of ultrasound probes for specific applications. © 2025 IEEE.

关键词： Ultrasonic transducers

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Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators 25

Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM ...

引用

30th ACM international conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2025

作者： Zhao, Shixin Li, Yuming Li, Bing He, Yintao Wang, Mengdi Han, Yinhe Wang, Ying Institute of Computing Technology Chinese Academy of Sciences University of Chinese Academy of Sciences Beijing China Institute of Microelectronics Chinese Academy of Sciences Beijing China State Key Lab of Processors Institute of Computing Technology Chinese Academy of Sciences Beijing China

ISBN: (纸本)9798400710797

Computing-in-memory (CIM) architectures demonstrate superior performance over traditional architectures. To unleash the potential of CIM accelerators, many compilation methods have been proposed, focusing on application scheduling optimization specific to CIM. However, existing compilation methods often overlook CIM's capability to switch dynamically between compute and memory modes, which is crucial for accommodating the diverse memory and computational needs of real-world deep neural network architectures, especially the emerging large language models. To fill this gap, we introduce CMSwitch, a novel compiler to optimize resource allocation for CIM accelerators with adaptive mode-switching capabilities, thereby enhancing the performance of DNN applications. specifically, our approach integrates the compute-memory mode switch into the CIM compilation optimization space by introducing a new hardware abstraction attribute. Then, we propose a novel compilation optimization pass that identifies the optimal network segment and the corresponding mode resource allocations using dynamic programming and mixed-integer programming. CMSwitch uses the tailored meta-operator to express the compilation result in a generalized manner. Evaluation results demonstrate that CMSwitch achieves an average speedup of 1.31x compared to existing SOTA CIM compilation works, highlighting CMSwitch's effectiveness in fully exploiting the potential of CIM processors for a wide range of real-world DNN applications. © 2025 ACM.

关键词： Resource allocation

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Design of an Antenna Synthesis Algorithm for application with a Reconfigurable Phased array

Design of an Antenna Synthesis Algorithm for Application wit...

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2025 United States National Committee of URSI National Radio Science Meeting, USNC-URSI NRSM 2025

作者： Mello, Luke Roessler, Justin Egbert, Austin Baylis, Charles Marks, Robert J. Bouvy, Alex Kirk, Benjamin Peroulis, Dimitrios Baylor University WacoTX United States Army Research Laboratory DEVCOM AdelphiMD United States Purdue University West LafayetteIN United States

ISBN: (纸本)9781946815200

As demand for spectrum has increased, it has become a more scarce and valuable resource. Even so, the management of spectrum remains largely rigid. Consistent with the management approach, technology used to implement wireless transmitters is often rigid and unable to maximize performance while adjusting operating frequency. To move towards a future of more flexible spectral co-existence, there must be innovation in the underlying technologies. For instance, while the signals in the elements of a traditional, fixed-geometry phased array can be phase-shifted to change beam direction, there are many other parameters that are typically fixed in the design and cannot be altered during use while maintaining acceptable performance, such as frequency, bandwidth, beam pattern, and power. While sparse arrays can provide more control over array geometry, they are very application specific and may not be applicable in general use cases. Instead, a more adaptable and reconfigurable array that can change its electrical and physical properties to meet varying specifications could provide a much more flexible solution for dynamic spectrum use scenarios. © 2025 USNC-URSI.

关键词： Antenna phased arrays

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Energy Consumption and Power Modeling for Various Intel Multicore processors

Energy Consumption and Power Modeling for Various Intel Mult...

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Euromicro conference on Parallel, Distributed and Network-Based Processing

作者： Thomas Rauber Gudula Rünger Computer Science Department University Bayreuth Bayreuth Germany Computer Science Department Chemnitz University of Technology Chemnitz Germany

ISBN: (数字)9798331524937

ISBN: (纸本)9798331524944

Multicore processors spend a varying amount of time and energy when executing a user application. The specific amount of time and energy consumed depends on application parameters as well as on the execution mode, which includes the number of threads or the operational frequency used for the execution of an application. However, also the characteristics of the multicore processor can have a significant impact. In this article, three Intel multicore processors (Broadwell, Cascade Lake and Sapphire Rapid) of different generations are investigated with respect to their time and energy expenditure. The user application is a numerical solution of time-dependent partial differential equations. The experiments include an analysis of each processor’s unique power characteristics, with an emphasis on investigating and modeling the power behavior of these multicore processors. Processor specific power models distinguishing static and dynamic power are presented and their validity is shown with experimental data. The best suited power models differ strongly for the different processors reflecting the progress in internal processor design with respect to energy management.

关键词： Analytical models Energy consumption Time-frequency analysis Program processors Multicore processing Partial differential equations Lakes Mathematical models Numerical models Energy management

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An Advanced Non-destructive Inspection Method for Early Detection of Damage in Welds Using Phased array Ultrasonic Testing 30th

An Advanced Non-destructive Inspection Method for Early Dete...

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30th international conference on Computational and Experimental Engineering and Sciences

作者： Zhao, Rui Chen, Weizhen Zhang, Boshan Badar, Jahangir Tongji Univ Dept Bridge Engn Shanghai Peoples R China

ISBN: (纸本)9783031816758;9783031816734;9783031816727

This study introduces an advanced non-destructive inspection (NDI) technique employing Phased array Ultrasonic Testing (PAUT) to identify early-stage damage in welds located within orthotropic steel bridge decks. Orthotropic steel bridge decks, renowned for their lightweight and resilient characteristics, are extensively employed in contemporary bridge construction endeavors. Nonetheless, ensuring their structural soundness and detecting flaws holds paramount importance in guaranteeing safety and durability. The initial phases of crack propagation pose challenges for detection through conventional visual inspection methods due to the minute scale of crack dimensions. Nevertheless, adopting preemptive measures during these nascent stages of crack propagation is imperative for reinforcing maintenance protocols and bolstering structural safety measures. A PAUT protocol tailored to the specific characteristics of steel bridge structures is developed through a comprehensive analysis of current non-destructive testing methodologies. Experimental investigations using a specimen validate PAUT's efficacy in detecting cracks in various weld types, including those between U-ribs and deck plates, U-shaped splice plates and deck plates, and floor beams and deck plates. The results demonstrate PAUT's ability to identify early damage within steel structures and welds that are not visible to the naked eye, accurately locate defects, determine their size, and identify the direction of crack propagation. The innovative application of PAUT on orthotropic steel bridge decks reflects the maturation and advancement of this technology, offering an effective non-destructive approach for early detection of cracking damage. Prompt identification of potential issues facilitates timely maintenance and reinforcement efforts, ultimately minimizing the risk of human and economic losses.

关键词： Non-Destructive Testing (NDT) Phased array Ultrasonic Testing (PAUT) Orthotropic Steel Bridge Early Crack Detection Weld

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An In-Memory Computing-based Efficient Transformer Accelerator Using Stateful Matrix Multiplier for Voice Assistant Consumer applications

An In-Memory Computing-based Efficient Transformer Accelerat...

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IEEE international conference on Consumer Electronics (ICCE)

作者： Seok-Woo Chang Dong-Sun Kim Department of Semiconductor Systems Engineering University of Sejong Seoul Republic of Korea

ISBN: (数字)9798331521165

ISBN: (纸本)9798331521172

Processing-in-memory (PIM) is designed to overcome data transfer bottlenecks by performing repeated data-intensive operations on the same die as the memory. In this study, we propose a new variable systolic array with stateful matrix multiplication based on the input memory word count. It showed a high performance in transformers, the basis for natural language processing (NLP) models. The implemented Transformer encoder can be applied to mobile application processors (APs) to accelerate sentence classification in call recordings or voice memo content tasks.

关键词： Program processors Personal voice assistants Random access memory Transformers Systolic arrays Natural language processing Data models Recording Mobile applications Servers

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Integration of the Open-Source RISC-V Formal Verification Framework into the STMicroelectronics Toolchain and Its application to the STRiVe2.4 CPU

Integration of the Open-Source RISC-V Formal Verification ...

引用

international conference on applications in Electronics Pervading Industry, Environment and Society, APPLEPIES 2024

作者： Bordonaro, Lorenzo Rapuano, Emilio Bocchio, Sara Fanucci, Luca Università di Pisa Lungarno Pacinotti43 Pisa56126 Italy STMicroelectronics Via Camillo Olivetti 2 MB Agrate Brianza20864 Italy

ISBN: (纸本)9783031840999

The RISC-V instruction set architecture has gained significant attention in recent years due to its open-source nature and potential to revolutionize the processor industry. RISC-V is designed to be simple, modular, and extensible, allowing for flexibility in implementation and customization for specific applications. However, the verification of RISC-V processors remains a critical challenge due to the complexity of the ISA and the need for rigorous testing to ensure correctness and reliability. Formal verification is a promising approach to address the challenge of RISC-V cores verification, as it provides rigorous mathematical proof of correctness that can guarantee the absence of bugs and errors in the design. Within the many initiatives of the RISC-V ecosystem, the RISC-V Formal framework by YosysHQ allows to apply formal verification to a RISC-V core. In this work formal verification was applied to the STRiVe2.4 core designed by STMicroelectronics, exploiting the RISC-V Formal framework. The implementation of the RISC-V Formal Interface (RVFI) was followed by the integration in the verification flow, using JasperGold to apply the formal checks to the core. The results obtained in this work demonstrate the potential of formal verification in bug hunting and trace the path for several possible developments. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Formal verification

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Proceedings of the international conference on application-specific Systems, Architectures and processors

Proceedings of the International Conference on Application-S...

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1993 international conference on application specific array processors, ASAP 1993

ISBN: (纸本)0818634928

The proceedings contain 62 papers. The topics discussed include: communication-minimal mapping of uniform loop nests onto distributed memory architectures;the Xor embedding: an embedding of hypercubes onto rings and toruses;resource constrained scheduling of uniform algorithms;mapping algorithms onto a multiple-chip data-driven array;scheduling partitioned algorithms on processor arrays with limited communication supports;parallel processing architectures for rank order and stack filters;a novel framework for multi-rate scheduling in DSP applications;efficient scalable architectures for Viterbi decoders;and a wavefront array processor for on the fly processing of digital video streams.

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Comparison between Single-Input and Multi-Input Classification with the application of Canny Feature Extraction and Classification Algorithms on the Toraja Buffalo Dataset 19

Comparison between Single-Input and Multi-Input Classificati...

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19th international conference on Ubiquitous Information Management and Communication, IMCOM 2025

作者： Manga, Abdul Rachman Nanda, Assyahrin Handayani, Anik Nur Herwanto, Heru Wahyu Asmara, Rosa Andrie Lantara, Dirgahayu Department of Computer Science Universitas Muslim Indonesia Makassar Indonesia Department of Electrical Engineering Universitas Negeri Malang Malang Indonesia Information Technology Department State Polytechnic of Malang Malang Indonesia Faculty of Industrial Engineering Universitas Muslim Indonesia Makassar Indonesia

ISBN: (纸本)9798331507817

Data classification plays a crucial role in artificial intelligence, particularly in enhancing model accuracy. This study focuses on classifying Toraja buffalo, a livestock breed with significant cultural importance in South Sulawesi, Indonesia. While the Single Input Approach is commonly used for classification, it often fails to capture all the necessary attributes to effectively distinguish between racial traits. Therefore, this research aims to evaluate the effectiveness of a multi-input approach, which integrates multiple data inputs to improve classification performance compared to the Single Input method. We employed four classification techniques: K-Nearest Neighbors (KNN), Support Vector Machine (SVM), Naïve Bayes, and Decision Tree, using both Single Input and Multi Input configurations. Model performance was assessed through Precision, Recall, F1 Score, and Accuracy metrics. The findings indicate that the Multi Input approach consistently outperformed the Single Input method. Notably, KNN achieved its best performance with Multi Input, recording an F1 Score of 0.7263 and an Accuracy of 0.7333, significantly surpassing the results obtained from Single Input. Similarly, SVM also demonstrated substantial performance enhancements with Multi Input. Overall, the study highlights the importance of incorporating a wider array of informative data to enhance the model's capability in accurately classifying specific categories, with KNN showing the most pronounced improvements. © 2025 IEEE.

关键词： Support vector machines

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