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11th international Workshop on Database and Expert Systems applications

作者： Lima, AAB Esperança, C Mattoso, M Univ Fed Rio de Janeiro Dept Comp Sci COPPE BR-21945970 Rio De Janeiro Brazil

ISBN: (纸本)0769506801

Spatial join is the most important and complex operation in spatial databases. Therefore, there is a lot of ongoing research presenting algorithms and data structures to efficiently process spatial joins. ill this work we present a parallel solution for spatial join processing with a dynamic load balance strategy. We have implemented PMR-Quadtrees [14] on top of persistent object structures using an Object Oriented Database Server.

关键词： Computer science Data structures Database systems Load management Memory architecture Object oriented databases parallel architectures parallel processing Scalability Spatial databases

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Cache Sharing Management for Performance Fairness in Chip Multiprocessors 09

Cache Sharing Management for Performance Fairness in Chip Mu...

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18th international conference on parallel architectures and Compilation Techniques

作者： Zhou, Xing Chen, Wenguang Zheng, Weimin Tsinghua Univ Dept Comp Sci & Technol Beijing 100084 Peoples R China

ISBN: (纸本)9780769537719

Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the most important shared resources because off-chip request latency may take a significant part of total execution cycles for data intensive applications. Instead of enforcing performance fairness directly, prior work addressing fairness issue of cache sharing mainly focuses on the fairness metrics of cache miss numbers or miss rates. However, because of the variation of cache miss penalty, fairness on cache miss cannot guarantee performance fairness. Cache sharing management which directly addresses performance fairness is needed for CMP systems. This paper introduces a model to analyze the performance impact of cache sharing, and proposes a mechanism of cache sharing management to provide performance fairness for concurrently executing applications. The proposed mechanism monitors the actual penalty of all cache misses and dynamically estimates the cache misses with dedicated caches when the applications are actually running with a shared cache. The estimated relative slowdown for each core, from dedicated environment to shared environment is used to guide cache sharing in order to guarantee performance fairness. The experiment results show that the proposed mechanism always improves the performance fairness metric, and can provide no worse throughput than the scenario without any management mechanism.

关键词： Delay Performance analysis Resource management Throughput Hardware parallel architectures conference management Technology management Computer science Application software

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Deep jam: Conversion of coarse-grain parallelism to instruction-level and vector parallelism for irregular applications 05

Deep jam: Conversion of coarse-grain parallelism to instruct...

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14th international conference on parallel architectures and Compilation Techniques

作者： Carribault, P Cohen, A Jalby, W Bull SA Les Clayes Sous Bois France

ISBN: (纸本)076952429X

A number of compute-intensive applications suffer from performance loss due to the lack of instruction-level parallelism in sequences of dependent instructions. This is particularly accurate on wide-issue architectures with large register banks, when the memory hierarch), (locality and bandwidth) is not the dominant bottleneck. We consider two real applications from computational biology and from crymanalysis, characterized by long sequences of dependent instructions, irregular control-flow and intricate scalar and array dependence patterns. Although these applications exhibit excellent memory locality and branch-prediction behavior state-of-the-art loop transformations and back-end optimizations are unable to exploit much instruction-level parallelism. We show that good speedups can be achieved through deep jam, a new transformation of the program control- and data-flow. Deep jam combines scalar and array renaming with a generalized form of recursive unroll-and-jam;it brings together independent instructions across irregular control structures, removing memorybased dependences. This optimization contributes to the extraction offine-grain parallelism in irregular applications. We propose a feedback-directed deep jam algorithm, selecting a jamming strategy, function of the architecture and application charactristics.

关键词： parallel processing Sequences Biology computing Computer aided instruction Computer applications Concurrent computing Performance loss Computer architecture Registers Bandwidth

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Exploring the Use of Remote GPU Virtualization in Low-Power Systems for Bioinformatics applications 18

Exploring the Use of Remote GPU Virtualization in Low-Power ...

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47th international conference on parallel Processing (ICPP) / international Workshop on Embedded Multicore Systems (EMS)

作者： Reano, Carlos Prades, Javier Silla, Federico Univ Politecn Valencia Valencia Spain

ISBN: (纸本)9781450365239

The large power requirements of current High-Performance Computing (HPC) deployments has motivated that several supercomputers and research proposals consider the use of low-power processor architectures instead of the traditional mainstream, but power hungry, x86 designs. However, many of these proposals do not consider the use of GPUs (Graphics Processing Units). GPUs are power efficient devices while in use and, therefore, considering them is aligned with the power-efficiency efforts that motivated the use of low-power processors. In this paper we explore the use of GPUs in several low-power processor architectures in the context of the bioinformatics domain. To that end, we make use of the rCUDA remote GPU virtualization middleware to provide these low-power systems with access to GPU accelerators. In this study we leverage three different low-power processor architectures to execute three bioinformatics applications. The result of this exploration is that the Xeon D processor architecture is well suited for this purpose whereas other low-power architectures such as the Atom or ARM ones still need to be improved.

关键词： CUDA rCUDA low-power processors bioinformatics applications GPU virtualization

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Rotated parallel Mapping: A Novel Approach for Mapping Data parallel applications on CGRAs

Rotated Parallel Mapping: A Novel Approach for Mapping Data ...

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2014 international conference on Reconfigurable Computing and FAGAs

作者： Schulz, Simon Bringmann, Oliver Schweizer, Thomas Rosenstiel, Wolfgang Univ Tubingen Fac Sci Embedded Syst D-72076 Tubingen Germany Univ Tubingen Fac Sci Comp Engn D-72076 Tubingen Germany

ISBN: (纸本)9781479959440

In this paper we present a new way of mapping data-parallel applications on coarse-grained reconfigurable architectures (CGRAs) to increase their performance. Traditional mapping approaches aim to map an application to a minimum number of contexts. In this work we gave up this idea. We propose to use the temporal domain with multiple contexts, as the preferred mapping domain. The benefit of this approach is that enough free resources are made accessible for a parallel execution of a datapath, which enables a higher utilization of a CGRA's resources, and thus a performance increase can be achieved. To show the validity of the proposed method, the speedup of various applications is evaluated using both, theoretical and experimental studies. The results show a performance improvement of up to 122% when compared to traditional application mapping techniques.

关键词： parallel processing reconfigurable architectures CGRA coarse-grained reconfigurable architectures data parallel applications datapath parallel execution rotated parallel mapping Context Delays Equations Kernel Pipeline processing Registers Routing

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Mining of association rules in very large databases: A structured parallel approach

Mining of association rules in very large databases: A struc...

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5th international Euro-Par conference

作者： Becuzzi, P Coppola, M Vanneschi, M Univ Pisa Dipartimento Informat I-56100 Pisa Italy

ISBN: (纸本)3540664432

Newer and newer parallel architectures being developed raise a strong demand for high-level and programmer-friendly parallel tools. We show some results regarding mining of association rules, a well-known Data Mining algorithm, which we ported from sequential to parallel within the PQE2000/SkIE environment. The main goals achieved are the low effort spent in parallelizing the code, the machine independence of the application produced, source code portability and performance portability. Here we report test results for the same parallel program on three different architectures.

关键词： parallel architectures

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ESTIMATION OF EXECUTION TIMES ON HETEROGENEOUS SUPERCOMPUTER architectures

ESTIMATION OF EXECUTION TIMES ON HETEROGENEOUS SUPERCOMPUTER...

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1993 international conference on parallel Processing

作者： YANG, JY AHMAD, I GHAFOOR, A PURDUE UNIV SCH ELECT ENGNW LAFAYETTEIN 47907

ISBN: (纸本)0849389844

For managing tasks efficiently in a Distributed Het erogeneous Supercomputing System (DHSS) , we re quire a thorough understanding of applications and their intelligent scheduling within the system. For this purpose, an accurate estimation of the execu tion time of applications on various architectures is needed. In this paper we present a framework to ad dress this issue. We propose two techniques, called augmented code profiling and augmented analytical benchmarking, to characterize applications and archi tectures in a DHSS, respectively. These techniques are based on code profiling and analytical benchmarking, respectively and provide a detailed architectural-dependent characterization of DHSS applications. © 1993 IEEE.

关键词： Benchmarking

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Kinematics of the translational 3-URC mechanism

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JOURNAL OF MECHANICAL DESIGN 2004年第6期126卷 1113-1117页

作者： Di Gregorio, R Univ Ferrara Dept Engn I-44100 Ferrara Italy

The use of less than six degrees of freedom (dof) mechanisms instead of six-dof ones is always recommended when the application makes it possible, since their architectures and control are simpler to manufacture and implement respectively. Three-dof mechanisms constitute an important subset of less-than-six-dof mechanisms, since either translational or spherical motion can be obtained through three-dof spatial mechanisms and many industrial applications require the only translational or spherical motion. This paper presents a new translational parallel mechanism (TPM), named translational 3-URC The new mechanism belongs to the parallel architectures with 3-URC topology, which contain another architecture that is a spherical parallel wrist. The proposed TPM is not overconstrained and has three equal legs whose kinematic pairs are three revolute pairs and one passive cylindrical pair per leg. Its actuated pairs are three revolute pair located on the frame. The position and velocity analyses of the translational 3-URC will be addressed and solved. Its singularity conditions will be written in explicit form and geometrically interpreted.

关键词： third-party maintenance ARCHITECTURE Building construction Sphericity six degrees of freedom Industrial applications revolute pair Translation Process kinematics kinematic pair Leg Translation parallel architectures

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Exploiting coarse grained parallelism in database applications

Exploiting coarse grained parallelism in database applicatio...

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PARBASE-90: international conference on databases, parallel architectures, and Their applications

作者： Grimshaw, A.S. Pfaltz, J.L. French, J.C. Son, S.H. Univ of Virginia Dep of Comput Sci Charlottesville VA USA

An approach to exploiting coarse-grained parallelism in database applications is presented. This approach combines the database facilities of ADAMS with the dependency detection and parallel execution facilities of Mentat. The approach to providing mode-two parallelism is to make changes behind the ADAMS language interface, thus insulating users from the changes in operating environment. In addition, by merging with a mature parallel/distributed computing technology, it has been possible to capitalize on existing software to provide these facilities and avoid building them from scratch.

关键词： Database Systems

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parallelization, optimization, and performance analysis of portfolio choice models

Parallelization, optimization, and performance analysis of p...

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30th international conference on parallel Processing (ICPP 01)

作者： Abdelkhalek, A Bilas, A Michaelides, A Univ Toronto Dept Elect & Comp Engn Toronto ON M5S 3G4 Canada

ISBN: (纸本)0769512585

In this work we show how applications in computational economics can take advantage of modern parallel architectures to reduce the computation time in a wide array of models that have been, to date, computationally intractable. The specific application we use computes the optimal consumption and portfolio choice policy rules over the life-cycle of the individual. Our goal is two-fold. (i) To understand the behavior of a class of emerging applications and provide an efficient parallel implementation and (ii) to introduce a new benchmark for parallel computer architectures from an emerging and important class of applications. We start from an existing sequential algorithm for solving a portfolio choice model. We present a number of optimizations that result in highly optimized sequential code. We then present a parallel version of the application. We find that: (i) Emerging applications in this area of computational economics exhibit adequate parallelism to achieve, after a number of optimization steps, almost linear speedup for system sizes up to 64 processors. (ii) The main challenges in dealing with applications in this area are computational imbalances introduced by algorithmic dependencies and the parallelization method and granularity (iii) We present preliminary results for a problem that has not been, to the best of our knowledge, solved in the financial economics literature to date.

关键词： Application software Asset management Computer applications Concurrent computing Educational institutions Environmental economics Investments parallel architectures Performance analysis Portfolios

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