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检索条件"任意字段=International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"

共 2730 条记录，以下是201-210 订阅

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Black Box ESL Power Estimation for Loosely-Timed TLM Models 16

Black Box ESL Power Estimation for Loosely-Timed TLM Models

引用

international conference on embedded computer systems - architectures, modeling and simulation (SAMOS)

作者： Onnebrink, Gereon Leupers, Rainer Ascheid, Gerd Schuermans, Stefan Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst Aachen Germany Silexica Software Solut GmbH Aachen Germany

ISBN: (纸本)9781509030767

Design space exploration (DSE) at system level needs to cover all parameters and has to find the best trade-off between performance and power of modern heterogeneous multi- and many-processor SoCs (MPSoC). Modelling virtual platforms with SystemC TLM offers fast HW and SW co-design using the loosely-timed (LT) coding style. However, simulations at this high abstraction level lack the capability of providing power estimates in case no insight into the models of the virtual platform is possible. This paper extends a well-proven black box power estimation methodology. The proposed method is capable of estimating the power with high accuracy using fast LT modelling. Two case studies reveal average estimation errors of just 5.1% and 3.5% for the ARM Cortex-A9 on the PandaBoard and the Blackfin 609 DSP on the FinBoard, respectively.

关键词： System-on-chip

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CARROT - A tool for fast and accurate soft error rate estimation

CARROT - A tool for fast and accurate soft error rate estima...

引用

6th international Workshop on embedded computer systems - architectures, modeling and simulation

作者： Bountas, Dimitrios Stamoulis, Georgios I. Univ Thessaly Dept Comp & Commun Engn Volos 38221 Greece

ISBN: (纸本)3540364102

We present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.

关键词： SER combinational circuits simulation

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Learning-based Analytical Cross-Platform Performance Prediction 15

Learning-based Analytical Cross-Platform Performance Predict...

引用

international conference on embedded computer systems architectures modeling and simulation

作者： Zheng, Xinnian Ravikumar, Pradeep John, Lizy K. Gerstlauer, Andreas Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781467373111

As modern processors are becoming increasingly complex, fast and accurate performance prediction is crucial during the early phases of hardware and software co-development. To accurately and efficiently predict the performance of a given software workload is, however, a challenging problem. Traditional cycle-accurate simulation is often too slow, while analytical models are not sufficiently accurate or still require target-specific execution statistics that may be slow or difficult to obtain. In this paper, we propose a novel learning-based approach for synthesizing analytical models that can accurately predict the performance of a workload on a target platform from various performance statistics obtained directly on a host platform using built-in hardware counters. Our learning approach relies on a one-time training phase using a cycle-accurate reference of the chosen target processor. We train our models on over 15,000 program instances from the ACM-ICPC programming contest database, and demonstrate the prediction accuracy on standard benchmark suites. Result show that our approach achieves on average more than 90% accuracy at 160x the speed compared to a cycle-accurate reference simulation.

关键词： performance prediction ANALYSIS MODELS Workload standardized benchmark computer hardware PROCESSOR

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Removal of unnecessary context switches from the systemc simulation kernel for fast VP simulation

Removal of unnecessary context switches from the systemc sim...

引用

2011 11th international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2011

作者： Lu, Kun Müller-Gritschneder, Daniel Schlichtmann, Ulf Institute for Electronic Design Automation Technische Universität München Munich Germany

ISBN: (纸本)9781457708008

Virtual prototypes are widely employed in today's development of embedded hardware and software. To model and simulate the VPs, SystemC has been adopted as a standard language tool. With SystemC, hardware modules and software codes can be modeled as processes. To model concurrency, one process can be suspended and then the SystemC scheduler selects the next process to resume. This is also known as context switching. Context switching can consume a large portion of simulation time and decrease the simulation performance heavily. In this paper, a method is proposed to avoid unnecessary context switches. It achieves this by taking concurrency into account to determine the necessity of a context switch. The case study shows that, by applying the method, performance could be increased significantly without any loss in simulation accuracy. © 2011 IEEE.

关键词： computer software

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Out-Of-Order Execution of Synchronous Data-Flow Networks

Out-Of-Order Execution of Synchronous Data-Flow Networks

引用

international conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)

作者： Baudisch, Daniel Brandt, Jens Schneider, Klaus Univ Kaiserslautern Dept Comp Sci Embedded Syst Grp D-67663 Kaiserslautern Germany

ISBN: (纸本)9781467322973;9781467322966

Data flow process networks (DPNs) have been introduced as a convenient model of computation for distributed and asynchronous systems since each process node can work independently of the other nodes, i.e. without the need of a global coordination. Synchronous and cyclo-static data flow process networks even allow to derive at compile-time efficient static schedules that allow one to run these systems with an efficient use of available resources, e. g. in embedded systems. Single process nodes of DPNs are stream-based computing devices that transform input streams to uniquely defined corresponding output streams such that single values of the output streams are computed as soon as sufficient input values are available. In this sense, they are related to the execution of an instruction stream by a conventional microprocessor. In this paper, we show how out-of-order execution that has been introduced for the efficient use of multiple functional units in microprocessors can also be used for the implementation of DPNs on multiprocessors. This way, the implementation of DPNs on multiprocessors allows one to optimize the throughput of single process nodes, and as shown by our experiments, also of the entire DPN.

关键词： NAD Legal Executions instruction flow Multiprocessor macroprocessor output stream data flow streams rivers Ganglia

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An analysis of dynamics of CA3b in Hippocampus 14

An analysis of dynamics of CA3b in Hippocampus

引用

international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Keshavarz-Hedayati, B. Dimopoulos, N. J. Babul, A. Univ Victoria Dept Elect & Comp Engn Victoria BC V8W 2Y2 Canada Univ Victoria Dept Phys & Astron Victoria BC V8W 2Y2 Canada

ISBN: (纸本)9781479937707

In this paper we will present a computational model of area CA3b in Hippocampus and through simulations show that this system is capable of sustaining a rhythm without any external input using only a small portion of its population. The model proposed here was devised using the biological data available on CA3. Our simulations have shown that the rhythmic emergent behaviour is sustainable and that we can alter its characteristics (i.e. spectrum) by altering the overall physical characteristics of the network such as the overall size of the structure itself or the extent of the connectivity field.

关键词： Hippocampus external input Biological data simulating dynamics CA3 gene Computational modeling overall sizes Spectra Physical characteristics Rhythms

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MPSoCBench: A Toolset for MPSoC System Level Evaluation 14

MPSoCBench: A Toolset for MPSoC System Level Evaluation

引用

international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Duenha, Liana Guedes, Marcelo Almeida, Henrique Boy, Matheus Azevedo, Rodolfo Inst Comp Sci UNICAMP Campinas SP Brazil

ISBN: (纸本)9781479937707

Recent design methodologies and tools aim at enhancing the design productivity by providing a software development platform before defining the final MPSoC architecture details. However, the simulation can only be efficiently performed when using a modeling and simulation engine that supports the system behavior description in a high abstraction level. The lack of MPSoC virtual platform prototyping integrating both scalable hardware and software in order to create and evaluate new methodologies and tools motivated us to develop MPSoCBench. This toolset is a scalable set of MPSoCs including four different ISAs (PowerPC, MIPS, SPARC, and ARM) organized in platforms with 1, 2, 4, 8, 16, 32, or 64 cores, cross-compilers, IPs, interconnections, and 17 parallel version of software from well-known benchmarks. This tool also provides power consumption estimation for MIPS and SPARC processors. The MPSoCBench sums 864 different configurations automated through scripts.

关键词： computer software Osteonectin scalable processor architecture Platform Scripts system level EQUIPMENT Scalability development platform multiprocessor system on chip PowerPC

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A streaming machine description and programming model

引用

international conference on embedded computer systems - architectures, modeling and simulation

作者： Carpenter, Paul Rodenas, David Martorell, Xavier Ramirez, Alex Ayguade, Eduard Barcelona Supercomp Ctr Barcelona Spain

ISBN: (纸本)9783540736226

In this paper we present the initial development of a streaming environment based on a programming model and machine description. The stream programming model consists of an extension to the C language and it's translation towards a streaming machine. The extensions will be a set of OpenMP-like directives. We show how a serial application can be converted into a streaming parallel application using the proposed annotations. We also show how the machine description can be used to parametrize a cost-model simulator to predict the performance of the stream program. The cost model allows the compiler to determine the best task partitioning and scheduling for each architecture.

关键词： computer systems

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The TEXTAROSSA Approach to Thermal Control of Future HPC systems 22nd

The TEXTAROSSA Approach to Thermal Control of Future HPC Sys...

引用

22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Fornaciari, William Terraneo, Federico Agosta, Giovanni Giuseppe, Zummo Saraceno, Luca Lancione, Giorgia Gregori, Daniele Celino, Massimo Politecn Milan Milan Italy Quattro Srl Rome Italy E4 Comp Engn SpA Scandiano Italy Agenzia Nazl Nuove Tecnol Energia & Sviluppo Econ Rome Italy

ISBN: (纸本)9783031150746;9783031150739

Thermal control is a key aspect of large-scale HPC centers, where a large number of computing elements is employed. Temperature is directly related to both reliability, as excessing heating of components leads to a shorter lifespan and increased fault probability, and power efficiency, since a large fragment of power is used in the cooling system itself. In this paper, we introduce the TEXTAROSSA approach to thermal control, which couples innovative two-phase cooling with multi-level thermal control strategies able to address thermal issues at system and node level.

关键词： High Performance Computing 2-phase cooling Thermal modeling and control

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Probabilistic modelling and evaluation of soft real-time embedded systems

Probabilistic modelling and evaluation of soft real-time emb...

引用

6th international Workshop on embedded computer systems - architectures, modeling and simulation

作者： Florescu, Oana de Hoon, Menno Voeten, Jeroen Corporaal, Henk Eindhoven Univ Technol NL-5600 MB Eindhoven Netherlands

ISBN: (纸本)3540364102

Soft real-time systems are often analysed using hard realtime techniques, which are not suitable to take into account the deadline misses rate allowed in such systems. Therefore, the resulting system is over-dimensioned, thus expensive. To appropriately dimension soft real-time systems, adequate models, capturing their varying runtime behaviour, are needed. By using the concepts of a mathematically defined language, we provide a modelling approach based on patterns that are able to express the variations appearing in the system timing behaviour. Based on these modelling patterns, models can be easily created and are amenable to average case performance evaluation. By the means of a case study, we show the type of results that can be obtained from such an evaluation and how these results are used to dimension the system.

关键词： embedded systems

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