The proceedings contain 23 papers. The special focus in this conference is on Performance, Evolution, Development, modeling and Timing. The topics include: Looking for better integration of design and performance engi...
ISBN:
(纸本)3540405399
The proceedings contain 23 papers. The special focus in this conference is on Performance, Evolution, Development, modeling and Timing. The topics include: Looking for better integration of design and performance engineering;scenario-based performance engineering with UCMNAV;using SDL for modeling behavior composition;industrial application of the SDL-pattern approach in UMTS call processing development;experience and quantitative assessment;synthesizing SDL from use case maps;enhanced SDL subset for the design and implementation of java-enabled embedded signalling systems;generating a compiler for SDL from the formal language definition;modelling and evaluation of a network on chip architecture using SDL;formalizing graphical service descriptions using SDL;specification and simulation of real time concurrent systems using standard SDL tools;validating the interval timed extension for SDL with an industrial-size multicast protocol;using projections for the detection of anomalous behaviors;applying mutation analysis to SDL specifications;automatic formal model generation and analysis of SDL;applying SDL to formal analysis of security systems;modeling IETF session initiation protocol and its services in SDL;automated generation of marshaling code from high-level specifications and the winning entry of the SAM 2002 design contest.
In this work we present a predictive analytical model that encompasses the performance and scaling characteristics of a non-deterministic particle transport application, MCNP. Previous studies on the scalability of pa...
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ISBN:
(纸本)3540401962
In this work we present a predictive analytical model that encompasses the performance and scaling characteristics of a non-deterministic particle transport application, MCNP. Previous studies on the scalability of parallel Monte Carlo eigenvalue calculations have been rather general in nature [1]. It can be used for the simulation of neutron, photon, electron, or coupled transport, and has found uses in many problem areas. The performance model is validated against measurements on an AlphaServer ES40 system showing high accuracy across many processor/problem combinations. It is parametric with both application characteristics (e.g. problem size), and system characteristics (e.g. communication latency, bandwidth, achieved processing rate) serving as input. The model is used to provide insight into the achievable performance that should be possible on systems containing thousands of processors and to quantify the impact that possible improvements in sub-system performance may have. In addition, the impact on performance of modifying the communication structure of the code is also quantified.
modeling plays a central role in system engineering. It significantly reduces costs and efforts in the design by providing developers with means for cheaper and more relevant experimentations. So, design choices can b...
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modeling plays a central role in system engineering. It significantly reduces costs and efforts in the design by providing developers with means for cheaper and more relevant experimentations. So, design choices can be assessed earlier. The use of a formalism, such as the synchronous language SIGNAL which relies on solid mathematical foundations for the modeling, allows validation. This is the aim of the methodology defined for the design of embeddedsystems where emphasis is put on formal techniques for verification, analysis, and code generation. This paper mainly focuses on the modeling of architecture components using SIGNAL. For illustration, we consider the modeling of a bounded FIFO queue, which is intended to be used for communication protocols. We bring out the capabilities of SIGNAL to allow specifications in an elegant way, and we check few elementary properties on the resulting model for correctness.
We present an approach to the automatic derivation of executable process network specifications from weakly dynamic applications. We introduce the notions of dynamic single assignment code, approximated dependence gra...
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ISBN:
(纸本)9781581137422
We present an approach to the automatic derivation of executable process network specifications from weakly dynamic applications. We introduce the notions of dynamic single assignment code, approximated dependence graph, and linearly bounded sets to model and capture weakly dynamic (data-dependent) behavior of applications at the task-level of abstraction. Process networks are simple parallel processing models that match the emerging multiprocessor architectures in the sense that the mapping of process network specifications of applications onto multiprocessor architectures can be done in a systematic and transparent way.
This paper describes an integrated performance based modeling tool (PBMT) developed to facilitate the performance-based design of hardware/software systems. It is used to aid in a senior level design project and other...
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This paper describes an integrated performance based modeling tool (PBMT) developed to facilitate the performance-based design of hardware/software systems. It is used to aid in a senior level design project and other design exercises. Task graphs are specified as control flow and/or dataflow with the ability to model real-time applications. The application model is executed on a variety of SystemC architectures for performance analysis.
With the ever increasing complexity of embedded control systems, design and implementation have to fulfill demanding requirements with respect to functionality, timing, reliability, cost, safety and security. To meet ...
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With the ever increasing complexity of embedded control systems, design and implementation have to fulfill demanding requirements with respect to functionality, timing, reliability, cost, safety and security. To meet these requirements, an integrated development environment based on an extended UML is designed. It aims at providing a comprehensive set of methods and tools for all development phases of complex embedded control systems. For the environment to be fully integrated, the gaps between the applicability of UML models for proper modeling as well as for validation, verification, simulation and code generation need to be filled. To enable domain-specific specification, in form of profiles UML is enhanced by comprehensive sets of constructs addressing the aspects real time, distribution and safety characteristic for embedded control systems. Corresponding models should automatically be translated to several other model notations. Here, a UML profile for simulation models is defined, which is process-oriented and based on extensions of UML oriented at PEARL for distributed systems and real-time extensions of UML statecharts which enable to simulate real-time constraints. This UML profile is expected to automatically translate UML models into simulation models described as XML documents, utilising existing model analysis tools for quantitative system analysis without the need for individual complex and expensive formal modeling.
The proceedings contain 101 papers. The special focus in this conference is on Move to Meaningful Internet systems. The topics include: On enhancing component-based middleware with transactions;online consistency chec...
ISBN:
(纸本)9783540204947
The proceedings contain 101 papers. The special focus in this conference is on Move to Meaningful Internet systems. The topics include: On enhancing component-based middleware with transactions;online consistency checking for replicated objects;integrating container services with pluggable system extensions;a full scope simulator for nuclear power plants;a declaratively configurable java based framework for resource aware object mobility;trading freshness for performance in a cluster of replicated databases;regarding the integration of collaborative applications into virtual worlds;workflow reconfiguration using chains;modeling semistructured data by using graph-based constraints;a graph-based model for semistructured temporal data;a formal approach to knowledge base comparison and interoperability;a web-based learning system for content-based lecture retrieval;a formalism of contextualized predicate calculus for information integration;an ontology based visual tool for query formulation support;revaluation of a large-scale thesaurus for multi-media indexing;on storing and querying xml data within network-enabled embeddedsystems;an object-oriented invocation layer for the java message service;an approach to the process maps based on semantic web methodologies;modelling organic adaptable service-oriented enterprise architectures;towards a semantic integration of medical relational databases by using ontologies;designing ontology-based interactive information retrieval interfaces;usability issues confronting mobile devices as internet interfaces for general purpose and an interactive visualization technique for exploring an annotated image collection navigation.
Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead makes such usage of compiler optimizatio...
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Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead makes such usage of compiler optimizations impractical especially for large applications. We propose a hybrid compiled simulation approach that is simple, generates an optimized decoder and has almost no compilation overhead comparing to static compiled simulation. Using two contemporary processor models- ARM7 and Sparc- we demonstrated that our technique can reduce the compilation time by 99% on the average, from several thousands of seconds to only tens of seconds.
Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance metric due to nondeterministic program...
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ISBN:
(纸本)9780769520216
Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance metric due to nondeterministic program behavior. Unfortunately, invalidating IPC as a performance metric introduces its own host of difficulties: special workload setup, consideration of cold-start and end-effects, statistical methodologies leading to increased simulation bandwidth, and workload-specific, higher-level metrics to measure performance. We explore the nondeterminism problem in multithreaded programs, describe a method to eliminate nondeterminism across simulations of different experimental machine models, and demonstrates the suitability of this methodology for performing architectural performance analysis, thus redeeming IPC as a performance metric for multithreaded programs.
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