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检索条件"任意字段=International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"

共 2731 条记录，以下是2351-2360 订阅

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Proceedings: 2002 IEEE international Symposium on Circuits and systems

Proceedings: 2002 IEEE International Symposium on Circuits a...

引用

2002 IEEE international Symposium on Circuits and systems

This Volume 5 of 5 of the conference proceedings contains 218 papers. Topics discussed include communication theory, power systems, current-mode circuits, analog computing and neuromorphic circuits, electronic design for quality, VLSI circuits, video architectures, comparators, tuning circuits, biomedical circuits, nanoelectronics, mixed signal circuit and device modeling, image processing, integrated power electronics and power measurements, multirate systems and coding, nonlinear phenomena in oscillators, verification, adaptive systems, communication circuits, floating gate circuits, embedded system synthesis and optimization, modeling, simulation and design of power electronics circuits, VLSI architectures sample and hold circuits, tuning circuits, wireless multimedia transmission and packetization, noise modeling and minimization, detection, power systems, digital circuits, wireless LANs architectures, fundamental computer aided design algorithms, finite field and Reed-Solomon architectures, configurable systems, power electronics circuits and systems and nanoelectronics.

关键词： Electric network analysis

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Cooperative computing for distributed embedded systems

Cooperative computing for distributed embedded systems

引用

22nd international conference on Distributed Computing systems

作者： Borcea, C Iyer, D Kang, PL Saxena, A Iftode, L Rutgers State Univ Div Comp & Informat Sci Piscataway NJ 08854 USA

ISBN: (纸本)0769515851

The next generation of computing systems will be embedded, in a virtually unbounded number, and dynamically connected. The current software, network architectures, and their associated programming models are not suitable for this scenario. This paper presents a distributed computing model, Cooperative Computing, and the Smart Messages architecture for programming large networks of embedded systems. In Cooperative Computing, distributed applications are dynamic collections of migratory execution units, called Smart Messages, working to achieve a common goal. Virtually any user-defined distributed application can be implemented using our model. We present preliminary results for our prototype implementation as well as simulation results for two previously proposed applications for sensor networks, Directed Diffusion and SPIN, implemented using Smart Messages.

关键词： computer supported cooperative work

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Optimization of a retargetable functional simulator for embedded processors 9

Optimization of a retargetable functional simulator for embe...

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9th Annual IEEE international conference and Workshop on the Engineering of computer-Based systems (ECBS 2002)

作者： Papariello, F Luculli, G STMicroelectronics Adv Syst Technol Grenoble France

ISBN: (纸本)0769515509

The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this paper proposes a new instruction-set simulator's tool flow which has been extended with some retargetability features and multiple program representations. We propose an innovative way to improve the simulation speed, that is a key factor for embedded software optimization, by using a synthesis approach. In depth description is reported of the source-level optimization of the simulation library which is an important part of such new mechanism. Experimental results show a speedup of about 24 for the throughput of the simulation library, reaching the valuable performance of 50 Mops.

关键词： Computational modeling Design optimization embedded software Hardware Instruction sets Optimization methods Process design Software design Software libraries System-on-a-chip

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High performance multiprocessor architecture design methodology for application-specific embedded systems 1

引用

9th international conference on High Performance Computing, HiPC 2002

作者： Saif Abrar, Syed Embedded Processor Dept. Philips Semiconductors Bangalore India

ISBN: (数字)9783540362654

ISBN: (纸本)3540003037

This paper presents a methodology for the design of application-specific multiprocessor systems. The methodology, named AIM, guides a designer to select the right heterogeneous architecture starting from a set of target applications. The methodology distinguishes between applications and architectures that are modeled as Kahn Process Networks and cycle-accurate bit-true models, respectively. A gradual mapping of applications over architectures is defined to analyze the performance of the resulting system by simulation. As a consequence, functionally complete system is always available with the designer without the overwhelming issues related with the multiprocessor architectures. The described methodology is illustrated through the design of a multiprocessor architecture for an MPEG-1 audio decoder application. © Springer-Verlag Berlin Heidelberg 2002.

关键词： embedded systems

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Synthesis of customized loop caches for core-based embedded systems 02

Synthesis of customized loop caches for core-based embedded ...

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international conference on computer-Aided Design

作者： Cotterell, S Vahid, F Univ Calif Riverside Dept Comp Sci & Engn Riverside CA 92521 USA

ISBN: (纸本)0780376072

embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially reduce instruction fetch energy. However, loop caches come in many sizes and variations - using the configuration best on the average may actually result in worsened energy for a specific program. We therefore introduce a loop cache exploration tool that analyzes a particular program's profile, rapidly explores the possible configurations, and generates the configuration with the greatest power savings. We introduce a simulation-based approach and show the good energy savings that a customized loop cache yields. We also introduce a fast estimation-based approach that obtains nearly the same results in seconds rather than tens of minutes or hours.

关键词： low power low energy tuning loop cache embedded systems instruction fetching customized architectures memory hierarchy estimation synthesis architecture tuning

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An application using an open systems architecture for avionics development, testing, and real time manned simulation

An application using an open systems architecture for avioni...

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AIAA modeling and simulation Technologies conference and Exhibit 2002

作者： Bezdek, William J. Bankhead, Janet E. Kolta, Jessica Trapp, Theresa The Boeing Company St. Louis MO United States Aviant St. Louis MO United States

ISBN: (纸本)9781624101212

The current generation of aircraft has many specialized computer systems for control of the aircraft and the onboard systems to support the mission. Typically, many of these computer systems are very specialized along with the software that operates on them. The trend is to transition to more general-purpose hardware, open system architectures, and higher order computer languages. The objective of this paper is to investigate the ability to use embedded avionics code and displays directly on different types of general-purpose computers and integrate them with traditional real time manned simulators to prototype new concepts. New weapon system concepts are often developed using rapid prototyping techniques and tested by flight crews using real time simulation. The computer code written for those activities is often done in C++, FORTRAN, or other languages and uses OpenGL or other software for the displays. The cockpit used for this research represents many low-cost engineering development simulators and is called the Reconfigurable Manned Interactive Crew Station (RMICS) simulator. The RMICS consists of flight hardware grips, a display surface showing the virtual cockpit layout with embedded avionics displays, and a separate out-thewindow display with an embedded Head-Up Display (HUD). The proposed avionics and weapon system changes are rapidly prototyped and flown by operational pilots in the simulator to help develop, evaluate, and refine the requirements using representative mission scenarios. At the conclusion of the rapid prototyping phase, the requirements are passed along to the embedded avionics software designers, which develop and test the embedded avionics software and displays. Recently, this development has transitioned from a few workstations to smaller systems on the engineer's desk to develop and test the code. In addition, the trend is to develop displays using a high level graphical tool, such as the Virtual Avionics Prototyping System (VAPS). By us

关键词： Codes (symbols)

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embedded operating system energy analysis and macro-modeling

Embedded operating system energy analysis and macro-modeling

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20th IEEE international conference on computer Design

作者： Tan, TK Raghunathan, A Jha, NK Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)0769517005;0769517013

A large and increasing number of modern embedded systems are subject to tight power/energy constraints. It has been demonstrated that the operating system (OS) can have a significant impact on the energy efficiency of the embedded system. Hence, analysis of the energy effects of the OS is of great importance. Conventional approaches to energy analysis of the OS (and embedded software, in general) require the application software to be completely developed and integrated with the system software, and that either measurement on a hardware prototype or detailed simulation of the entire system be performed. Since this process requires significant design effort, unfortunately, it is typically too late in the design cycle to perform high-level or architectural optimizations on the embedded software, restricting the scope of power savings. Our work recognizes the need to provide embedded software designers with feedback about the effect of different OS services on energy consumption early in the design cycle. As a first step in that direction, this paper presents a systematic methodology to perform energy analysis and macro-modeling of an embedded OS. Our energy macro-models provide software architects and developers with an intuitive model for the OS energy effects, since they directly associate energy consumption with OS services and primitives that are visible to the application software. Our methodology consists of (i) an analysis stage, where we identify a set of energy components, called energy characteristics, which are useful to the designer in making OS-related design trade-offs, and (ii) a subsequent macromodeling stage, where we collect data for the identified energy components and automatically derive macro-models for them. We validate our methodology by deriving energy macro-models for two state-of-the-art embedded OS's, muC/OS and Linux OS.

关键词： embedded systems

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Proceeding of the 2002 international conference on computer-Aided Design

Proceeding of the 2002 International Conference on Computer-...

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IEEE/ACM international conference on computer Aided Design (ICCAD)

The proceedings contains 117 papers. Topics discussed include substrate modeling, design for low power, routing, advances in testing, high level synthesis, formal techniques for validation and synthesis, subthreshold leakage modeling and reduction techniques, timing-driven placement, inductance modeling, efficient simulation for analog and radio frequency, interconnect optimization, chip-level communication structures, density functional theory, system-level analog design, inductance modeling, circuits and systems, low power and transistor level optimization, statistical techniques for power and timing estimation, computer aided design computation for manufacturability, satisfiability checking, molecular electronics, circuit level analog computer aided design, physical effects in deep sub micron technology, verification at the switch, logic synthesis, memory issues in high level synthesis, noise effects on circuit operation, low level aware behavior synthesis, advances in timing analysis accuracy, customization of embedded system architectures, advances in combinatorial synthesis and system level performance and power modeling and optimization, model order reduction, advances in dynamic voltage scheduling and Boolean engines for formal hardware verification.

关键词： computer aided design

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Validating software pipelining optimizations

Validating software pipelining optimizations

引用

2002 international conference on Compilers, Architecture, and Synthesis for embedded systems, CASES '02

作者： Leviathan, Raya Pnueli, Amir Dept. of Computer Science Weizmann Institute of Science Israel

ISBN: (纸本)1581135750

The paper presents a method for translation validation of a specific optimization, software pipelining optimization, used to increase the instruction level parallelism in EPIC type of architectures. Using a methodology as in [15] to establish simulation relation between source and target based on computational induction, we describe an algorithm that automatically produces a set of decidable proof obligations. The paper also describes SPV, a prototype translation validator that automatically produces verification conditions for software pipelining optimizations of the SGI Pro-64 compiler. These verification conditions are further checked automatically by the CVC [12] checker. Copyright 2002 ACM.

关键词： Verification

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Design and evaluation of a multimedia computing architecture based on a 3D graphics pipeline

Design and evaluation of a multimedia computing architecture...

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13th IEEE international conference on Applications-Specific systems, architectures and Processors

作者： Chung, CY Managuli, RA Kim, Y Univ Washington Seattle WA 98195 USA

ISBN: (纸本)0769517129

With the innovation and integration of media objects in multimedia applications, the importance of architectural support for different types of media objects, e.g., image, video and graphics, in one platform has significantly increased. While several approaches based on vector or VLIW architectures, e.g., Vector-IRAM and Imagine, have been pursued, they are not as effective as dedicated graphics pipelines for high-performance 3D graphics. We have explored a new programmable computing architecture based on a 3D graphics pipeline, which utilizes dedicated hardware resources in the 3D graphics pipeline for other types of multimedia computing. Adding programmable flexibility to a graphics pipeline for texture mapping has proven to be effective, e.g., Pixel Shader. However, due to the diversity of imaging and video processing applications, there are several challenges associated with converting a fixed graphics pipeline to a flexible multimedia computing engine. In this paper, we identify the additional architectural requirements, introduce the proposed architecture with extension details, and present the results of the performance evaluation. With cycle-accurate simulation of several benchmark functions, we have verified that the proposed architecture outperforms a modem powerful mediaprocessor in imaging and video processing by a factor of 1.3 to 7.5. The 3D graphics performance would not change much because the additional pipeline stages for the extension result in longer pipeline latency but similar throughout.

关键词： Computational modeling computer architecture Engines Graphics Hardware Modems Multimedia computing Pipelines Technological innovation VLIW

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