This Volume 3 of 5 of the conference proceedings contains 225 papers. Topics discussed include global and local motion estimation, communication networks, adaptive signal processing, applications of chaos, communicati...
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This Volume 3 of 5 of the conference proceedings contains 225 papers. Topics discussed include global and local motion estimation, communication networks, adaptive signal processing, applications of chaos, communicating radio frequency circuits, neural networks, Nyquist data conversion, testing and verification, voltage controlled oscillators and phase locked loops, reference circuits, multimedia watermarking, frequency response masking techniques, VLSI circuit styles, wireless architecture, delta-sigma modulators, translinear and companding filters, vision chips, multidimensional signals and systems, digital circuits synthesis and optimization, video over networks, analysis, design and simulation of power electronics circuits, transforms and multirate systems, wireless LAN design, chaos and information processing, applications of digital signal processing in communications, network theory and linear systems, network theory and linear systems, VLSI arithmetic, modeling and analysis of nonlinear systems, low voltage amplifiers, advanced signal processing for MIMO systems, imaging architectures, delta-sigma modulators, circuit linearization, analog computing circuits, computational graph theory for computer and communication systems, device and interconnect modeling, video segmentation, DC switching mode power supplies, speech processing, rf filter design and implementation and chaotic communications and signal processing.
The next generation of computing systems will be embedded, in a virtually unbounded number, and dynamically connected. The current software, network architectures, and their associated programming models are not suita...
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The next generation of computing systems will be embedded, in a virtually unbounded number, and dynamically connected. The current software, network architectures, and their associated programming models are not suitable for this scenario. This paper presents a distributed computing model, Cooperative Computing, and the Smart Messages architecture for programming large networks of embeddedsystems. In Cooperative Computing, distributed applications are dynamic collections of migratory execution units, called Smart Messages, working to achieve a common goal. Virtually any user-defined distributed application can be implemented using our model. We present preliminary results for our prototype implementation as well as simulation results for two previously proposed applications for sensor networks, Directed Diffusion and SPIN, implemented using Smart Messages.
The proceedings contain 13 papers. The special focus in this conference is on Power-Aware Architecture/Microarchitecture and Power-Aware Real-Time systems. The topics include: A low power issue-execute processor;a low...
ISBN:
(纸本)3540010289
The proceedings contain 13 papers. The special focus in this conference is on Power-Aware Architecture/Microarchitecture and Power-Aware Real-Time systems. The topics include: A low power issue-execute processor;a low power instruction cache architecture exploiting execution footprints;a hardware architecture for dynamic performance and energy adaptation;multi-processor computer system having low power consumption;an integrated heuristic approach to power-aware real-time scheduling;power-aware task motion for enhancing dynamic range of embeddedsystems with renewable energy sources;a low-power content-adaptive texture mapping architecture for real-time 3D graphics;energy-driven statistical sampling;modeling of DRAM power control policies using deterministic and stochastic petri nets;an integrated simulation environment for performance evaluation of dynamic voltage scaling algorithms;application-supported device management for energy and performance;energy-efficient server clusters and a comparison of different compiler-directed dynamic voltage scheduling approaches.
The proceedings contain 34 papers. The special focus in this conference is on Object-Oriented Information systems. The topics include: Reuse in object-oriented information systems design;software reuse with use case p...
ISBN:
(纸本)9783540440888
The proceedings contain 34 papers. The special focus in this conference is on Object-Oriented Information systems. The topics include: Reuse in object-oriented information systems design;software reuse with use case patterns;promoting reuse through the capture of system description;a specification-oriented framework for information system user interfaces;the role of pattern languages in the instantiation of object-oriented frameworks;IS components with hyperclasses;Collaborative simulation by reuse of COTS simulators with a reflexive XML middleware1;efficient web-based information systems;semantic integration and query optimization of heterogeneous data sources*: (Invited Paper);“Real World” as an argument for covariant specialization in programming and modeling;extracting information from semi-structured web documents;object-oriented mediator queries to internet search engines;Warp-edge optimization in XPath;A caching system for web content generated from XML sources using XSLT;finding similar queries to satisfy searches based on query traces;WOnDA: An extensible multi-platform hypermedia design model;model-driven approaches to software development;executable and symbolic conformance tests for implementation models (position paper);object-oriented theories for model driven architecture;systems engineering foundations of software systems integration;maintaining class membership information;Using the model paradigm for real-time systems development: ACCORD/UML;generating enterprise applications from models;tool support for aspect-oriented design;model-driven architecture;model-based development of embeddedsystems;hierarchies in object oriented conceptual modeling;specialization/generalization in object-oriented analysis: Strengthening and multiple partitioning;towards a new role paradigm for object-oriented modeling;analysing object-oriented application frameworks using concept analysis;using both specialisation and generalisation in a programming language: Why and
The proceedings contain 49 papers. The special focus in this conference is on Arithmetics, Low-Level modeling, Characterization, Asynchronous and Adiabatic Techniques. The topics include: An improved power macro-model...
ISBN:
(纸本)9783540441434
The proceedings contain 49 papers. The special focus in this conference is on Arithmetics, Low-Level modeling, Characterization, Asynchronous and Adiabatic Techniques. The topics include: An improved power macro-model for arithmetic Datapath components;performance comparison of VLSI adders using logical effort;a high-performance low power DSP architecture;impact of technology in power-grid-induced noise;exploiting metal layer characteristics for low-power routing;instrumentation set-up for instruction level power modeling;resonant multistage charging of dominant capacitances;a new methodology to design low-power asynchronous circuits;designing carry look-ahead adders with an adiabatic logic standard-cell library;clocking and clocked storage elements in multi-GHZ environment;dual supply voltage scaling in a conventional power-driven logic synthesis environment;robust sat-based search algorithm for leakage power reduction;a new methodology for efficient synchronization of RNS-based VLSI systems;clock distribution network optimization under self-heating and timing constraints;a compact charge-based propagation delay model for submicronic CMOS buffers;output waveform evaluation of basic pass transistor structure;an approach to energy consumption modeling in RC ladder circuits;structure independent representation of output transition time for CMOS library;a low energy clustered instruction memory hierarchy for long instruction word processors;design and realization of a low power register file using energy model;register file energy reduction by operand data reuse;trends in ultralow-voltage ram technology and offline data profiling techniques to enhance memory compression in embeddedsystems.
Today's embeddedsystems include more and more network capabilities. Verifying these capabilities via simulation is difficult because it is often required to have the simulation models interact with real networks....
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Today's embeddedsystems include more and more network capabilities. Verifying these capabilities via simulation is difficult because it is often required to have the simulation models interact with real networks. For instance, the validation of a network device requires its connection with the model of a real network and testing of its interaction with the surrounding blocks and used protocols. This paper explores a methodology for modeling, simulating and testing the functionality of an embedded system, and its interaction with a network. The methodology joins two simulation environments, both based on the C++ programming language. The first (SystemC) is both a hardware definition language and a simulation library designed to model and simulate hardware and software systems. The second (Network Simulator-2) is both a network definition language and a simulation tool designed to model and simulate network topologies. The proposed modeling and simulation methodology has been applied to two case studies: the design of a network device and the verification of two cooperating embeddedsystems.
The proceedings contain 140 papers. The special focus in this conference is on Parallel Processing. The topics include: Orchestrating computations on the world-wide web;non-massive, non-high performance, distributed c...
ISBN:
(纸本)3540440496
The proceedings contain 140 papers. The special focus in this conference is on Parallel Processing. The topics include: Orchestrating computations on the world-wide web;non-massive, non-high performance, distributed computing;facts on performance evaluation and its dependence on workloads;concepts and technologies for a worldwide grid infrastructure;a performance analysis tool for distributed and parallel programs;a hybrid strategy for automated performance problem searches;on the scalability of tracing mechanisms;component based problem solving environment;integrating temporal assertions into a parallel debugger;performance evaluation, analysis and optimization;prototyping and verifying stream-processing systems;symbolic cost estimation of parallel applications;performance modeling and interpretive simulation of PIM architectures and applications;extended overhead analysis for openMP;a call-graph based automatic tool for capture of hardware performance metrics for MPI and openMP applications;performance tuning through source code interdependence;on scheduling task-graphs to logP-machines with disturbances;optimal scheduling algorithms for communication constrained parallel processing;an automatic scheduler for parallel machines;non-approximability results for the hierarchical communication problem with a bounded number of clusters;non-approximability of the bulk synchronous task scheduling problem;adjusting time slices to apply coscheduling techniques in a non-dedicated now;a semi-dynamic multiprocessor scheduling algorithm with an asymptotically optimal competitive ratio;tiling and memory reuse for sequences of nested loops;towards detection of coarse-grain loop-level parallelism in irregular computations and parallel and distributed databases, data mining and knowledge discovery.
The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this paper proposes a new instruction-set ...
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ISBN:
(纸本)0769515495
The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this paper proposes a new instruction-set simulator's tool flow which has been extended with some retargetability features and multiple program representations. We propose an innovative way to improve the simulation speed, that is a key factor for embedded software optimization, by using a synthesis approach. In depth description is reported of the source-level optimization of the simulation library which is an important part of such new mechanism. Experimental results show a speedup of about 24 for the throughput of the simulation library, reaching the valuable performance of 50 Mops.
This paper considers a class of embedded signal processing applications. To achieve real-time performance these applications must be executed on a parallel processor. The paper focuses on the multiring optical interco...
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This paper considers a class of embedded signal processing applications. To achieve real-time performance these applications must be executed on a parallel processor. The paper focuses on the multiring optical interconnection network used in the system and specifically on the performance gains associated with utilizing the bandwidth reconfiguration capabilities associated with the network. The network is capable of being reconfigured to provide designated bandwidths to different source-destination connections both across rings and within a ring. The applications each consist of a sequence of alternating communication and computation phases. The sequence continues until execution of the application is complete. The effect of reconfiguration on application performance is explored using simulation techniques. The results indicate that substantial performance gains (speedups of 2 or more) can be achieved for this application class.
To realise the concept of a "Virtual Factory" a robot manufacturer's challenge is to provide a "virtual" model of their controller software which is finally to be embedded in different simulati...
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To realise the concept of a "Virtual Factory" a robot manufacturer's challenge is to provide a "virtual" model of their controller software which is finally to be embedded in different simulationsystems. Within a simulation environment, in addition to the standard controller features, further simulation specific functionalities have to be provided. During the project "Realistic Robot simulation" the functional requirements and a standardized communication interface of a Virtual Robot Controller (VRC) has been specified. One of the strongest demands for such a Virtual Robot Controller for a robot manufacturer is the capability of running multiple instances of the virtual controller software. This paper presents the results of our efforts towards multiple instantiating of our dedicated robot controller software. We have succeeded in running two controller instances and one simulation system on a off the shelf personal computer. Thus, we verified the potential of creating robot controller systems for coming e-manufacturing processes.
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