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international conference on Parallel Architecture and Compilation Techniques (PACT)

作者： B.B. Fraguela R. Doallo E.L. Zapata Department de Electronica e Sistemas Universidade da Coruna Coruna Spain

Caches play a very important role in the performance of modern computer systems due to the gap between the memory and the processor speed. Among the methods for studying their behaviour, the most widely used has been trace-driven simulation. Nevertheless, analytical modeling gives more information and requires smaller computation times that allow it to be used in the compilation step to drive automatic optimizations on the code. The traditional drawback of analytical modeling has been its limited precision and the lack of techniques to apply it systematically without user intervention. In this work we present a methodology to build analytical models for codes with regular access patterns. These models can be applied to caches with an arbitrary size, line size and associativity. Their validation through simulations using typical scientific code fragments has proved a good degree of accuracy.

关键词： Analytical models Equations Performance analysis Counting circuits computer architecture Electronic switching systems Computational modeling Hardware Microprocessors computer science education

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Automated translation of UML models of architectures for verification and simulation using SPIN

Automated translation of UML models of architectures for ver...

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IEEE international conference on Automated Software Engineering (ASE)

作者： P. Bose Information and Software Engineering Department George Mason University USA

The Unified modeling Language (UML) is fast becoming an industry standard for object-oriented modeling and analysis. Applying the UML to model, analyze and design dependable systems require methods and tools for model checking that are integrated with the UML and its support environment. Recent advances in model-checking technologies have led to the development of approaches and tools to check the correctness of security protocols as well as check the correctness properties (such as deadlock properties) of architectural abstractions of component based systems implementing specific styles of coordination. This paper focuses on use of a specific model-checking technology, SPIN, in model checking architectures specified using UML. In particular the paper develops an approach to check desired properties of a class of distributed component based software architectures characterized by indirect connection via mediators and shared space. The approach is demonstrated in the context of an architectural design implementing the NetBill protocol for e-commerce.

关键词： Unified modeling language Object oriented modeling Protocols Power system modeling computer architecture Electronic commerce Software engineering Birth disorders Electrical capacitance tomography Context modeling

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Sigma-delta modulation using filters with nonmonotonic transfer functions. Modelling and analysis

Sigma-delta modulation using filters with nonmonotonic trans...

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IEEE international conference on Electronics, Circuits and systems (ICECS)

作者： A. Rusu Electronics & Telecommunications Faculty Technical University of Cluj Napoca Cluj-Napoca Romania

This paper presents sigma-delta modulation using filters with nonmonotonic transfer functions. Several computer-aided-design tools for the modelling and simulation of these sigma-delta modulator architectures, are presented. A tool developed using the MATLAB program is proposed. In the proposed tool, starting from an input netlist where the modulator topology and the non-idealities of the circuits to take into account are selected, a time-domain simulation is carried out at a behavioral level based on the functional description of the basic blocks. The results of the theoretical analysis and the facilities of the MATLAB program are used for modeling, analysis and performance evaluation of sigma-delta analog-to-digital converters. The results of simulation using MATLAB Toolboxes for Signal Processing, shows the following: the sigma-delta modulator with nonmonotonic filters have the advantage that their noise can be devoid of audio tones.

关键词： Delta-sigma modulation Filters MATLAB Mathematical model Computational modeling Circuit simulation Performance analysis Transfer functions computer simulation computer architecture

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Issues in FPGA-based configurable computer design for operating systems and multimedia applications

Issues in FPGA-based configurable computer design for operat...

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Annual Hawaii international conference on System Sciences (HICSS)

作者： P. Knezevic B. Radunovic A. Elhouni Department of Computer Engineering School of Electrical Engineering University of Belgrade Belgrade Serbia

In this paper mappings of several different algorithms from the fields of operating systems and multimedia are discussed, together with the underlying system architecture. The system architecture is based on a board with four FPGA circuits. For the purpose of this research, a simulator of the system has been developed, and different interconnection networks, memory, and bus architectures have been tested. The results of the simulation, as well as analytical results, are presented.

关键词： computer architecture Circuit simulation Operating systems Multimedia systems Field programmable gate arrays Computational modeling Multiprocessor interconnection networks Memory architecture Circuit testing System testing

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Using the Altera UP 1 board for prototyping and VGA video display generation

Using the Altera UP 1 board for prototyping and VGA video di...

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IEEE international conference on Microelectronic systems Education

作者： J.O. Hamblen G.E. Ruhl Georgia Institute of Technology School of Electrical and Computer Engineering Atlanta GA USA

This paper describes current work utilizing a rapid prototyping approach to simulate, synthesize and implement prototype digital systems and computer architectures. PCs are used with student versions of commercial VHDL based CAD tools along with a low cost CPLD development board. VGA video output generated directly by the CPLD chip is used to display graphics or textual data eliminating the need for a logic analyzer. This low cost methodology is utilized in the design laboratory sequence of required courses for computer engineering students at Georgia Tech.

关键词： Prototypes computer displays Virtual prototyping Costs Computational modeling computer simulation Digital systems computer architecture Personal communication networks Design automation

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Functional and faulty behavior analysis: some experiments and lessons learnt

Proceedings - Annual International Conference on Fault-Toler...

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Proceedings - Annual international conference on Fault-Tolerant Computing 1999年 348-351页

作者： Guedart, Yannick Le Marneffe, Luc Scheerens, Francois Blanquart, Jean-Paul Boyer, Thierry LIS/Technicatome Toulouse France

ISBN: (纸本)0780357639

The design of dependable systems requires that the assessment of fault tolerance solutions be carried out as early as possible. This paper addresses this issue by studying a framework aimed at analyzing the behavior of these systems in the presence of faults. The proposed approach combines functional and behavioral modeling, fault injection and simulation. The paper reports on the investigation of such an approach on four practical architectures derived from real-world industrial systems. In the experiments we used two design tools, namely: Statemate and RDD-100. Finally, main results and lessons learnt are discussed, and subsequent directions to further exploit these results are proposed.

关键词： Fault tolerant computer systems

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High-level circuit modeling for power estimation

High-level circuit modeling for power estimation

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IEEE international conference on Electronics, Circuits and systems (ICECS)

作者： C.V. Schimpfle S. Simon J.A. Nossek Inst. of Network Theory & Signal Process. Tech. Univ. Munchen Germany Institute of Network Theory & Signal Processing Munich University of Technology Munich Germany

In this paper, a method for accurate modeling of timing behavior and power consumption of digital circuits is presented. The model is based on the parameter extraction of the basic cells by circuit level simulations. This information is then embedded in a high-level description (VHDL) for every basic cell. The circuit simulations for each cell are executed only once in order to create a cell library including the VHDL models. Due to the complex timing model in the high-level descriptions, the switching activity in a larger circuit can be determined quite accurately. Besides timing, the power consumption for every possible input transition is also included in the cell descriptions. Thus, quite accurate power estimation of large circuits is possible by a simple event driven simulation with a conventional VHDL-simulator. The computation time of this method is about four orders of magnitude shorter than power estimation by SPICE. The presented model in combination with the VHDL-simulator is applied for the comparing different multiplier architectures in terms of power consumption.

关键词： Timing Energy consumption Circuit simulation Digital circuits Parameter extraction Software libraries Switching circuits Computational modeling Discrete event simulation SPICE

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Towards an integrated, model-based codesign environment

Towards an integrated, model-based codesign environment

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international conference and Workshop on Engineering of computer-Based systems

作者： S.J. Cunning T.C. Ewing J.T. Olson J.W. Rozenblit S. Schulz Department of Electrical and Computer Engineering University of Arizona Tucson Tucson AZ USA

The paper describes desiderata for an environment to implement the model based codesign methodology. A brief summary of model based codesign is given, followed by a discussion of related work. The services and capabilities required of a design environment are given within the concept of a CAD framework. The design flow that realizes model base codesign is presented. Attention is given to the required activities at each step and to the flow of design information between design steps. The design flow described here focuses on real time embedded systems. It covers engineering activities from requirements documentation to the physical realization of the design. Emphasis is placed on modeling and simulation to support automated design reasoning. Considerations related to tool support and tool integration are also given.

关键词： Hardware Application software Control system synthesis Software design Computational modeling Control systems Identity-based encryption Design automation Design engineering systems engineering and theory

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System level design and debug of high-performance embedded media systems (embedded tutorial) 99

System level design and debug of high-performance embedded m...

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Proceedings of the 1999 IEEE/ACM international conference on computer-aided design

作者： Kees A. Vissers Pieter van der Wolf Gert-Jan van Rootselaar Rolf Ernst Philips Research Labs. Eindhoven The Netherlands Tech. University of Braunschweig Braunschweig Germany

ISBN: (纸本)9780780358324

This tutorial on System Level Design practices in Philips consists of three parts. In the first part we discuss application domain characteristics and architectures for video processing. High performance video processing applications impose severe demands on architectures. The architectures need to provide both high bandwidth for communication and high processing power for computation. Such architectures often consist of a combination of programmable cores and more dedicated coprocessors. This is illustrated with the TriMedia based VLIW cores combined with dedicated coprocessors, e.g., an HD resolution MPEG-2 decoder and a dedicated video output processing unit. Several architectures that are developed within Philips will be illustrated. These include the programmable TriMedia VLIW media processor, a dataflow style stream processing architecture, and more dedicated solutions for video processing. Furthermore the future trend of building platforms out of these components will be *** the second part we discuss the design technology that is employed to perform architecture modeling and evaluation and design space exploration. During the initial stages of architecture design several decisions with a large impact are taken. In Philips, practice is developed to model architectures at a high level of abstraction. With such models architectural options can be explored quantitatively. Such explorations are driven by a suite of characteristic benchmark applications. Several levels of architecture modeling will be illustrated. Methods and tools used for exploration ob both a multiprocessor system including a dedicated MPEG-2 decoder and a future VLIW core will be *** the third part we discuss a methodology for System-On-a-Chip *** today's multi-million transistor designs, existing design verification techniques cannot guarantee that first silicon is designed error free. Therefore, techniques are necessary to quickly debug first-silicon. In this presen

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Formal description of real-time systems using SDL

Formal description of real-time systems using SDL

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： R. Ashour F. Khendek T. Le-Ngoc Electrical and Computer Engineering Department Concordia University Canada

The Specification and Description Language (SDL) promises to be a good formal language to describe real-time systems, since it has time constructs and supports modeling of distributed systems. The problem with SDL is that it does not have a clear interpretation of time and does not provide a solid description of how the model is supposed to execute in time. This poses a problem for developing tools that can simulate and verify real-time systems described with SDL. In this paper, we present a technique to describe timing constraints in SDL along with our proposed semantic interpretation of these descriptions. We also present a method to understand how such an SDL description will run in time, and how simulation runs can be produced from the model. As an illustrative example, we use our description technique and interpretation of time to describe a railroad crossing in SDL, and we provide a time simulation run. Finally, we discuss the effect of this time semantics on the simulation and verification of SDL descriptions. We also discuss some missing functionalities regarding the temporal description of communication systems using SDL.

关键词： Real time systems Timing Distributed computing Formal languages Solid modeling Rails Virtual prototyping Automatic testing System testing systems engineering and theory

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