The advent of modern disk controller architectures has revived the debate on how to model this complex equipment. At the CMG95 conference a panel session was held on the topic of predicting performance for modern I/O ...
详细信息
The advent of modern disk controller architectures has revived the debate on how to model this complex equipment. At the CMG95 conference a panel session was held on the topic of predicting performance for modern I/O controllers, and on what could be expected from those predictions. One of the topics of the discussion was whether or not new controllers rendered modeling useless because of their complexity. When analyzing complex equipment like a computer system or a disk I/O subsystem, it is apparent that the performance that one observes is the result of a very complex interaction between the hardware design and workload. It is tempting to state that the system is so complex that modeling or simulation will not work, and that a benchmark is the only way to get a performance prediction. In this paper we will show the contrary to be true, explaining how analytical modeling can be used successfully, even with limited information about the subsystem internal operation.
Simultaneous multithreading is a processor architecture technique that combines the multiple-instruction-issue features of modern superscalar CPUs with the latency-hiding ability of multithreaded architectures. SMT pe...
详细信息
Simultaneous multithreading is a processor architecture technique that combines the multiple-instruction-issue features of modern superscalar CPUs with the latency-hiding ability of multithreaded architectures. SMT permits multiple threads (e.g., multiple programs) to execute instructions on a superscalar processor's multiple functional units in a single cycle. The objective of simultaneous multithreading is to substantially increase processor utilization in the face of both long instruction latencies and limited available parallelism per thread. Measurement and analysis of such a processor requires a simulator that is powerful and flexible. This paper discusses the simulator and some of its unique features.
Parallel and distributed computerarchitectures are increasingly being considered for application in a wide variety of computationally intensive embeddedsystems. Many such applications impose highly dynamic demands f...
详细信息
Parallel and distributed computerarchitectures are increasingly being considered for application in a wide variety of computationally intensive embeddedsystems. Many such applications impose highly dynamic demands for resources (processors, memory, and communication network), because their computations are data-dependent, or because the applications must constantly interact with a rapidly changing physical environment, or because the applications themselves are adaptive. This paper presents a set of dynamic resource allocation techniques aimed at maintaining high levels of application performance in the presence of varying resource demands. It focuses on a class of applications structured as multiple pipelines of data-parallel stages, as this structure is common to many sensor-based applications. We discuss the issues involved in resource management for such applications, and present preliminary results from our implementations on Intel Paragon. Our approach uses feedback control - a real-time monitoring system is used to detect significant performance shortfalls, and resources are reallocated among the application components in an attempt to improve performance. The main contribution of this work is that it combines real-time monitoring of an application's performance with dynamic resource allocation, and focuses on practical implementations rather than simulation and analysis.
The proceedings contain 42 papers. The special focus in this conference is on systems Theory and Design Environments and Tools. The topics include: On the structure of discrete systems;identification and recognition t...
ISBN:
(纸本)9783540607489
The proceedings contain 42 papers. The special focus in this conference is on systems Theory and Design Environments and Tools. The topics include: On the structure of discrete systems;identification and recognition through shape in complex systems;a logical approach to system construction;task management system;toward a unified theory of discrete event systems;general systems description and implications;proving system properties by means of trigger-graph and petri nets;refinement mapping for general (discrete event) systems theory;a system-theoretic approach to planning and programming;equality of functions in CAST;basins of attraction estimation through symbolic graphical computing techniques;temporal and functional verification of a symbolic representation of complex systems;modelling differential equations by basic information technology means;system theoretic aspects of software architectures;a language for describing complex-evolutive software systems;an architecture for process modeling and execution support;a formal semantics for a graphical model representation in system design;a user-interface for a microsystems high-level simulator;CAST extensions to DASME to support generalized information theory;symbolic computing aided design of nonlinear PID controllers;discrete event simulation in an environment for temporal expert systems;TOMSPIN - a tool for modeling with stochastic petri nets;hybrid evolutionary programming;automatic induction of DEVS structures;systems engineering and infrastructures for open computer based systems;object-oriented high level modeling of complex systems;multifacetted, object oriented modeling in the transportation domain;a tool environment for the design of complex, real-time systems;systems level specification and modelling of reactive systems and control through deliberative and reactive planning.
Most of the signal processing application programs involve computationally intensive iterative steps. In such programs, various failures in the underlying hardware manifest as control-flow errors that affect the relia...
详细信息
ISBN:
(纸本)0819422347
Most of the signal processing application programs involve computationally intensive iterative steps. In such programs, various failures in the underlying hardware manifest as control-flow errors that affect the reliability of the computed results. Various techniques have been proposed in the past to detect and recover from such control-flow errors. Unfortunately, all these techniques need either additional hardware or modification of the hardware and are not portable across various platforms. To circumvent these limitations, recently we have developed a high-level control-flow checking approach using assertions (CCA). In CCA, branch-free intervals in a given high-level language program are identified and the entry and exit points of the intervals are fortified through pre-inserted assertions. In this paper we describe an implementation of CCA through a pre-processor that will automatically insert the necessary assertions into a high-level language program. Based on the implementation we study the fault detection capabilities of CCA with the help of fault injection experiments using FERRARI.
The proceedings contain 31 papers. The special focus in this conference is on Foundations of Cast and Methods. The topics include: systems science and systems technology;soft computer-aided system theory and technolog...
ISBN:
(纸本)3540614788
The proceedings contain 31 papers. The special focus in this conference is on Foundations of Cast and Methods. The topics include: systems science and systems technology;soft computer-aided system theory and technology;the configuration of complex systems;on the expressibility of discrete event specified systems;an object-oriented architecture for possibilistic models;fuzzy expert system technology;deciding boundedness for systems of two linear communicating finite state machines;a framework for knowledge intensive engineering;a development methodology for systems engineering of computer-based systems and its environmental support;an approach to the design of complex, heterogeneous hardware/software systems;a strategy for realizing traceability in an object-oriented design environment;towards a CAST method for a systematic generation of non-orthogonal complete transformations;tuning fuzzy logic controllers by classical techniques;computer aided design of protocol converters;modelling, analysis and evaluation of systemsarchitectures;systematic strategy for performance prediction in improvement of parallel programs;design and implementation of multimedia environment for simulation;a neural network with direct learning based on linear or non-linear threshold logics;an evolutionary recurrent neural network designer and trainer;an environment for system level telecommunication design exploration and modelling;a tool for visual object modeling;a computer aided system for developing graphical telematic applications and a simple approach to improve the abstraction level of object representation.
The proceedings contain 39 papers. The special focus in this conference is on Software Development Methods. The topics include: Programming the internet in ada 95;reliability modeling for safety critical software;faul...
ISBN:
(纸本)354061317X
The proceedings contain 39 papers. The special focus in this conference is on Software Development Methods. The topics include: Programming the internet in ada 95;reliability modeling for safety critical software;fault-tolerance by replication in distributed systems;an effective concurrent programming language;mapping HRT-HOOD designs to ada 95 hierarchical libraries;an approach to increasing software component reusability in ada;iterative software development for large ada programs;HCSD unit development process;testing ada 95 programs for conformance to rapide architectures;tasking deadlocks in ada 95 programs and their detection;on some characterisation problems of subdomain testing;a framework for testing object-oriented software using formal specifications;ada 95 and critical systems;use of a static analysis tool for safety-critical ada applications;secure communication in distributed ada;using object-oriented methods in ada 95 to implement linda;shared packages through linda;an ada extension to program fault-tolerant distributed applications;the dining philosophers in ada 95;using ada 95 for prototyping real-time systems;the GNARL implementation of POSIX/ada signal services;implementing protected types on embedded targets;from the prototype to the full implementation;handling irregular grammars in ada;interprocedural call optimization;augmenting ada 95 with additional real-time features;the addition of persistence and its consequences;extending the object-orientedness of ada 95 and an aria 95 view of some difficult or controversial points in object-oriented programming.
Real-time simulation is an advanced mode of simulation in which the simulation objects are designed to show the same timing behavior as the simulation targets. A new approach to real-time simulation which is based on ...
详细信息
Real-time simulation is an advanced mode of simulation in which the simulation objects are designed to show the same timing behavior as the simulation targets. A new approach to real-time simulation which is based on the RTO.k object modeling is discussed. The RTO.k object, which is a real-time extension of the well-established object structure, is capable of uniformly and accurately representing both real-time embeddedcomputersystems and application environments. This simulation approach has many attractive features, e.g., expandability, modifiability, adaptability for efficient parallel processing, etc. In spite of its promising nature, the approach is an immature one in many respects and some desirable directions for future work aimed toward maturing the technology are also discussed.
This paper discusses experience with synthesis from a Verilog writing style using encapsulated modules. The method is shown to be capable of significant advantages in reduction of code complexity, re-use of submodules...
详细信息
This paper discusses experience with synthesis from a Verilog writing style using encapsulated modules. The method is shown to be capable of significant advantages in reduction of code complexity, re-use of submodules, and automatic inference of control. In order to pass synthesis and low level simulation, care must be taken in the translation of the encapsulated modules through an intermediate style accessible to industry synthesizers. If the encapsulated modules are edge activated then the control points need to be staggered in time through the clock cycle as control is passed down through the hierarchy. Examples are given of a such an intermediate style which is acceptable to synthesis and low level simulation. A conclusion discusses other implications of adapting the objective style to hardware design.
The domain of industrial automation has been of heightened interest since the introduction of robotic vision in the work place. The system discussed in this abstract is designed to be utilized in the areas of machine ...
详细信息
ISBN:
(纸本)0819422355
The domain of industrial automation has been of heightened interest since the introduction of robotic vision in the work place. The system discussed in this abstract is designed to be utilized in the areas of machine and robotic vision for the industrial field. It can serve as an inspection or location finding device for real-time closed loop automated systems, The performance advantage of this system is gained through the use of a massively parallel architecture. The system is built on a VLSI wafer, where the concept of a full application specific system is fabricated on a chip. These design techniques take advantage of massive parallel hardware at the lower stages of image processing whereby increasing the performance of this stage can significantly improve the total throughput of the system. The design procedure is based on custom ASIC hardware that is optimized for the task at hand. Additionally, the elements have been designed in a modular and reusable manner. The processing of system data is accomplished primarily, by parallel hardware units, with firmware assigned the responsibility of configuring and defining the task. This system incorporates the design theorems of image processing with the fundamentals of high speed architectures. This design technique, in conjunction with parallel processing principles, will overcome the current time limitations that have been persistent in the current approaches. The system is designed with three functional layers, each composed of parallel architectures and local control. A main control system is also present to monitor overall system functionality and issue queuing commands for the processes, in a non-blocking manner. The proposed system theory and design will be presented with the VLSI layout, simulation and modeling with the CADENCE design environment. Test results and prototype examples are used to determine the success of the system and test it's limitations.
暂无评论