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Benchmarking parallel simulation algorithms

Benchmarking parallel simulation algorithms

引用

IEEE international conference on Algorithms and architectures for Parallel Processing (ICAP)

作者： L. Barriga R. Ronngren R. Ayani Dept. of Teleinformatics R. Inst. of Technol. Stockholm Sweden Department of Teleinfonnatics Computer Systems Laboratory Royal Institute of Technology Stockholm Sweden

Parallel simulation has been an active research area for more than a decade. The parallel simulation community needs a common benchmark suite for performance evaluation of parallel simulation environments. Performance evaluation of a parallel simulation environment is harder than evaluating a parallel processing system, since the underlying system is nor only composed of architecture and operating system, but also of simulation kernel. Thus, simulation kernel designers often confront a twofold task: (i) to evaluate how efficiently their simulation kernel runs on certain architectures; and (ii) to evaluate how simulation problems scale using this kernel In this paper we advocate an incremental benchmarking methodology that focuses on the evaluation of a parallel simulation system which is based on Time Warp. We start from a reduced set of ping models that can effectively estimate the various overheads, contention and latencies of Time Warp running on a multiprocessor. The benchmark suite has been used to locate several sources of overhead in an existing Time Warp implementation. Using this benchmark suite we also compare the performance of the improved version of the Time Warp implementation with the original one.

关键词： Computational modeling Discrete event simulation computer simulation Kernel Concurrent computing Parallel processing Operating systems Very large scale integration

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Efficient fuzzy logic architectures suitable for silicon compilation

Efficient fuzzy logic architectures suitable for silicon com...

引用

conference of the North American Fuzzy Information Processing Society - NAFIPS

作者： T. Wicks M. Nigri P. Treleaven Department of Computer Science University College London London UK

The increasing complexity of fuzzy logic systems and their application to an ever widening set of problems leads to a requirement for automatic system generation methods. Fuzzy logic has proved to be a good alternative to traditional methods, with uses found in control, pattern matching and expert reasoning systems. Its use in embedded system controllers, in particular, brings about a need for efficient hardware solutions. This arises at a time when Application Specific Integrated Circuits (ASICs) are proving to be an increasingly attractive implementation route, in terms of cost, speed and reliability. Compilation methods which map a high level fuzzy logic description directly down to silicon are being developed. Efficient fuzzy logic architectures are therefore sought for the outcome of this mapping. This paper discusses the hardware requirements for fuzzy logic and develops a range of flexible implementation schemes which are suitable for silicon compilation.

关键词： Fuzzy logic Silicon Automatic control Control systems Hardware Pattern matching embedded system Application specific integrated circuits Costs Integrated circuit reliability

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Intelligent fuzzy controller design on WARP for mechanical systems with complex dynamic behaviors

Intelligent fuzzy controller design on WARP for mechanical s...

引用

IEEE international conference on Fuzzy systems (FUZZ-IEEE)

作者： S.V. Ulyanov T. Yamafuji V.G. Gradetsky A. Pagni Department of Mechanical and Control Engineering University of Electro-Communications Chofu Tokyo Japan Institute for Problems in Mechanics Russian Academy of Science Russia SGS-THOMSON Microelectronics Corporate Advanced System Architectures Italy

The methodology of intelligent fuzzy controller design is introduced. The basis of the methodology is simulation of computer dynamics for mechanical systems with the help of qualitative physics and the search of possible solutions with genetic algorithm (GA). On artificial neural networks optimal solutions are defined and knowledge base of fuzzy controller on the Weight Associative Rule Processor (WARP) is formed. Applications of this methodology on examples including a mobile robot for service use, a wall climbing robot (WCR) for decontamination of nuclear-power plant, a DC/DC converter and an apparatus for artificial ventilation of lungs, are examined.< >

关键词： Fuzzy control Fuzzy systems Control systems Mechanical systems Artificial intelligence Computational modeling computer simulation Physics computing Genetic algorithms Artificial neural networks

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Model-embedded on-line problem solving environment for chemical engineering

Model-embedded on-line problem solving environment for chemi...

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IEEE international conference on Engineering of Complex computer systems

作者： G. Karsai J. Sztipanovits H. Franke S. Padalkar F. DeCaria Department of Electrical and Computer Engineering Vanderbilt University Nashville TN USA IBM Thomas J. Watson Research Center USA DuPont DeNemours Old Hickory Plant Old Hickory TN USA

The building of custom monitoring, control, simulation and diagnostics applications for complex chemical plants necessitates the integration of models into the problem solving process. This paper describes a system and its practical applications that supports this activity. It is based on the Multigraph Architecture, which is a generic framework for building these model-based systems. The paper discusses the modeling paradigms used, how the applications are generated, and some practical, existing applications.

关键词： Problem-solving Chemical engineering Application software Buildings Object oriented modeling Expert systems Knowledge engineering computerized monitoring Chemical processes Terminology

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Simultaneous optimisation of both scalar parameters and agent reaction strategies using genetic algorithms

Simultaneous optimisation of both scalar parameters and agen...

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IEEE/IAS international conference on Industrial Automation and Control, IA & C

作者： G.M. Gibson School of Computer and lnformation Science University of South Australia Pooraka SA Australia

When optimising simulation models of organised systems, it may be necessary to optimise the decision making behaviour of human operators and/or computer controllers, either because the optimal strategies for them to use are not self-evident, or because they are dependent on other variables which are being optimised. In this paper, a new kind of genetic algorithm (GA) is presented which optimises problems containing both traditional scalar parameters and multiple reaction strategies, expressed as agent rule bases. It is a multi-level GA in the sense that the strings may have one or more GAs embedded within them. Its performance on two industrial simulation test problems indicate that it can successfully generate good solutions to problems that have relatively small-scale control strategies to be optimised in conjunction with other parameters.< >

关键词： Genetic algorithms Humans Electrical equipment industry Industrial control Manufacturing industries Context modeling Australia Computational modeling computer simulation Decision making

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Using parallel data structures in optimistic discrete event simulation of varying granularity on shared-memory computers

Using parallel data structures in optimistic discrete event ...

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IEEE international conference on Algorithms and architectures for Parallel Processing (ICAP)

作者： S.K. Prasad S.I. Sawant B. Naqib Mathematics and Computer Science Georgia State University Atlanta GA USA Georgia State University Atlanta GA US Dept. of Math. & Comput. Sci. Georgia State Univ. Atlanta GA USA

We investigate a variety of parallel priority queue data structures to implement the global event queue of the optimistic discrete event simulation. The choice of the data structure is shown to depend on the granularity of the events. For medium-to-coarse-grained systems, a moderately fast data structure, such as a parallelized calendar queue, suffices. For fine-grained systems, such as the logic circuits, a sophisticated data structure, namely, parallel heap, was found necessary to exploit the underlying concurrency. With a suitable choice of data structure, we experimentally demonstrate speedups from two to four using six processors of a small bus-based shared-memory computer. Such speedups are possible because our simulators are based on global event queues which resulted in a drastically reduced rollback frequency and an excellent dynamic load balance, two main problems associated with local-event-queue-based optimistic simulators. In these experiments, the coarse-and the medium-grained networks were carefully selected to cause numerous rollbacks and severe load imbalance in local-event-queue-based simulators. For fine-gained networks, even the global-queue-based simulators which do not employ parallel heap could not achieve any speedup. We include performance data on three simulators based on parallelized calendar queues and a logic simulator based on parallel heaps.< >

关键词： Data structures Discrete event simulation Computational modeling Clocks Calendars Concurrent computing Logic computer simulation Mathematics computer science

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A performance evaluation methodology for computer systems

A performance evaluation methodology for computer systems

引用

international Phoenix conference on computers and Communications (IPCCC)

作者： M.S. Obaidat H. Khalid Dept. of Electr. Eng. City Univ. of New York NY USA Department of Electrical Engineering City University of New York NY USA

This paper presents a simulation methodology for evaluating the performance of CISC and RISC computer systems. Our method is called message flow technique (MFT). MFT is a modification of the instruction flow technique (IFT) we presented for RISC previously. The proposed methodology was applied to a single and two-level cache-based complex instruction set computer system using 80486 SX as a case study. Our trace driven simulations provide an estimate of the mean performance of the system for the considered general purpose computing environment with an accuracy of /spl plusmn/5% and a confidence level of 95%. The simulations indicate that with a single level on-chip cache of size 8 K bytes, the performance of the system is considerably limited by the service rime of bus interface unit (BIU). The average service time of bus interface unit, per instruction, was found approximately equal to 1.0135 microseconds for our synthetic workloads, collectively called, modified Gibson mix (MGM). With the introduction of a moderate-sized second level external cache to the system, the average performance improvement was found to be appreciable. The methodology presented here is an efficient and easy to use tool as compared to the previous methodologies, essentially limited to RISC architectures, that could help performance analysts in evaluating different computer systems.< >

关键词： Computational modeling Reduced instruction set computing Analytical models computer simulation computer aided instruction computer architecture Performance analysis Microprocessors Cities and towns Educational institutions

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Managing complexity in heterogeneous system specification, simulation, and synthesis

Managing complexity in heterogeneous system specification, s...

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international conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： A. Kalavade J.L. Pino E.A. Lee Dept. of Electr. Eng. & Comput. Sci. California Univ. Berkeley CA USA Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA

System-level design is characterized by a behavioral specification and heterogeneous hardware/software implementations. Exploring the design space is essential for good design. Specifying and managing complex design flows, tracking dependencies and tool invocations, and maintaining consistency of design data and flows are key issues that enable efficient design space exploration. In order to manage the complexity of this design process, an infrastructure that manages these issues, transparent to the user, is presented. These concepts have been implemented in the Ptolemy environment within a framework called DesignMaker. An example design flow for multiprocessor synthesis is presented in some detail to illustrate the features of DesignMaker. The end objective of the framework is to facilitate a flexible system-level codesign assistant.

关键词： Hardware Space exploration System-level design Process design Computational modeling embedded system Control systems Telecommunication control Software tools computer simulation

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A new fault-tolerant scheduling technique for real-time multiprocessor systems

A new fault-tolerant scheduling technique for real-time mult...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： T. Tsuchiya Y. Kakuda T. Kikuno Department of Information and Computer Sciences Faculty of Engineering Science Osaka University Toyonaka Osaka Japan

In multiprocessors used for implementing real-time applications, it is strongly required to ensure that tasks' deadlines are met in spite of faults. In this paper, we discuss fault-tolerant task scheduling techniques in real-time multiprocessor systems where aperiodic tasks arrive dynamically. For fault-tolerance, multiple copies of each task have to be scheduled on distinct processors in such systems. The authors propose a new technique for efficiently scheduling copies of tasks having small laxity. Then, we integrate our technique with previous work and develop a new scheduling algorithm, removing the assumption on task laxity. simulation results show the effectiveness of our technique.

关键词： Fault tolerant systems Real time systems Multiprocessing systems Processor scheduling Scheduling algorithm Fault tolerance Fault detection Application software Dynamic scheduling Computational modeling

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A soft aperiodic task scheduling algorithm in dynamic-priority systems

A soft aperiodic task scheduling algorithm in dynamic-priori...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： Sungyoung Lee Hyungill Kim Jongwon Lee Department of Computer Engineering Kyung Hee University Seoul South Korea Software Research Laboratory Korea Telecom Seoul South Korea

ISBN: (纸本)0818671068

In this paper, we present a joint scheduling of hard deadline periodic and soft deadline aperiodic tasks in dynamic-priority systems. The proposed algorithm has extended the fixed-critical task indicating (CTI) algorithm developed by the authors previously (1995). The dynamic-CTI algorithm is operated in such a way that dynamic-priority assignment strategy for a given periodic task set and the information on a deadlinewise preassignment table, called dynamic-CTI table, are mixed dynamically according to the aperiodic tasks' arrivals at runtime. The algorithm has a predictability and a less computational complexity in calculating the slacks since it uses the dynamic-CTI table. Our simulation study shows that the dynamic-CTI scheduling has better performance than the fixed-CTI algorithm which is even better than the slack stealing algorithms, especially under a heavy, transient overload.

关键词： Scheduling algorithm Processor scheduling Dynamic scheduling Runtime Computational complexity Delay Heuristic algorithms Computational modeling Telecommunication computing Prediction algorithms

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