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检索条件"任意字段=International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"
2730 条 记 录,以下是2661-2670 订阅
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Study of computer architecture topology simulation using Network II.5, Simscript II.5, and ModSim II
Study of computer architecture topology simulation using Net...
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1989 IEEE international conference on systems, Man, and Cybernetics
作者: Munoz, Jose L. Krzych, Matthew J. Cent US Naval Underwater Syst New London CT USA
A reference guide is provided for the tool selection process, particularly when applied to computer architecture simulation. Network II.5, Simscript II.5, and ModSim II each provide the capability for assessing comput... 详细信息
来源: 评论
A study of computer architecture topology simulation using Network II.5, Simscript II.5, and ModSim II
A study of computer architecture topology simulation using N...
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IEEE international conference on systems, Man and Cybernetics
作者: J.L. Munoz M.J. Krzych Naval Underwater and Systems Center New London CT USA
A reference guide is provided for the tool selection process, particularly when applied to computer architecture simulation. Network II.5, Simscript II.5, and ModSim II each provide the capability for assessing comput... 详细信息
来源: 评论
CSP-based object-oriented description of parallel reconfiguration architectures
CSP-based object-oriented description of parallel reconfigur...
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international conference on Wafer Scale Integration
作者: D.K. Hwang W.K. Fuchs Computer Systems Group Coordinated Science Laboratory University of Illinois Urbana IL USA
An approach to object-oriented description of reconfigurable parallel architectures based on an extended communicating sequential processes (CSP) model of communication is presented. A workbench called OODRA (object-o... 详细信息
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CAE functionality for verification of diagnostic programs
CAE functionality for verification of diagnostic programs
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IEEE international Test conference
作者: C. Pyron R. Sallade Test Automation DeDartment Defense Systems & Electronics Group Texas Instruments Inc. Piano TX USA
A feasibility study that has identified computer-aided engineering (CAE) features and a methodology approach that will support BIT (built-in-test) verification through fault simulation are described. With an example, ... 详细信息
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Restricted symbolic evaluation is fast and useful
Restricted symbolic evaluation is fast and useful
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IEEE international conference on computer-Aided Design
作者: J.L. Carter B.K. Rosen G.L. Smith V. Pitchumani IBM Research Division Yorktown Heights NY USA IBM Data Systems Division Poughkeepsie NY USA ECE Department Syracuse University Syracuse NY USA
A method is presented for simulation with two zillion and three values. The values that are propagated by the simulation include the familiar 0, 1, and X and also a collection of named unknowns and their formal negati... 详细信息
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Fault tolerance and reliable routing in augmented hypercube architectures
Fault tolerance and reliable routing in augmented hypercube ...
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international Phoenix conference on computers and Communications (IPCCC)
作者: M.S. Alam R. Melhem Dept. of Comput. Sci. Pittsburgh Univ. PA USA Department of Computer Science University of Pittsburgh Pittsburgh PA USA
Two schemes for augmenting hypercubes with spare nodes are presented. In both schemes, fault coverage is local in the sense that only the neighbors of the faulty nodes need to know about the faults. Routing in the pre... 详细信息
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Parallel processing and computational chemistry
Parallel processing and computational chemistry
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Annual international conference of the IEEE Engineering in Medicine and Biology Society (EMBC)
作者: P. Weiner Alliant Computer Systems Corporation Littleton MA USA
Summary form only given, as follows. With the increasing use of such methods as dynamic simulations, free energy perturbation and large-molecule ab initio calculations, chemical researchers find increasing frustration... 详细信息
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Experimentally based parallel architecture evaluation
Experimentally based parallel architecture evaluation
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IEEE Annual international computer Software and Applications conference (COMPSAC)
作者: S.A. Fineberg Parallel Processing Laboratory School of Electrical Engineering Purdue University West Lafayette IN USA
A technique for architectural evaluation that has been used with good results and that is applicable to most experimental and commercial machines is proposed. This technique is that of careful experimentation on a bar... 详细信息
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PARET;an integrated visual tool for the study of parallel systems
PARET;an integrated visual tool for the study of parallel sy...
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IEEE international conference on computer Design: VLSI in computers and Processors, (ICCD)
作者: K.M. Nichols J.T. Edmark System Architecture Research Department AT&T Bell Labaratories Holmdel NJ USA
PARET (Parallel Architecture Research and Evaluation Tool) is an object-oriented graphical environment for the study of parallel or multiprocessor systems that provides a laboratory for investigation of alternative ar... 详细信息
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EXIST: an interactive VLSI architectural environment
EXIST: an interactive VLSI architectural environment
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IEEE international conference on computer Design: VLSI in computers and Processors, (ICCD)
作者: P.S. van der Meulen M.-D. Huang U. Bar-Gadda E. Lee P. Baltus Signetics division of NAPC Philips Research Laboratories Sunnyvale CA USA
EXIST (Exploration in Smalltalk) is an integrated environment for exploratory VLSI architectural design implemented in the Smalltalk-80 environment. It consists of a functional simulator (INSIST), a floorplanner (FLOO... 详细信息
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