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检索条件"任意字段=International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"

共 2731 条记录，以下是411-420 订阅

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Performance comparison of position based routing protocols for VANETs

Performance comparison of position based routing protocols f...

引用

2017 international conference on Internet of Things, embedded systems and Communications, IINTEC 2017

作者： Ashtaiwi, Abduladhim Saoud, Abdusadik Department of Computer Engineering American University of the Middle East Kuwait Department of Electrical and Computer Engineering Libyan Academy Libya

ISBN: (纸本)9781538621134

Many safety and infotainment applications of Vehicular Ad hoc Networks (VANETs) depend on the robustness and reliability of the routing protocols. There are many routing protocols proposed for VANETs in the literature, only position based routing protocols are proven to be more suitable for VANETs. Some work in the literature evaluated the performance of position based routing protocols using different models, approaches and simulation tools. In order to get valuable results that reflect as close as possible the real implementations, detailed models that consider all aspects of real implementation must be considered. In this work we evaluate the routing performance of two position based routing protocols, namely, Greedy Perimeter Stateless Routing (GPSR) and Greedy Perimeter Coordinator Routing (GPCR). To cover most of the details of VANETs mobility and road infrastructures, we use two simulation tools: VanetMobiSim and NS-2. VanetMobiSim models the macro and micro aspects of vehicular networks and road infrastructures. In macro level modeling, VanetMobiSim considers all the road infrastructure details and in micro level modeling, VanetMobiSim considers all mobility aspects of vehicular networks. NS-2 simulation tool is used to model all the communication related aspects that included in network, MAC, and physical layers. The obtained results showed that GPCR perform better than GPSR under different combination of vehicular speeds, vehicular densities, and transmission ranges. Both protocols suffer performance degradation under high vehicular speeds, however, under the same circumstances, GPCR is still performing better than GPSR. © 2017 IEEE.

关键词： Vehicular ad hoc networks

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Memristor-CMOS Analog Co-Processor for Acceleration of High Performance Computing Applications

Memristor-CMOS Analog Co-Processor for Acceleration of High ...

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international conference on Current Trends towards Converging Technologies (ICCTCT)

作者： Nihar Athreyas Qiangfei Xia Dev Gupta Wenhao Song Abbie Mathew J. Joshua Yang Blair Perot Jai Gupta University of Massachusetts Amherst MA U.S.A Spero Devices MA U.S.A Spero Devices Acton MA U.S.A

Vector matrix multiplication computation underlies major applications in machine vision, deep learning and scientific simulation. These applications require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet this increasing demand. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. One such primitive is a memristor-CMOS crossbar array based vector matrix multiplication. In this paper, we develop a memristor-CMOS analog co-processor architecture that can handle floating point computation. The crossbar array is based on a TaOx memristor device. To demonstrate the working of the analog co-processor at a system level, we use a new tool developed by Cadence and Mathworks called PSpice systems Option which performs integrated co-simulation of MATLAB/Simulink and PSpice. It is shown that the analog co-processor has a superior performance when compared to other processors. Using the new PSpice systems Option tool, various application simulations for image processing and solution to partial differential equations are performed on the analog coprocessor model.

关键词： Memristors computer architecture Virtual machine monitors Microprocessors Engines Computational modeling Mathematical model

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Quantum Accelerators for High-Performance Computing systems

Quantum Accelerators for High-Performance Computing Systems

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IEEE international conference on Rebooting Computing (ICRC)

作者： Britt, Keith A. Mohiyaddin, Fahd A. Humble, Travis S. Oak Ridge Natl Lab Quantum Comp Inst Oak Ridge TN USA

ISBN: (纸本)9781538615539

We define some of the programming and system-level challenges facing the application of quantum processing to high-performance computing. Alongside barriers to physical integration, prominent differences in the execution of quantum and conventional programs challenges the intersection of these computational models. Following a brief overview of the state of the art, we discuss recent advances in programming and execution models for hybrid quantum-classical computing. We discuss a novel quantum-accelerator framework that uses specialized kernels to offload select workloads while integrating with existing computing infrastructure. We elaborate on the role of the host operating system to manage these unique accelerator resources, the prospects for deploying quantum modules, and the requirements placed on the language hierarchy connecting these different system components. We draw on recent advances in the modeling and simulation of quantum computing systems with the development of architectures for hybrid high-performance computing systems and the realization of software stacks for controlling quantum devices. Finally, we present simulation results that describe the expected system-level behavior of high-performance computing systems composed from compute nodes with quantum processing units. We describe performance for these hybrid systems in terms of time-to-solution, accuracy, and energy consumption, and we use simple application examples to estimate the performance advantage of quantum acceleration.

关键词： Quantum computing Registers Programming Computational modeling computer architecture Software Acceleration

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Application of Quantum Cellular Automata in Image Steganography with an Improved Fault Tolerant Majority Voter

Application of Quantum Cellular Automata in Image Steganogra...

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IEEE international conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)

作者： H P Bhavana Adiga R. Jayagowri VLSI Design and Embedded System B M S College of Engineering Bengaluru India

ISBN: (数字)9781538624401

ISBN: (纸本)9781538624418

Quantum Cellular Automata (QCA) is one of the powerful alternative to CMOS technology because of its low power and high speed. Because of the nano structure, Quantum dot cells are prone to get displaced or omitted during fabrication. Thus, it is very important to have the architecture of QCA gates to be resistant to such fabrication errors. Though many architectures have already been proposed for providing fault tolerance, percentage of fault tolerance provided by them is less than the architecture that we are proposing in this paper. In this paper we are proposing a new architecture to Majority Voter(MV) so as to make it fault tolerant to fabrication errors. We have also compared the proposed architecture to the existing ones for the cell misplacement effects namely single cell omission, extra cell deposition. Also, kink energy associated with the proposed architecture is calculated and is proved that the proposed architecture dissipates less power. Fault tolerant encoder and decoder are designed and simulated using the proposed fault tolerant MV. These encoders and decoders find application in Image Steganography.

关键词： Fault tolerance Fault tolerant systems computer architecture Decoding Fabrication Logic gates simulation

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Proceedings of the IEEE international conference on Engineering of Complex computer systems, ICECCS

Proceedings of the IEEE International Conference on Engineer...

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22nd international conference on Engineering of Complex computer systems, ICECCS 2017

ISBN: (纸本)9781538624319

The proceedings contain 23 papers. The topics discussed include: efficient parameter synthesis using optimized state exploration strategies;integrating tools: co-simulation in UPPAAL using FMI-FMU;TLSsem: a TLS security-enhanced mechanism against MITM attacks in public WiFis;distributed object-oriented design of autonomous control systems for connected vehicle platoons;BigrTiMo-a process algebra for structure-aware mobile systems;learning likely invariants to explain why a program fails;enhancing knowledge sharing in stack overflow via automatic external web resources linking;a composition mechanism for refinement-based methods;class modularization using indirect relationships;reachability analysis of self modifying code;a unified framework for throughput analysis of streaming applications under memory constraints;speeding up type-specific instrumentation for the analysis of complex systems;multi-modeling approach to performance engineering of cyber-physical systems design;towards solving decision making problems using probabilistic model checking;software reliability modeling and analysis via kernel-based approach;a model driven method to design and analyze secure architectures of systems-of-systems;and functional requirements-based automated testing for avionics.

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Objective Clustering Inductive Technology of Gene Expression Sequences Features 13th

Objective Clustering Inductive Technology of Gene Expression...

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13th international Scientific conference on Beyond Databases, architectures and Structures (BDAS)

作者： Babichev, Sergii Lytvynenko, Volodymyr Korobchynskyi, Maxim Taiff, Mochamed Ali Univ JE Purkyne Czech Republ 8Ceske Mladeze St Usti Nad Labem 40096 Czech Republic Kherson Natl Tech Univ Kherson Ukraine Mil Diplomat Acad Named Eugene Bereznyak Kiev Ukraine

ISBN: (纸本)9783319582740

Technology of high dimensional data features objective clustering based on the methods of complex systems inductive modeling is presented in the paper. Architecture of the objective clustering inductive technology as a block diagram of step-by-step implementation of the objects clustering procedure was developed. Method of criterial evaluation of complex data clustering results using two equal power data subsets is proposed. Degree of clustering objectivity evaluates on the basis of complex use of internal and external criteria. Researches on the simulation results of the proposed technology based on the SOTA self-organizing clustering algorithm using the gene expression data obtained by DNA microarray analysis of patients with lung cancer GEOD-68571 Array Express database, the datasets "Compound" and "Aggregation" of the Computing School of the Eastern Finland University and the data "seeds" are presented.

关键词： Clustering Inductive modeling Gene expression High dimensional data

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modeling and simulation Study of Photovoltaic DC Arc Faults

Modeling and Simulation Study of Photovoltaic DC Arc Faults

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international conference on Life System modeling and simulation (LSMS) / international conference on Intelligent Computing for Sustainable Energy and Environment (ICSEE)

作者： Li, Zhihua Ye, Zhiqun Wu, Chunhua Xu, Wenxin Shanghai Univ Shanghai Key Lab Power Automat Technol Shanghai 200072 Peoples R China

ISBN: (纸本)9789811063640;9789811063633

The DC arc fault is a major threat to the safety of photovoltaic systems, a large amount of heat from sustained arcs leads to fire accidents. Therefore, detecting the arc faults for PV systems is receiving considerable concern. In order to develop accurate and rapid detection and location methods for arc faults, it is important to establish an arc model to characterize and predict arc characteristics and transient response. In this paper, a new DC arc model is developed from a hyperbolic approximation by observing the arc current and voltage waveforms. Based on the derived model, pink noise is superimposed to obtain better frequency domain characteristics. After comparing the simulation and the experimental results, the model is proved to be suitable for transient simulations. Furthermore, developing detection algorithm and location strategies will also be based on the DC arc model.

关键词： Photovoltaic system DC arc fault Model

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Evaluation of K-SVD embedded with modified 1-norm sparse representation algorithm

Evaluation of K-SVD embedded with modified 1-norm sparse rep...

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international conference on Life System modeling and simulation, LSMS 2017 and international conference on Intelligent Computing for Sustainable Energy and Environment, ICSEE 2017

作者： Wang, Meixi Liu, Jingjing Ma, Shiwei Liu, Wanquan School of Mechatronic Engineering and Automation Shanghai University Shanghai200072 China Department of Computer Science Curtin University Perth Australia

ISBN: (纸本)9789811063725

The K-SVD algorithm aims to find an adaptive dictionary for a set of signals by using the sparse representation optimization and constrained singular value decomposition. In this paper, firstly, the original K-SVD algorithm, as well as some sparse representation algorithms including 0-norm OMP and 1-norm Lasso were reviewed. Secondly, the revised Lasso algorithm was embedded into the K-SVD process and a new different K-SVD algorithms with 1-norm Lasso embedded in (RL-K-SVD algrithm) was established. Finally, extensive experiments had been completed on necessary parameters determination, further on the performance compare of recovery error and recognition for the original K-SVD and RL-K-SVD algorithms. The results indicate that within a certain scope of parameter settings, the RL-K-SVD algorithm performs better on image recognition than K-SVD;the time cost for training sample number is lower for RL-K-SVD in case that the sample number is increased to a certain extend. © 2017, Springer Nature Singapore Pte Ltd.

关键词： Singular value decomposition

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Time-Triggered Conversion of Guards for Reachability Analysis of Hybrid Automata 1

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15th international conference on Formal Modelling and Analysis of Timed systems (FORMATS)

作者： Bak, Stanley Bogomolov, Sergiy Althoff, Matthias Air Force Res Lab Dayton OH 45433 USA Australian Natl Univ Canberra ACT Australia Tech Univ Munich Munich Germany

ISBN: (数字)9783319657653

ISBN: (纸本)9783319657653;9783319657646

A promising technique for the formal verification of embedded and cyber-physical systems is flow-pipe construction, which creates a sequence of regions covering all reachable states over time. Flow-pipe construction methods can check whether specifications are met for all states, rather than just testing using a finite and incomplete set of simulation traces. A fundamental challenge when using flow-pipe construction on high-dimensional systems is the cost of geometric operations, such as intersection and convex hull. We address this challenge by showing that it is often possible to remove the need to perform high-dimensional geometric operations by combining two model transformations, direct time-triggered conversion and dynamics scaling. Further, we prove the overapproximation error in the conversion can be made arbitrarily small. Finally, we show that our transformation-based approach enables the analysis of a drivetrain system with up to 51 dimensions.

关键词： embedded systems

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Proceedings - 2010 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2010

Proceedings - 2010 International Conference on Embedded Comp...

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2010 10th international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2010

ISBN: (纸本)9781424479382

The proceedings contain 46 papers. The topics discussed include: cycle-accurate performance modeling in an ultra-fast just-in-time dynamic binary translation instruction set simulator;a trace-based scenario database for high-level simulation of multimedia MP-SoCs;a library of dual-clock FIFOs for cost-effective and flexible MPSoCs design;transparent sampling;design of a flexible high-speed FPGA-based flow monitor for next generation networks;a fully programmable FSM-based processing engine for gigabytes/s header parsing;empirical evaluation of data transformations for network infrastructure applications;design environment for the support of configurable network interfaces in NoC-based platforms;an efficient realization of forward integer transform in H.264/AVC intra-frame encoder;SIMD performance in software based mobile video coding;and real-time stereo vision system using semi-global matching disparity estimation: architecture and FPGA-implementation.

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