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Managing complexity in heterogeneous system specification, simulation, and synthesis

Managing complexity in heterogeneous system specification, s...

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international conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： A. Kalavade J.L. Pino E.A. Lee Dept. of Electr. Eng. & Comput. Sci. California Univ. Berkeley CA USA Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA

System-level design is characterized by a behavioral specification and heterogeneous hardware/software implementations. Exploring the design space is essential for good design. Specifying and managing complex design flows, tracking dependencies and tool invocations, and maintaining consistency of design data and flows are key issues that enable efficient design space exploration. In order to manage the complexity of this design process, an infrastructure that manages these issues, transparent to the user, is presented. These concepts have been implemented in the Ptolemy environment within a framework called DesignMaker. An example design flow for multiprocessor synthesis is presented in some detail to illustrate the features of DesignMaker. The end objective of the framework is to facilitate a flexible system-level codesign assistant.

关键词： Hardware Space exploration System-level design Process design Computational modeling embedded system Control systems Telecommunication control Software tools computer simulation

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A new fault-tolerant scheduling technique for real-time multiprocessor systems

A new fault-tolerant scheduling technique for real-time mult...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： T. Tsuchiya Y. Kakuda T. Kikuno Department of Information and Computer Sciences Faculty of Engineering Science Osaka University Toyonaka Osaka Japan

In multiprocessors used for implementing real-time applications, it is strongly required to ensure that tasks' deadlines are met in spite of faults. In this paper, we discuss fault-tolerant task scheduling techniques in real-time multiprocessor systems where aperiodic tasks arrive dynamically. For fault-tolerance, multiple copies of each task have to be scheduled on distinct processors in such systems. The authors propose a new technique for efficiently scheduling copies of tasks having small laxity. Then, we integrate our technique with previous work and develop a new scheduling algorithm, removing the assumption on task laxity. simulation results show the effectiveness of our technique.

关键词： Fault tolerant systems Real time systems Multiprocessing systems Processor scheduling Scheduling algorithm Fault tolerance Fault detection Application software Dynamic scheduling Computational modeling

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A soft aperiodic task scheduling algorithm in dynamic-priority systems

A soft aperiodic task scheduling algorithm in dynamic-priori...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： Sungyoung Lee Hyungill Kim Jongwon Lee Department of Computer Engineering Kyung Hee University Seoul South Korea Software Research Laboratory Korea Telecom Seoul South Korea

ISBN: (纸本)0818671068

In this paper, we present a joint scheduling of hard deadline periodic and soft deadline aperiodic tasks in dynamic-priority systems. The proposed algorithm has extended the fixed-critical task indicating (CTI) algorithm developed by the authors previously (1995). The dynamic-CTI algorithm is operated in such a way that dynamic-priority assignment strategy for a given periodic task set and the information on a deadlinewise preassignment table, called dynamic-CTI table, are mixed dynamically according to the aperiodic tasks' arrivals at runtime. The algorithm has a predictability and a less computational complexity in calculating the slacks since it uses the dynamic-CTI table. Our simulation study shows that the dynamic-CTI scheduling has better performance than the fixed-CTI algorithm which is even better than the slack stealing algorithms, especially under a heavy, transient overload.

关键词： Scheduling algorithm Processor scheduling Dynamic scheduling Runtime Computational complexity Delay Heuristic algorithms Computational modeling Telecommunication computing Prediction algorithms

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An algorithm with constant execution time for dynamic storage allocation

An algorithm with constant execution time for dynamic storag...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： T. Ogasawara Advanced Compiler Group IBM Japan Limited Yamato Kanagawa Japan

The predictability of the computation time of program modules is very important for estimating an accurate worst-case execution time (WCET) of a task in real-time systems. Dynamic storage allocation (DSA) is a common programming technique. Although many DSA algorithms have been developed, they focus on the average execution time rather than the WCET, making it is very difficult to calculate their WCET accurately. In this paper, we propose a new algorithm called Half-Fit whose WCET can be calculated accurately. The algorithm finds a free block without searching on a free list or tree, allowing extra unusable memory called incomplete memory use. In a simulation following a queueing model of M/G//spl infin/, Half-Fit has the advantage over the binary buddy system of more efficient storage utilization. The binary buddy system is a conventional algorithm whose WCET can be calculated.

关键词： Real time systems High level languages Dynamic programming Laboratories Processor scheduling Programming profession Computational modeling Scheduling algorithm computer architecture Upper bound

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A high fidelity ATM traffic and network simulator 95

A high fidelity ATM traffic and network simulator

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Proceedings of the 27th conference on Winter simulation

作者： Brian W. Unger Fabian Gomes Xiao Zhonge Pawel Gburzynski Theodore Ono-Tesfaye Srinivasan Ramaswamy Carey Williamson Alan Covington Computer Science Department University of Calgary Calgary Alberta T2N 1N4 Canada Computer Science Department University of Alberta Edmonton Alberta T6G 2M7 Computer Science Department University of Saskatchewan Jade Simulations International Calgary Alberta T2N 3P9

ISBN: (纸本)9780780330184

The design of an ATM traffic and network (ATM-TN) simulator which characterizes cell level network behavior is presented. The simulator incorporates three classes of ATM traffic source models: an aggregate ethernet model, an MPEG model and a World Wide Webb transactions model. Six classes of ATM switch architectures are modeled including output buffered, shared memory buffered and cross bar switch models, and then multistage switches which can be built from these three basic models. The ATM-TN simulator can be used to characterize arbitrary ATM networks with dynamic multimedia traffic loads. Call set up and tear down via ATM signaling is implemented in addition to the various types of cell traffic streams generated by voice, video and data. The simulator is built on a simple, efficient simulation language called SimKit which is capable of supporting both fast sequential and parallel execution. Parallel execution is supported using WarpKit, an optimistically synchronized kernel that is aimed at shared memory multiprocessor platforms such as the Silicon Graphics Powerchallenge and Sun Spare 1000 series machines. The paper outlines general requirements for ATM traffic and network simulation, presents an ATM-TN simulator architecture, describes its major components and discusses the major issues associated with cell level ATM modeling and simulation.

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Analytical modeling of multithreaded pipeline performance

Analytical modeling of multithreaded pipeline performance

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The 27th Hawaii international conference on System Sciences, HICSS-27

作者： Dubey, Pradeep K. Krishna, Arvind Flynn, Michael J. T.J. Watson Research Cent Yorktown Heights NY United States

ISBN: (纸本)0818650508

The throughput of pipelined processors suffers due to delays associated with instruction dependencies and memory latencies. Multithreaded architectures try to tolerate such delays by sharing the pipeline with independent instruction threads. This paper proposes an analytic model which is used to quantitate the advantage of multithreaded architectures. The analytic model provides an exact solution, which is significantly better than bounds obtainable from simpler approximate techniques. Unlike previous analytic models of such systems, the model presented here accepts a general distribution for the interlock delays with multiple latencies. The model provides a much quicker performance estimate than simulation. The model has been validated for a variety of input distributions using previously published simulation-based results.

关键词： Pipeline processing systems

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Prototype domain modeling environment for reusable software architectures

Prototype domain modeling environment for reusable software ...

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Proceedings of the 3rd international conference on Software Reuse: Advances in Software Reusability

作者： Gomaa, H. Kerschberg, L. Sugumaran, V. Bosch, C. Tavakoli, I. George Mason Univ Fairfax United States

This paper describes a prototype domain modeling environment used to demonstrate the concepts of reuse of software requirements and software architectures. The environment, which is application-domain independent, is used to support the development of domain models and to generate target system specifications from them. The prototype environment consists of an integrated set of commercial-off-the-shelf software tools and custom developed software tools. The concept of reuse is prevalent at several levels of the domain modeling method and prototype environment. The environment is domain-independent thereby supporting the specification of diverse application domain models. The domain modeling method specifies a family of systems rather than a single system;optional features characterize the variations in functional requirements supported by the family, and individual family members are specified by the features they are to support. The knowledge-based approach to target system generation provides the rules for generating target system specifications from the domain model;target system specifications, themselves, may be stored in an object repository for subsequent retrieval and reuse.

关键词： computer simulation

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modeling symmetric computer architectures by swns 15th

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15th international conference on Application and Theory of Petri Nets, 1994

作者： Chiola, G. Franceschinis, G. Gaeta, R. Dipartimento di Informatica Università degli Studi di Torino Corso Svizzera 185 Torino10149 Italy

ISBN: (纸本)9783540581529

Timed and Stochastic Well-formed colored nets (SWNs) have been introduced as a good modeling tool for complex systems with inherently high degree of symmetry. Analysis and simulation algorithms allow the automatic exploitation of model symmetries to improve their efficiency. Fairly strong constraints are posed over the color definition syntax in order to support such automatic symmetry exploitation as compared to other high level Petri net formalisms. In this paper we derive several models of parallel computer architectures in order to show not only that the formalism is adequate for this class of applications, but also how the different types of symmetries can be mapped into the allowed specification formalism. From this set of case studies we conclude that SWNs are an "intermediate level" formalism, closer to the application domain than P/T nets, yet requiring some ingenuity and experience from the modeler in order to exploit their (high) potential. © 1994, Springer Verlag. All rights reserved.

关键词： computer architecture

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INFRARED TARGET simulation ENVIRONMENT FOR PATTERN-RECOGNITION APPLICATIONS 5

INFRARED TARGET SIMULATION ENVIRONMENT FOR PATTERN-RECOGNITI...

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conference on Infrared Imaging systems: Design, Analysis, modeling, and Testing V

作者： SAVAKIS, AE GEORGE, N UNIV ROCHESTER MED CTRDEPT PHYSIOLROCHESTERNY 14642

ISBN: (纸本)0819415286

The generation of complete databases of IR data is extremely useful for training human observers and testing automatic pattern recognition algorithms. Field data may be used for realism, but require expensive and time-consuming procedures. IR scene simulation methods have emerged as a more economical and efficient alternative for the generation of IR databases. A novel approach to IR target simulation is presented in this paper. Model vehicles at 1:24 scale are used for the simulation of real targets. The temperature profile of the model vehicles is controlled using resistive circuits which are embedded inside the models. The IR target is recorded using an Inframetrics dual channel IR camera system. Using computer processing we place the recorded IR target in a prerecorded background. The advantages of this approach are: (1) the range and 3D target aspect can be controlled by the relative position between the camera and model vehicle; (2) the temperature profile can be controlled by adjusting the power delivered to the resistive circuit; (3) the IR sensor effects are directly incorporated in the recording process, because the real sensor is used; (4) the recorded target can embedded in various types of backgrounds recorded under different weather conditions, times of day etc. The effectiveness of this approach is demonstrated by generating an IR database of three vehicles which is used to train a back propagation neural network. The neural network is capable of classifying vehicle type, vehicle aspect, and relative temperature with a high degree of accuracy.

关键词： Infrared imaging Infrared radiation Sensors Infrared cameras 3D modeling Infrared sensors Neural networks Databases Cameras Environmental sensing

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DESIGN AND modeling OF A NOVEL FIBROUS SHAPE-MEMORY ALLOY (SMA) ACTUATOR

DESIGN AND MODELING OF A NOVEL FIBROUS SHAPE-MEMORY ALLOY (S...

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Smart Structures and Materials 1994 conference - Smart Structures and Intelligent systems

作者： SHAHINPOOR, M WANG, GP UNIV NEW MEXICO COLL ENGNINTELLIGENT MAT STRUCT & SYST LABALBUQUERQUENM 87131

ISBN: (纸本)0819414859

Presented is a novel design of a composite linear actuator utilizing a parallel array of contractile shape-memory alloy (SMA) wires. The fiber bundle of SMA wires is either circumscribed inside a helical compression spring with flat heads or are in parallel with a number of helical compression springs, end-capped by two parallel circular plates with embedded electrodes to which the ends of the SMA wires are secured. Thus, the wires can be electrically heated and subsequently contracted to compress the helical compression spring. Upon cooling the SMA wires expand and allow the helical compression spring to tightly stretch them to their initial length. Design details are first fully described. Steps involved in the fabrication of a number of these composite SMA actuators are then elaborated on. A number of interesting heat transfer phenomena are observed. In essence the dynamic behavior of the actuator depends on the interaction between the current supplied to the wires and the rate of heat transfer from the wires due to convection and radiation. A design model is finally presented for the dynamic response of contractile fiber bundles embedded in or around elastic springs that are either linear helical compression springs, hyperelastic springs such as rubberlike materials, or nonlinear springs such as air. The fiber bundle is assumed to consist of a parallel array of contractile fibers made from contractile shape-memory alloy (SMA) wires. The proposed model considers the temperature- induced contraction of the fibers due to resistive heating of the shape-memory wires. Results of both dynamic computer simulation and dynamics of a prototype model built in our laboratory indicate a fairly good comparison.

关键词： Shape memory alloys Actuators Mathematical modeling Composites systems modeling computer simulations Iron Convection Electrodes Head

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