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检索条件"任意字段=International Conference on Embedded Computer Systems -Architectures, Modeling and Simulation"

共 2875 条记录，以下是311-320 订阅

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BIBNet: An Efficient Super Resolution with Bottleneck-In-Bottleneck

BIBNet: An Efficient Super Resolution with Bottleneck-In-Bot...

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international Joint conference on Neural Networks (IJCNN)

作者： Simyung Chang Keuntek Lee Shobhit Jain Cheul-hee Hahm Visual Display Division Samsung Electronics Suwon Korea

ISBN: (数字)9781728169262

ISBN: (纸本)9781728169279

Deep Neural Networks have enabled remarkable progress in the field of single image super resolution (SR). However, these models are often large and complex to be applied for real-world applications with limited resources as in mobile and embedded systems. We investigate whether the typical low latency models as MobileNet can be expected of comparable efficiency at SR tasks with recently reported SR performance in the literature. To this end, a moderate and effective architecture, Bottleneck-In-Bottleneck (BIB), is introduced in this paper. The BIB uses multiple expansion factors of the residual blocks in the form of a bottleneck, reducing computation complexity while utilizing advantageous factors of large feature dimensions. We also propose BIBNet with multiple BIB blocks, which can easily adjust its size and computational cost to create a variety of efficient and high-performance models. Extensive experiments show that, with fewer parameters and computations, BIBNet achieves highly competitive performance compared to other conventional SR methods with more complex architectures.

关键词： Convolution Computational modeling Image resolution computer architecture Task analysis Computational efficiency Machine learning

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NS-3 Model of an IoT network

NS-3 Model of an IoT network

引用

international conference on Computing, Communication & Automation (ICCCA)

作者： Ravi Kishore Kodali Bysani Kirti National Institute of Technology Warangal WARANGAL

ISBN: (数字)9781728163246

ISBN: (纸本)9781728163253

The Internet of Things is making significant changes to the world we live in from the way we drive to how we make purchases. The Internet of Things platform is responsible for collecting diverse information from sophisticated sensors and providing a common language for devices and apps to communicate with each other. A typical IoT network consists of various embedded sensors, processors and communication hardware. To know how a designed network would perform in real-time, the need for a simulation tool arises as buying the resources necessary for experimental purposes becomes very expensive. ns-3 is one such tool used for simulating real-world networks by writing scripts in C++ and Python on a single computer. ns-3 helps to create various virtual nodes and with the help of the various Helper classes it provides, we can install the necessary devices, internet stacks, application, etc. to our nodes. This paper aims to design and construct an IoT-based network, simulate it using ns-3 and understand how the simulation results obtained can be put to use.

关键词： Computational modeling simulation Tools Writing Real-time systems Sensors Internet of Things

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Evaluation of Approximate Operators Case Study: Sobel Filter Application Executed On An Approximate RISC-V Platform 18

Evaluation of Approximate Operators Case Study: Sobel Filter...

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18th international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Ndour, Genevieve Jost, Tiago Trevisan Molnos, Anca Durand, Yves Tisserand, Arnaud Univ Grenoble Alpes CEA LETI Grenoble France Univ Rennes 1 CNRS INRIA IRISA Rennes France Univ Bretagne Sud CNRS Labs STICC UMR 6285 Lorient France

ISBN: (纸本)9781450364942

Approximate computing techniques have been proposed to decrease the energy consumption or improve the performance of computation. Several designs of approximate arithmetic operators are proposed in the literature, suggesting that the operators' energy can be reduced up to 46%. This paper puts existing work in perspective by studying the impact of these operators in a processor targeting the embedded systems. We augment a RISC-V processor with approximate addition and multiplication that support a variable bit-width in the range of 1 to 16 bits. We investigate the error-energy trade-off for a Sobel filter application. The results indicate that, for an acceptable output image degradation, 7.5% of the energy is saved. We conclude that the benefits of using approximate operators in embedded systems processors, have yet to be proved.

关键词： embedded systems approximate computing operators energy

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Fast Parallel simulation of a Manycore Architecture with a Flit-level On-chip Network Model 18

Fast Parallel Simulation of a Manycore Architecture with a F...

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18th international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Kang, Shin-haeng Kang, Jintaek Ha, Soonhoi Seoul Natl Univ Seoul South Korea

ISBN: (纸本)9781450364942

The reliance on simulation for the design of a new architecture continues to increase as the complexity of the architecture increases with more cores integrated and a complex communication fabric. A good compromise between the simulation speed and accuracy should be made in order to explore the wide architectural design space at the early design phase. In this work, we present a novel manycore simulator that achieves fast and scalable performance with a trace-driven parallel simulation technique. Since the communication delay affects the simulation accuracy heavily, the proposed simulator supports a high-speed accurate on-chip network model, which can capture link/buffer congestions. Its development is motivated by an industry project to design a new manycore architecture with 96 cores with a NoC architecture. Experimental results show that the proposed simulator could run real parallel benchmark applications with more than 450 Kcycles/sec/core. It marks a Pareto-optimal simulator between speed and accuracy, compared with existent simulators.

关键词： Manycore Network-on-chip Parallel simulation

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Upgrade of the Ball and Plate Laboratory Model 16th

Upgrade of the Ball and Plate Laboratory Model

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16th international-Federation-of-Automatic-Control (IFAC) conference on Programmable Devices and embedded systems PDES

作者： Brezina, Adam Tkacik, Milan Tkacik, Tomas Jadlovska, Slavka Tech Univ Kosice Fac Elect Engn & Informat Dept Cybernet & Artificial Intelligence Letna 9 Kosice 04200 Slovakia

This paper deals with the overall hardware and software upgrade of the Ball&Plate laboratory model used at the Center of Modern Control Techniques and Industrial Informatics (CMCT&II) at Department of Cybernetics and Artificial Intelligence (DCAI), FEEI, TUKE. Reasons for upgrading the model are described, along with the proposed solution. Design and construction of new control hardware for the model is presented. The paper next describes the implementation of program modules for controlling the position of the ball on the plate at level of the MicroController Unit (MCU) and the supervisor computer. Several approaches of image recognition with the purpose to obtain ball position are tested and compared. Finally, the paper presents the model-based design and verification of a PSD control algorithm for the Ball&Plate model. After the upgrade, the model can be used at the CMCTSLII for both research and teaching purposes, with the emphasis on the implementation of applications with high demands on hardware performance, where higher sampling rates of the control algorithms are required. (C) 2019, IFAC (international Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved.

关键词： Cyber-physical systems Electronic design embedded systems Image processing Unstable system computer vision

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Optimizing Cellular Automata Execution by Distributed Discrete Event simulation Techniques

Optimizing Cellular Automata Execution by Distributed Discre...

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Euromicro conference on Parallel, Distributed and Network-Based Processing

作者： Andrea Giordano Donato D’Ambrosio Rocco Rongo William Spataro Alessio De Rango ICAR-CNR Rende Cosenza Italy Department of Matematics and Computer Science University of Calabria Rende Cosenza Italy Department of Environmental Engineering University of Calabria Rende Cosenza Italy

ISBN: (数字)9781728165820

ISBN: (纸本)9781728165837

Cellular Automata (CA) are parallel models well-suited for studying complex systems that are based on local rules of evolution. Notable examples of application are found in fluid-dynamics, crowd simulation, flow-simulation and many more. Nevertheless, CA can be fruitfully exploited as a support in numerical approaches, such as finite element and finite volume methods. Though easily parallelizable by domain partitioning among the nodes of a parallel system, the performance and scalability of cellular automata executed on parallel/distributed machines are limited due to the need of synchronizing nodes at each computational step. With the aim of reducing the synchronization burden, we here present a preliminary study on techniques stemmed from the Discrete-Event simulation field for the optimization of CA on distributed memory architectures. Preliminary results, executed in a distributed memory environment, have shown the usefulness of the considered approach in reducing execution times and therefore in improving the speed up of the parallel execution of the test case.

关键词： Computational modeling Automata Synchronization Numerical models Optimization Memory architecture Mathematical model

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A New Generic HLS Approach for Heterogeneous Computing On the Feasibility of High-Level Synthesis in HSA-Compatible systems 18

A New Generic HLS Approach for Heterogeneous Computing On th...

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18th international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Holzinger, Philipp Reichenbach, Marc Fey, Dietmar Friedrich Alexander Univ Erlangen Nuremberg Chair Comp Architecture Dept Comp Sci Erlangen Germany

ISBN: (纸本)9781450364942

Recent advances like deep learning algorithms or virtual reality applications require an amount of computational power in increasingly smaller devices never seen before. Heterogeneous architectures are seen as a solution to this problem, since they provide a significantly better performance per watt. However, their comparatively difficult integration and programming are a major drawback of this solution. The Heterogeneous System Architecture (HSA) Foundation accepted this problem and published a set of specifications to provide a uniform solution for different architectures. This has been successfully applied to GPUs and DSPs, but is insufficiently researched for FPGAs. However, the usage of reconfigurable logic can further increase the efficiency of embedded systems, while the hurdle of integration can be lowered by high-level synthesis (HLS). Therefore, a combination of the HSA specifications with HLS seems worthwhile to increase the heterogeneity and ease the programmability of FPGAs. This paper provides a suitability analysis of the HSA Intermediate Language (HSAIL) for HLS with suggestions for further improvements to the specification as well as an associated proof of concept. The results show that it is indeed possible to build such a hybrid HLS flow based on the HSA standard, where parts of the process can be shared with other classes of accelerators like GPUs. This implies that progress in the GPU sector like the available source languages can faster carry over to FPGAs and improve the general accessibility.

关键词： Heterogeneous System architectures HSA Foundation High-Level Synthesis HLS Hardware Accelerator FPGA

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Model-Based Design Streamlines for STM32 Motor Control embedded Software System*

Model-Based Design Streamlines for STM32 Motor Control Embed...

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international conference on Control, Decision and Information Technologies (CoDIT)

作者： Loubna BELHAMEL Arturo BUSCARINO Antonio CUCUCCIO Luigi FORTUNA Gaetano RASCONA University of Catania Catania Italy CNR-IASI Italian National Research Council-Institute for Systems Analysis and Computer Science A.Ruberti Rome Italy STMicroelectronics Catania Italy

ISBN: (数字)9781728159539

ISBN: (纸本)9781728159546

This paper presents a Model-Based Design (MBD) methodology as a promising approach for the rapid and se-cure development of embedded System applications, including those involving digital controllers. Based on existing hardware and software application-oriented tools by STMicroelectronics, a new modeling technique has been implemented to move from a traditional design workflow to an MBD one by using Mathworks ® software platform. For a practical application of the proposed approach, a case study is reported to design a Permanent Magnet Synchronous Motor (PMSM) drive based on the STM32 MCU family. The main contribution of this paper is to make focus on concretely building a unique model architecture of a complex software/hardware system able to implement all the major aspects of MBD methodology such as executable requirements, Normal and Processor-In-the-Loop (PIL) simulation modes, continuous test and verification, automatic code generation. To achieve this purpose, a new Simulink ® blockset dedicated to the STM32 Motor Control ecosystem was developed. It includes Simulink blocks for maths, algorithms, and IPs, electronic circuitries, MCU peripherals, speed sensors. Simulink ® embedded Coder tool has been used to automatically generate code for a specific STM32 MCU tar-get to overcome the time consuming and error-prone problems of the handwritten coding.

关键词： Motor drives Software packages Mathematical model Hardware Libraries Integrated circuit modeling Tools

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1st international conference on Adaptive Instructional systems, AIS 2019, held as part of the 21st international conference on Human-computer Interaction, HCI international 2019

1st International Conference on Adaptive Instructional Syste...

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1st international conference on Adaptive Instructional systems, AIS 2019, held as part of the 21st international conference on Human-computer Interaction, HCI international 2019

ISBN: (纸本)9783030223403

The proceedings contain 50 papers. The special focus in this conference is on Adaptive Instructional systems. The topics include: Ibigkas! 2.0: Directions for the Design of an Adaptive Mobile-Assisted Language Learning App;Adaptive Learning Technology for AR Training: Possibilities and Challenges;intelligent Tutoring Design Alternatives in a Serious Game;missing Pieces: Infrastructure Requirements for Adaptive Instructional systems;standards Needed: Competency modeling and Recommender systems;measuring the Complexity of Learning Content to Enable Automated Comparison, Recommendation, and Generation;Capturing AIS Behavior Using xAPI-like Statements;standardizing Unstructured Interaction Data in Adaptive Instructional systems;exploring Methods to Promote Interoperability in Adaptive Instructional systems;adaptive Team Training for One;Examining Elements of an Adaptive Instructional System (AIS) Conceptual Model;interoperability Standards for Adaptive Instructional systems: Vertical and Horizontal Integrations;integrating Engagement Inducing Interventions into Traditional, Virtual and embedded Learning Environments;productive Failure and Subgoal Scaffolding in Novel Domains;adaptation and Pedagogy at the Collective Level: Recommendations for Adaptive Instructional systems;developing an Adaptive Trainer for Joint Terminal Attack Controllers;using an Adaptive Intelligent Tutoring System to Promote Learning Affordances for Adults with Low Literacy Skills;development of Cognitive Transfer Tasks for Virtual Environments and Applications for Adaptive Instructional systems;application of Theory to the Development of an Adaptive Training System for a Submarine Electronic Warfare Task;learning Analytics of Playing Space Fortress with Reinforcement Learning;adaptive Training: Designing Training for the Way People Work and Learn;wrong in the Right Way: Balancing Realism Against Other Constraints in simulation-Based Training;adaptive Remediation with Multi-modal Content.

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CHIPS-AHOy: A Predictable Holistic Cyber-Physical Hypervisor for MPSoCs 18

CHIPS-AHOy: A Predictable Holistic Cyber-Physical Hypervisor...

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18th international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Muck, Tiago Frohlich, Antonio A. Gracioli, Giovani Rahmani, Amir M. Reis, Joao Gabriel Dutt, Nikil Univ Calif Irvine Irvine CA 92697 USA Univ Fed Santa Catarina Florianopolis SC Brazil

ISBN: (纸本)9781450364942

Virtual machines (VMs) are being deployed on embedded systems to integrate multiple applications with different run-time requirements on the same physical platform. In scenarios such as autonomous vehicles, these virtualized platforms must handle varying application requirements-from strict temporal predictability to high performance-while simultaneously satisfying disparate constraints such as energy efficiency, thermal bounds, and system lifetime. To address these challenges we present CHIPS-AHOy, a prediCtable HolIstic cyber-PhySicAl HypervisOr that integrates VM isolation mechanisms with novel resource allocation approaches within a holistic observe-decide-adapt loop to achieve run-time predictability and simultaneously manage energy, thermal and wearout constraints. We present experimental results on several realistic MPSoC platforms that demonstrate the ability of CHIPS-AHOy to achieve predictable operation while conserving energy, managing temperature and extending system lifetime.

关键词： Heterogeneous Multi-core Processor Power Management Operating systems Virtualization Real Time Predictability

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