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检索条件"任意字段=International Conference on Embedded Computer Systems -Architectures, Modeling and Simulation"

共 2877 条记录，以下是31-40 订阅

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High-Level simulation of embedded Software Vulnerabilities to EM Side-Channel Attacks 22nd

High-Level Simulation of Embedded Software Vulnerabilities t...

引用

22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Thimmaiah, Aditya Iyer, Vishnuvardhan V. Gerstlauer, Andreas Orshansky, Michael Univ Texas Austin Dept Elect & Comp Engn Austin TX 78712 USA

ISBN: (纸本)9783031150746;9783031150739

Attacks on embedded devices using the electromagnetic (EM) side channel have proliferated. Predicting software vulnerability to such attacks requires an ability to simulate EM fields during software development rather than relying on expensive lab-based measurements. We propose a modeling approach capable of synthesizing instruction-level EM traces for arbitrary software, using a one-time pre-characterization of a processor. Reducing the cost of dictionary construction is a major contribution of this paper. Results on a set of benchmarks show that synthesized traces are accurate in estimating EM emanations with less than 5% mean absolute percentage error (MAPE) compared to measurements. Furthermore, synthesized traces predict control flow leakage with an accuracy of 87% or more based on the side-channel vulnerability factor (SVF) metric.

关键词： embedded security EM side-channel EM simulation

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Application Runtime Estimation for AURIX embedded MCU Using Deep Learning 22nd

Application Runtime Estimation for AURIX Embedded MCU Using ...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Fricke, Florian Scharoba, Stefan Rachuj, Sebastian Konopik, Andreas Kluge, Florian Hofstetter, Georg Reichenbach, Marc BTU Cottbus Senftenberg Cottbus Germany Friedrich Alexander Univ Erlangen Nurnberg Erlangen Germany Elekt Fahrwerksyst GmbH Gaimersheim Germany

ISBN: (纸本)9783031150746;9783031150739

Estimating execution time is a crucial task during the development of safety-critical embedded systems. Processor simulation or emulation tools on various abstraction levels offer a trade-off between accuracy and runtime. Typically, this requires detailed knowledge of the processor architecture and high manual effort to construct adequate models. In this paper, we explore how deep learning may be used as an alternative approach for building processor performance models. First, we describe how to obtain training data from recorded execution traces. Next, we evaluate various neural network architectures and hyperparameter values. The accuracy of the best network variants is finally compared to two simple baseline models and a mechanistic model based on the QEMU emulator. As an outcome of this evaluation, a model based on the Wavenet architecture is identified, which outperforms all other approaches by achieving a mean absolute percentage error of only 1.63%.

关键词： embedded processor Performance estimation Artificial neural networks

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Accurate LLVM IR to Binary CFGs Mapping for simulation of Optimized embedded Software 21st

Accurate LLVM IR to Binary CFGs Mapping for Simulation of Op...

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21st international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Cornaglia, Alessandro Viehl, Alexander Bringmann, Oliver FZI Res Ctr Informat Technol Karlsruhe Germany Univ Tubingen Tubingen Germany

ISBN: (纸本)9783031045806;9783031045790

In this paper, we present a new approach for mapping LLVM IR to binary machine code for overcoming the current limitations of host-based simulations of performance-critical embedded software imposed by compiler optimizations. Our novel, fully automated mapping approach even copes with aggressive compiler optimizations without requiring any modification to the compiler or the need of expert supervision. Experimental results show that accurate mappings are produced even when compiling with the highest level of optimization (average error below 2%). The proposed simulation methodology provides a speedup of at least 26 compared to the widely used gem5 simulator.

关键词： Performance estimation Host-based simulation IR to binary CFGs mapping Design space exploration

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Embeddings of Task Mappings to Multicore systems 21st

Embeddings of Task Mappings to Multicore Systems

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21st international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Goens, Andres Castrillon, Jeronimo Tech Univ Dresden Chair Compiler Construct Ctr Adv Elect Dresden Cfaed Dresden Germany

ISBN: (纸本)9783031045806;9783031045790

The problem of finding good mappings is central to designing and executing applications efficiently in embedded systems. In heterogeneous multicores, which are ubiquitous today, this problem yields an intractably large design space of possible mappings. Most methods explore this space using heuristics, many of which implicitly use geometric notions in mappings. In this paper we explore the geometry of the mapping problem explicitly, for finding embeddings of the mapping space that capture its structure. This allows us to formulate new mapping strategies by leveraging the geometry of the mapping space, as well as improving existing heuristics that do so implicitly. We evaluate our approach on a novel mapping heuristic based on gradient descent, as well as multiple existing meta-heuristics. For complex architectures, our methods improved the results of established exploration meta-heuristics by about an order of magnitude in average.

关键词： Mapping

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The TEXTAROSSA Approach to Thermal Control of Future HPC systems 22nd

The TEXTAROSSA Approach to Thermal Control of Future HPC Sys...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Fornaciari, William Terraneo, Federico Agosta, Giovanni Giuseppe, Zummo Saraceno, Luca Lancione, Giorgia Gregori, Daniele Celino, Massimo Politecn Milan Milan Italy Quattro Srl Rome Italy E4 Comp Engn SpA Scandiano Italy Agenzia Nazl Nuove Tecnol Energia & Sviluppo Econ Rome Italy

ISBN: (纸本)9783031150746;9783031150739

Thermal control is a key aspect of large-scale HPC centers, where a large number of computing elements is employed. Temperature is directly related to both reliability, as excessing heating of components leads to a shorter lifespan and increased fault probability, and power efficiency, since a large fragment of power is used in the cooling system itself. In this paper, we introduce the TEXTAROSSA approach to thermal control, which couples innovative two-phase cooling with multi-level thermal control strategies able to address thermal issues at system and node level.

关键词： High Performance Computing 2-phase cooling Thermal modeling and control

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Automatic Search-Space Compression in System-Level Design Space Exploration Using Deep Generative Models 21st

Automatic Search-Space Compression in System-Level Design Sp...

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21st international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Richthammer, Valentina Glass, Michael Ulm Univ Inst Embedded Syst Real Time Syst Ulm Germany

ISBN: (纸本)9783031045806;9783031045790

Major challenges for system-level Design Space Exploration (DSE) include (a) tremendous search-space sizes for modern many-core architectures and networked systems and (b) the preponderance of infeasible solutions in the search space from which no actual implementations can be derived. Since current DSE approaches are not equipped to handle these developments, we propose the integration of deep generative models into DSE to automatically compress large-scale search spaces, thus (I) reducing problem complexity faced by the optimizer while (II) learning a model of feasible solutions to focus the optimization on. The proposed approach is seamlessly integrated into state-of-the-art DSE flows, is complementary to existing search-space pruning techniques, and its potential to improve optimization quality by up to approximate to 66% is demonstrated for a variety of DSE problems.

关键词： Design automation Deep learning Compression

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Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory systems 22nd

Tagged Geometric History Length Access Interval Prediction f...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Razilov, Viktor Wittig, Robert Matus, Emil Fettweis, Gerhard Tech Univ Dresden Vodafone Chair Mobile Commun Syst D-01062 Dresden Germany

ISBN: (纸本)9783031150746;9783031150739

In embedded systems, tightly coupled memories (TCMs) are usually shared between multiple masters for the purpose of performance scalability, hardware efficiency and software flexibility. On the one hand, memory sharing improves area utilization, but on the other hand, this can lead to a performance degradation due to an increase in access conflicts. To mitigate the associated performance penalty, access interval prediction (AIP) has been proposed. In a similar fashion to branch prediction, AIP exploits program flow regularity to predict the cycle of the next memory access. We show that this structural similarity allows for adaption of state-of-the-art branch predictors, such as the TAgged GEometric history length (TAGE) branch predictor. Our analysis on memory access traces reveals that the obtained TAGE access interval predictor predicts over 97% of memory accesses outperforming all previously presented AIP schemes.

关键词： Memory prediction Access interval Shared memory MPSoC

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A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms 22nd

A Hybrid Performance Prediction Approach for Fully-Connected...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Dariol, Quentin Le Nours, Sebastien Pillement, Sebastien Stemmer, Ralf Helms, Domenik Gruettner, Kim Nantes Univ IETR UMR CNRS 6164 Nantes France German Aerosp Ctr DLR SE Cologne Germany

ISBN: (纸本)9783031150746;9783031150739

Predicting the performance of Artificial Neural Networks (ANNs) on embedded multi-core platforms is tedious. Concurrent accesses to shared resources are hard to model due to congestion effects on the shared communication medium, which affect the performance of the application. Most approaches focus therefore on evaluation through systematic implementation and testing or through the building of analytical models, which tend to lack of accuracy when targeting a wide range of architectures of varying complexity. In this paper we present a hybrid modeling environment to enable fast yet accurate timing prediction for fully-connected ANNs deployed on multi-core platforms. The modeling flow is based on the integration of an analytical computation time model with a communication time model which are both calibrated through measurement inside a system level simulation using SystemC. The ANN is described using the Synchronous DataFlow (SDF) Model of Computation (MoC), which offers a strict separation of communications and computations and thus enables the building of separated computation and communication time models. The proposed flow enables the prediction of the end-to-end latency for different mappings of several fully-connected ANNs with an average of 99.5% accuracy between the created models and real implementation.

关键词： Performance prediction Multi-processor systems SystemC simulation models Artificial neural networks

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A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power modeling for Heterogeneous Platforms 22nd

A Data-Driven Approach to Lightweight DVFS-Aware Counter-Bas...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Mazzola, Sergio Benz, Thomas Forsberg, Bjoern Benini, Luca Swiss Fed Inst Technol Integrated Syst Lab IIS Zurich Switzerland Univ Bologna DEI Bologna Italy

ISBN: (纸本)9783031150746;9783031150739

Computing systems have shifted towards highly parallel and heterogeneous architectures to tackle the challenges imposed by limited power budgets. These architectures must be supported by novel power management paradigms addressing the increasing design size, parallelism, and heterogeneity while ensuring high accuracy and low overhead. In this work, we propose a systematic, automated, and architecture-agnostic approach to accurate and lightweight DVFS-aware statistical power modeling of the CPU and GPU sub-systems of a heterogeneous platform, driven by the sub-systems' local performance monitoring counters (PMCs). Counter selection is guided by a generally applicable statistical method that identifies the minimal subsets of counters robustly correlating to power dissipation. Based on the selected counters, we train a set of lightweight, linear models characterizing each sub-system over a range of frequencies. Such models compose a lookup-table-based system-level model that efficiently captures the non-linearity of power consumption, showing desirable responsiveness and decomposability. We validate the system-level model on real hardware by measuring the total energy consumption of an NVIDIA Jetson AGX Xavier platform over a set of benchmarks. The resulting average estimation error is 1.3%, with a maximum of 3.1%. Furthermore, the model shows a maximum evaluation runtime of 500 ns, thus implying a negligible impact on system utilization and applicability to online dynamic power management (DPM).

关键词： Power modeling Energy estimation Performance counters Heterogeneous systems Linear models

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SIDAM: A Design Space Exploration Framework for Multi-sensor embedded systems Powered by Energy Harvesting 22nd

SIDAM: A Design Space Exploration Framework for Multi-sensor...

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22nd international conference on embedded computer systems - architectures, modeling, and simulation (SAMOS)

作者： Sixdenier, Pierre-Louis Wildermann, Stefan Ziegler, Daniel Teich, Juergen Friedrich Alexander Univ Erlangen Nurnberg FAU Erlangen Germany

ISBN: (纸本)9783031150746;9783031150739

Multi-sensor embedded systems often consist of a central unit being responsible to manage a heterogeneous set of attached sensors. Particularly when such systems are deployed in areas without access to a static power supply, they have to be powered using energy harvesting to operate autonomously. Objectives such as availability and data loss rate depend on the set of attached sensors, the system configuration (e.g., used photovoltaic (PV) module, batteries, and data storage), as well as environmental factors such as the location of the deployed system. Moreover, also the employed energy management strategy and its parametrization severely influence the system characteristics. In fact, different strategies can lead to different tradeoffs in terms of the above objectives. In this paper we propose a design methodology to automatically explore the design space of configurations of multi-sensor embedded systems and to determine and configure the best energy management strategy for a given sensor configuration and location. Our methodology includes a real-time analysis and a simulation-based DSE to explore the design space. We investigate a case study from a biomonitoring project and demonstrate the benefits of the proposed design methodology: A system-including its configuration and energy management strategy-has to be tailored to the characteristics of the set of attached sensors and the location it operates. Else designs exhibit suboptimal characteristics when operating at sites or for sensor sets for which they were not optimized.

关键词： Design space exploration Energy harvesting Energy management embedded systems

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