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检索条件"任意字段=International Conference on Embedded Computer Systems -Architectures, Modeling and Simulation"

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From Reversible Logic to Quantum Circuits: Logic Design for an Emerging Technology 16

From Reversible Logic to Quantum Circuits: Logic Design for ...

引用

international conference on embedded computer systems - architectures, modeling and simulation (SAMOS)

作者： Wille, Robert Chattopadhyay, Anupam Drechsler, Rolf Johannes Kepler Univ Linz Inst Integrated Circuits A-4040 Linz Austria DFKI GmbH Cyber Phys Syst D-28359 Bremen Germany Nanyang Technol Univ Singapore Singapore Univ Bremen Inst Comp Sci D-28359 Bremen Germany

ISBN: (纸本)9781509030767

Quantum computing has been attracting increasing attention in recent years because of the rapid advancements that have been made in quantum algorithms and quantum system design. Quantum algorithms are implemented with the help of quantum circuits. These circuits are inherently reversible in nature and often contain a sizeable Boolean part that needs to be synthesized. The logic design of such quantum circuits constitutes a non-trivial task and, hence, have heavily been investigated by researchers in the recent past. This paper provides a brief overview of these research. We review the major steps to be conducted in the logic design of quantum circuits and provide a sketch for each single step. These descriptions are enriched with discussions as well as references to the respective related work.

关键词： computer circuits

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Automatic recognition of computational kernels for platform-dependent code optimizations 16

Automatic recognition of computational kernels for platform-...

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16th international conference on embedded computer systems: architectures, modeling and simulation, SAMOS 2016

作者： Blanco, Maria H. Rodriguez Reinke, Georg Ascheid, Gerd Leupers, Rainer Institute for Communication Technologies and Embedded Systems RWTH Aachen University Aachen52056 Germany

ISBN: (纸本)9781509030767

We present a novel approach that assists the task of porting code to an embedded platform. Our tool automatically identifies code segments in the input program that can be replaced with optimized kernels from a platform-dependent library. Using a C-function as a model that describes the computational kernel, the tool identifies equivalent code regardless of syntactic and computational variations. For a case study using the Texas Instruments C66x DSP library, our approach identified code replacement opportunities that resulted in runtime performance speedups of up to 2.2x. © 2016 IEEE.

关键词： C (programming language)

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Proceedings - 2010 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2010: Preface

Proceedings - 2010 International Conference on Embedded Comp...

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Proceedings - 2010 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2010 2010年

作者： Kurdahi, Fadi J. Takala, Jarmo

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A Quasi-Cycle Accurate Timing Model for Binary Translation Based Instruction Set Simulators 16

A Quasi-Cycle Accurate Timing Model for Binary Translation B...

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international conference on embedded computer systems - architectures, modeling and simulation (SAMOS)

作者： Schreiner, Soeren Goergen, Ralph Gruettner, Kim Nebel, Wolfgang OFFIS Inst Informat Technol Oldenburg Germany Carl von Ossietzky Univ Oldenburg Dept Comp Sci Oldenburg Germany

ISBN: (纸本)9781509030767

Software defines the functionality of today's Cyber-Physical systems (CPS). Many product innovations are based on software and thus the complexity of software, even when running on platforms equipped with small microprocessors, is increasing dramatically. This calls for adequate embedded software integration testing, even before the actual hardware platform is available. The application of virtual platforms for functional validation, that allows simulating CPS running real target platform application code on a generic host computer, is currently being adopted by the industry. Since the correct behavior of a CPS not only depends on the correctness of computation but also on its timeliness, virtual platforms contain a certain notion of time. This work focuses on enhancing OVP processor models by a quasi-cycle accurate timing model. This paper demonstrates and evaluates the accuracy of the proposed timing model against real hardware measurements for the Xilinx MicroBlaze and ARM Cortex-M0 processors. Results show a mean error of 0.16% for the MicroBlaze and 0.72% for the ARM Cortex-M0 processor over all considered benchmarks, which is a clear improvement compared to previous published work.

关键词： Open Virtual Platform quasi-cycle accurate simulation

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Performance modeling of networked control systems

Performance modeling of networked control systems

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international conference on Ultra Modern Telecommunications and Workshops (ICUMT)

作者： Paul J. Kuehn Sebastian Scholz Siyuan Cao Fei Li Institute of Communication Networks and Computer Engineering (IKR) University of Stuttgart Stuttgart Germany

Networked Control systems (NCS) form a key element of Cyber-Physical systems (CPS) where sensors, actuators (plants) and controller functions are spatially distributed and interconnected by communication networks. In this contribution models are developed where significant properties of communication networks such as stochastic delays, error control protocols and shared-network influences are embedded in a closed-loop control system. The resulting integrated systems are analyzed by methods of classical system-theoretic and discrete-time state analysis methods as well as by computer simulations. Fundamental insights in the properties of NCSs can already be gained through system-theoretic studies on basic architectures which provide closed-form expressions which are verified and extended by more detailed studies based on tool-supported discrete-time system state analysis and simulation-tool results. The approach allows for a more detailed detection of network protocol impacts on, e.g., the real-time behavior of NCSs when certain Service Level Agreements (SLA) have to be guaranteed as prescribed percentiles of control reaction times.

关键词： Delays Mathematical model Error correction Media Access Protocol Computational modeling Probability density function

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Exploring System Performance using Elastic Traces: Fast, Accurate and Portable 16

Exploring System Performance using Elastic Traces: Fast, Acc...

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international conference on embedded computer systems - architectures, modeling and simulation (SAMOS)

作者： Jagtap, Radhika Diestelhorst, Stephan Hansson, Andreas Jung, Matthias Wehn, Norbert ARM Res Cambridge England Univ Kaiserslautern Microelect Syst Design Res Grp Kaiserslautern Germany

ISBN: (纸本)9781509030767

simulation tools are indispensable to computer architects. Detailed execution-driven CPU models offer high accuracy, but at the cost of simulation speed. Trace-driven simulation is widely adopted to alleviate this problem, especially for studies focusing on memory-system exploration. Ideally, trace-driven core models will mimic out-of-order processors executing full-system workloads to enable computer architects to evaluate modern systems. Additionally, to be useful to the broader community the tracing and replay models should be publicly available. However, existing trace-driven approaches are limited in their applicability and availability. We propose elastic traces in which we accurately capture data and load/store order dependencies by instrumenting a detailed out-of-order processor model. In contrast to existing work, we do not rely on offline analysis of timestamps, and instead use accurate dependency information tracked inside the processor pipeline. We thereby account for the effects of speculation and branch misprediction resulting in a more accurate trace playback. We provide a trace player that honours the dependencies and thus adapts its execution time to memory-system changes, as would the actual CPU. Compared to the detailed CPU, our trace player achieves a speed-up of 6-8 times. When modifying the memory-system parameters, the average error in absolute execution time is 7% for SPEC 2006 benchmarks on a bare metal system and 17% for HPC benchmarks on Linux. Relative performance is predicted with less than 3% error, achieving fast and accurate system performance exploration. We make this functionality available to the broader community via a widely-used open source full-system simulator.

关键词： computer operating systems

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Real-time Tasks and Voltage/Frequency Controller Collaboration on Low Power Energy Operational systems 16

Real-time Tasks and Voltage/Frequency Controller Collaborati...

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international conference on embedded computer systems - architectures, modeling and simulation (SAMOS)

作者： Goncalves, Rawlinson S. Pinheiro, Diego Q. Valentin, Eduardo B. Oliveira, Horacio A. B. F. Barreto, Raimundo S. Univ Fed Amazonas Inst Comp Manaus Amazonas Brazil

ISBN: (纸本)9781509030767

embedded systems have evolved significantly in recent years, mainly due to advances in technology, cost reduction of electronic equipment, and the popularization of mobile devices. Many of these systems require energy resources from battery to maintain the operation of their various components. However, to increase the autonomy of these devices, several techniques and methodologies have been implemented to better manage energy consumption of the system as a whole. This requirement has contributed to the rise of various lines of research, including the area of real-time systems, in which the complicating factor is not only reducing energy consumption but also respecting the time constraints of all tasks running on the system. Thus, this work aims to minimize energy consumption by using intra-task dynamic voltage and frequency scaling (DVFS) technique, through a collaborative approach between real-time applications and the operating system. Therefore, both can work together, within the kernel of the system, to reduce the overhead of the processor context switches, mainly after preemptions. The experimental results, using C-Benchmarks, showed that it is possible to decrease about 6% of processor power consumption even performing all tasks in the worst case.

关键词： Energy utilization

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Hybrid code description for developing fast and resource efficient image processing architectures 16

Hybrid code description for developing fast and resource eff...

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16th international conference on embedded computer systems: architectures, modeling and simulation, SAMOS 2016

作者： Haublein, Konrad Reichenbach, Marc Reiche, Oliver Akif Ozkan, M. Fey, Dietmar Hannig, Frank Teich, Jurgen Computer Architecture Martensstraße 3 Erlangen91058 Germany Hardware-Software-Co-Design Cauerstraße 11 Erlangen91058 Germany

ISBN: (纸本)9781509030767

Image processing algorithms applied on programmable embedded systems very often do not meet the given constraints in terms of real time capability. Mapping these algorithms to reconfigurable hardware solves this issue, but demands further specific knowledge in hardware development. The design process can be accelerated by code generation through high-level synthesis, which is very flexible. However, the quality of synthesis depends on many factors like the provided constraints, code description, and algorithmic complexity. Hence, optimizing these parameters may improve the generated results in terms of logic and memory utilization, as well as data throughput and synthesis duration. In this work, we aim to exploit domain-specific knowledge for a hybrid code description in order to benefit from rapid development through high-level synthesis in combination with throughput optimized generic hardware descriptions. By utilizing code generation techniques, the entire design flow gets accelerated. Our synthesis results show a similar resource utilization and achievable throughput to a pure HDL described hardware. © 2016 IEEE.

关键词： Codes (symbols)

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Fast and cycle-accurate simulation of multi-threaded applications on SMP architectures using hybrid prototyping 16

Fast and cycle-accurate simulation of multi-threaded applica...

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international conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

作者： Saboori, Ehsan Abdi, Samar Concordia Univ Montreal PQ Canada

ISBN: (纸本)9781450344838

This paper presents a fast and cycle accurate simulation environment for early power-performance analysis of multi-threaded applications targeted to symmetric multiprocessing embedded architectures. Our simulation environment leverages the hybrid prototyping technique, where a lightweight emulation kernel performs logical simulation of multiple identical cores on top of a single physical instance of a core. The technique does not require a detailed timing model of the core hardware because the application threads execute directly on the target core. Previous work on hybrid prototyping supported modeling of only statically scheduled threads, thereby severely limiting its modeling capabilities. In this work, we describe the modeling of dynamic RTOS scheduler as well as hardware interrupts on top of the emulation kernel, in order to support the simulation of unmodified multi-threaded applications. Our experimental results demonstrate the high accuracy, simulation speed and scalability of our hybrid prototyping-based simulation models.

关键词： Hybrid prototyping embedded systems Multicore design Rapid prototyping Symmetrical Multi Processor Virtual prototyping FPGA prototyping

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A Methodology to Estimate the Energy Consumption and Processing Time for Image Processing Algorithms in Advanced Driver Assistance systems

A Methodology to Estimate the Energy Consumption and Process...

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ARCS 2017;30th international conference on Architecture of Computing systems

作者： Christian Hartmann Christian Widerspick Dietmar Fey Department of Computer Science Chair of Computer Architecture Friedrich-Alexander-University Erlangen-Nurnberg (FAU)

Recent trends in the automotive sector led to the use of more computing architectures inside the car. The reason for this increase is the usage of new advanced driver assistance systems (ADAS) in order to avoid human made accidents. Headed by Tesla, BMW and Mercedes all vast automobile manufacturer attempt to integrate ADAS systems inside their cars. With increasing system complexity and increasing costs a methodology to determine the functional properties and also to predict the non-functional properties is necessary in the early project stages. In contrast to systems with standard PC solutions, image processing advanced driver assistance systems are part of the embedded field. These systems have strict constraints such as processing time and energy consumption. Nowadays, simulation environments are used to consider the non-functional properties in the early stages of the design phase. These simulators are often inaccurate and have long simulation time for complex systems. In our work we introduce a novel methodology, based on the reuse distance theory to estimate non-functional properties for image processing algorithms in advanced driver assistance systems.

关键词： advanced driver assistance systems (ADAS) image processing algorithm processing time energy consumption Driver Assistance systems functional characteristics Cars design phases

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