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19th Workshop on Dependable Smart embedded and Cyber-Physical systems and systems-of-systems, DECSoS 2024, 11th international Workshop on Next Generation of System Assurance Approaches for Critical systems, SASSUR 2024, Towards A Safer systems architecture Through Security, TOASTS 2024 and 7th international Workshop on Artificial Intelligence Safety Engineering, WAISE 2024 held in conjunction with the 43rd international conference on computer Safety, Reliability, and Security, SAFECOMP 2024

19th Workshop on Dependable Smart Embedded and Cyber-Physica...

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19th Workshop on Dependable Smart embedded and Cyber-Physical systems and systems-of-systems, DECSoS 2024, 11th international Workshop on Next Generation of System Assurance Approaches for Critical systems, SASSUR 2024, Towards A Safer systems architecture Through Security, TOASTS 2024 and 7th international Workshop on Artificial Intelligence Safety Engineering, WAISE 2024 held in conjunction with the 43rd international conference on computer Safety, Reliability, and Security, SAFECOMP 2024

ISBN: (纸本)9783031687372

The proceedings contain 36 papers. The special focus in this conference is on computer Safety, Reliability, and Security. The topics include: Security and Safety in Urban Environments: Evaluating Threats and Risks of Autonomous Last-Mile Delivery Robots;safe Road-Crossing by Autonomous Wheelchairs: A Novel Dataset and Its Evaluation;automating an Integrated Model-Driven Approach to Analysing the Impact of Cyberattacks on Safety;Securing Web Access: PUF-Driven Two-Factor Authentication for Enhanced Protection;enhancing Tunnel Safety with Artery V2X simulation for Real-Time Risk Assessment;detecting and Mitigating Errors in Neural Networks;challenges and Limitations of Utilizing Multi-core/Heterogeneous Logic Elements in the Railway Signaling Applications;identifying Difficult Environmental Conditions with Scenario-Based Hazard and Fault Analysis;Using GPT-4 to Generate Failure Logic;towards an Argument Pattern for the Use of Safety Performance Indicators;enabling Theory-Based Continuous Assurance: A Coherent Approach with Semantics and Automated Synthesis;Managing Changing Product Liability Obligations Emerging from New Proposed EU Directive;reaching Consensus on System-of-systems Resilience Assurance: A Case of Mobility as a Service;a Deductive Approach to Safety Assurance: Formalising Safety Contracts with Subjective Logic;a New Approach to Creating Clear Operational Safety Arguments;including Defeaters in Quantitative Confidence Assessments for Assurance Cases;multivariate Security Breach Probability: The Gordon-Loeb Model with Copulas;quantum Machine Learning: Perspectives in Cybersecurity;Security modeling Challenges and Research Directions Around the ADVISE Meta Framework;Capability Ambient DO – A Usable Tool for Linux System Security;VUOS: A User-Space Hypervisor Based on System Call Hijacking;cyber Risk Propagation on Networks;where Do Safety and Security Mutually Reinforce? A Multi-level Model-Based Approach for a Consistent Interplay;a Flow-Based Credibilit

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5th international conference on Reliability, Safety and Security of Railway systems: Modelling, Analysis, Verification and Certification, RSSRail 2023

5th International conference on Reliability, Safety and Secu...

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5th international conference on Reliability, Safety and Security of Railway systems: Modelling, Analysis, Verification and Certification, RSSRail 2023

ISBN: (纸本)9783031433658

The proceedings contain 13 papers. The special focus in this conference is on international conference on Reliability, Safety and Security of Railway systems: Modelling, Analysis, Verification and Certification. The topics include: Halfway Generic Verification of Railway Control systems;Safety Analysis of Automatic Train Operation Based on ETCS;a Tool-Chain for the Verification of Geographic Scheme Data;towards Scenario-Based Certification of Highly Automated Railway systems;preface;remaining Useful Life Estimation for Railway Gearbox Bearings Using Machine Learning;TrainSec: A simulation Framework for Security modeling and Evaluation in CBTC Networks;A Formal Model of Train Control with AI-Based Obstacle Detection;Modelling, Visualisation and Proof of an ETCS Level 3 Moving Block System;automating an Analysis of Safety-Security Interactions for Railway systems;Dependability Analysis of UPS architectures for the Italian Railway Signaling System.

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Measuring and Interpreting Dependent Task-Based Applications Performances 15th

Measuring and Interpreting Dependent Task-Based Application...

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15th international conference on Parallel Processing and Applied Mathematics, PPAM 2024

作者： Pereira, Romain Gautier, Thierry Roussel, Adrien Carribault, Patrick Avalon LIP ENS Inria Lyon France LIHPC CEA DAM DIF Arpajon91297 France

ISBN: (纸本)9783031856969

Breaking down the parallel time into work, idleness, and overheads is crucial for assessing the performance of HPC applications, but difficult to measure in asynchronous dependent tasking runtime systems. No existing tools allow its measurement portably and accurately. This paper introduces POT: a tool-suite for dependent task-based applications performance measurement. We focus on its low-disturbance methodology consisting of task modeling, discrete-event tracing, and post-mortem simulation-based analysis. It supports the OMPT standard OpenMP specifications. The paper evaluates the precision of POT’s parallel time breakdown analysis on LLVM and MPC implementations and shows that measurement bias may be neglected above 16μs workload per task, portably across two architectures and OpenMP runtime systems © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Discrete event simulation

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Adaptive Modulation and Coding in 5G Networks with Deep Learning

Adaptive Modulation and Coding in 5G Networks with Deep Lear...

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2024 IEEE international conference on Communication, Computing and Signal Processing, IICCCS 2024

作者： Gupta, Anjula Reddy, Nirmala Shnain, Ammar Hameed Revathi, K. Gopalakrishnan, S. Verma, Chetan K. Chandigarh Group of Colleges Chandigarh Engineering College Department of Computer Application Punjab Jhanjeri Mohali140307 India Ies College of Technology Department of Computer Science & Engineering M.P. Bhopal India The Islamic University College Of Technical Engineering Department Of Computers Techniques Engineering Najaf Iraq The Islamic University Of Al Diwaniyah College Of Technical Engineering Department Of Computers Techniques Engineering Al Diwaniyah Iraq Prince Shri Venkateshwara Padmavathy Engineering College Chennai India Hindustan Institute of Technology and Science Department of Information Technology Tamil Nadu Chennai603103 India Cvm University Mbit Gujrat India

ISBN: (纸本)9798350390759

As part of the present work, it aims to examine the use of deep learning in the improvement of AMC in 5G networks. While traditional AMC methods like the ones mentioned above are applicable to previous generations of the mobile networks, they are not optimal taking into consideration the complexities and the constantly evolving nature of 5G systems. Therefore, we suggest the use of convolutional and recurrent neural networks with the aim of employing deep learning in designing an adaptive system that is capable of predicting the optimal modulation and coding schemes given instantaneous CSI information. It covers data gathering, process modeling, and implementation on a platform designed for 5G consumer network. Thus, the improvement in the data throughput rate, the level of errors, and the degree of satisfaction, obtained through the experimental results, can confirm the optimal nature of the proposed approach. It can be seen that the deep learning-based AMC system is computationally efficient and can be embedded for real-time applications, and the performance of the system is further optimised with improving learning. To conclude, this study reveals the effectiveness of deep learning in transforming AMC in 5G networks, by offering a dependable and dynamic solution the wired and wireless telecommunications networks. In a future work more towards detailing of the model and finding new architectures for the system more refined system can be achieved. © 2024 IEEE.

关键词： 5G mobile communication systems

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Intelligent Traffic Signal Control System Based on Improved YOLOv8 and Deep Reinforcement Learning 6

Intelligent Traffic Signal Control System Based on Improved ...

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6th international conference on Frontier Technologies of Information and computer, ICFTIC 2024

作者： Liu, Ziyuan Chen, Hongxiang Wang, Jiajie Deng, Tianqi Liu, Mingshuo Zhao, Guodong School of computer science and technology Harbin Engineering University Harbin150001 China

ISBN: (纸本)9798331541750

As urban traffic pressure continues to increase, existing traffic systems have achieved some success in improving vehicle throughput. However, they commonly face issues such as insufficient precision in visual recognition models, traffic signal control algorithms that neglect pedestrian needs, and excessive reliance on hardware infrastructure, leading to high deployment complexity. To address these challenges, an intelligent traffic system based on an improved YOLOv8 model and Deep Q-Network (DQN) algorithm is proposed. The system consists of a road dataization module and a traffic signal control module. In the road dataization module, the improved YOLOv8 model incorporates an attention mechanism to efficiently recognize vehicle information and uses OpenCV to process traffic images, enabling accurate data modeling. In the traffic signal control module, the enhanced DQN algorithm dynamically adjusts signal durations to balance the needs of pedestrians and vehicles, thereby improving traffic efficiency. Verified through the SUMO simulation platform, this approach demonstrates significant ad-vantages in optimizing traffic flow and throughput. Furthermore, by leveraging algorithmic data analysis of the environment, the system reduces dependency on hardware infrastructure, significantly lowering deployment complexity and showing strong potential for practical application. Additionally, the design of a visualized front-end interface and an embedded display system enhances the system's usability and integrity, validating its feasibility. © 2024 IEEE.

关键词： Traffic signals

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21st international Colloquium on Theoretical Aspects of Computing, ICTAC 2024

21st International Colloquium on Theoretical Aspects of Comp...

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21st international Colloquium on Theoretical Aspects of Computing, ICTAC 2024

ISBN: (纸本)9783031770180

The proceedings contain 22 papers. The special focus in this conference is on Theoretical Aspects of Computing. The topics include: Well-Behaved (Co)algebraic Semantics of Regular Expressions in Dafny;jump Complexity of Deterministic Finite Automata with Translucent Letters;learning Closed Signal Flow Graphs;dual Adjunction Between Ω-Automata and Wilke Algebra Quotients;on Concurrent Program Algebra and Demonic Automata;bisimulations and Logics for Higher-Dimensional Automata;maximizing Weighted Dominance in the Plane;generalized Parikh Matrices for Tracking Subsequence Occurrences;card-Based Protocols with Single-Card Encoding;winning Strategy Templates for Stochastic Parity Games Towards Permissive and Resilient Control;disconnection Rules are Complete for Chemical Reactions;verification with Common Knowledge of Rationality for Graph Games;reversibility in Process Calculi with Nondeterminism and Probabilities;a Theory of Proc-Omata—and Proof Methods for Process architectures;Formal Foundations for Efficient simulation of MOM systems: The Refinement Calculus for Object-Oriented Event-Graphs;type Safety for Isabelle/Solidity;history-Based Reasoning About Behavioral Subtyping;switched systems in Coq for modeling Periodic Controllers;A Quantum-Inspired Mechanical Method for Proving of Ramsey’s Theorem by Symbolic Computation over the Finite Field GF(2);runtime Enforcement with Event Reordering.

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19th international conference on the Economics of Grids, Clouds, systems, and Services, GECON 2022

19th International Conference on the Economics of Grids, Clo...

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19th international conference on the Economics of Grids, Clouds, systems, and Services, GECON 2022

ISBN: (纸本)9783031293146

The proceedings contain 16 papers. The special focus in this conference is on Economics of Grids, Clouds, systems, and Services. The topics include: Edge Computing Applications in Industrial IoT: A Literature Review;a Black-Box Graph Partitioner for Generalized Deep Neural Network Parallelization;Selective Data Migration Between Locality Groups in NUMA systems;A Framework to Support Decision-Making Based on AI and simulation of Large-Scale Models;a Game-Theoretic Approach for Pricing and Determining Quality Levels of Cybersecurity Products Under an Exogenous Information-Sharing Program;design and Implementation of a Compiler for simulation of Large-Scale Models;serverless Computing: Introduction and Research Challenges;A Business Model for Multi-tiered Decentralized Software Frameworks: The Case of ONTOCHAIN;HOCC: An Ontology for Holistic Description of Cluster Settings;effect of Trust and Institutional Quality on Cloud Federation Formation Using Agent-Based modeling;a Game-Theoretic Approach for Pricing and Determining Virtual Reality Investment and Cybersecurity Level in a Dual-Channel Supply Chain;semi-automated Capacity Analysis of Limitation-Aware Microservices architectures;edge-to-Cloud Solutions for Self-adaptive Machine Learning-Based IoT Applications: A Cost Comparison;exploring Blockchain-Based Management for LoRa IoT Nodes.

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modeling a microprocessor with RISC architecture

Modeling a microprocessor with RISC architecture

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Automatics and Informatics (ICAI), international conference

作者： Ilian Varbov Petar Minev Matyo Dinev Valentina Kukenska Computer Systems and Technologies Technical University-Gabrovo Gabrovo Bulgaria

ISBN: (数字)9798350353907

ISBN: (纸本)9798350353914

Microprocessors with RISC architecture are widely used in various fields, including mobile devices, embedded systems, and high-performance computing. They are an essential component of computer systems. The selection of a suitable microprocessor architecture is required in the automated design and implementation of various computer configurations. This makes the development of various computer models of microprocessors *** (Reduced Instruction Set computer) is an architectural approach to processor design that is characterized by the use of a small set of simple and fast instructions. The main idea behind this approach is to simplify the processor hardware, allowing more instructions to be executed in less time. Microprocessors with RISC architectures are optimized for performance by:•Use of fixed instruction length.•Maintaining a large set of registers for fast data access.•Avoidance of complex operations and instructions that execute slowly.•Using techniques such as pipelining to improve *** this report, the developed Verilog model of a microprocessor with RISC architecture is presented. A description of the modeled architecture and the Verilog models of its building blocks is made. The Vivado development environment and its built-in visual simulation tools were used for model *** is a hardware description language. It allows the description of the structure and behavior of digital systems at different levels of abstraction: logical, behavioral and register level. This makes it a convenient and appropriate tool in the process of designing and verifying integrated circuits, as well as computer system components.

关键词： Visualization Reduced instruction set computing Microprocessors Computational modeling Architecture computer architecture Hardware Registers Integrated circuit modeling Hardware design languages

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simulation modeling of Reliability of Packet Switching Unit 1

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22nd international conference on Next Generation Teletraffic and Wired/Wireless Advanced Networks and systems, NEW2AN 2022

作者： Abidov, Abdujabbar Abdukhamidovich Tashkent State University of Economics Tashkent Uzbekistan

ISBN: (数字)9783031302589

ISBN: (纸本)9783031302572

Reliability analysis has been a hot research topic since the early 1960s. However, most of the methods were applied at the stage of software implementation. Reliability assessment at an early stage of system design is a faster formal method. It creates a probabilistic real-time system model and time property analysis based on schedule analysis. It proactively identifies potential security threats so costly changes are made during the system design phase. There is a lot of literature that mainly deals with the relationship between task priority and worst-case response time under a fault-tolerant state. Due to the growing security requirements of embedded software, many studies have emerged in the field of fault tolerance and reliability assessment. The traditional approach mainly relies on software testing bug data to predict future bug behavior. The issues of formalization of the problem of a complex hierarchical structure of real-time systems under conditions of a perturbing effect on the control object are considered, the parameters of the object under study are identified, and its simulation model is built. © 2023, The Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Real time systems

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Proceedings of PMBS 2022: Performance modeling, Benchmarking and simulation of High Performance computer systems, Held in conjunction with SC 2022: The international conference for High Performance Computing, Networking, Storage and Analysis

Proceedings of PMBS 2022: Performance Modeling, Benchmarking...

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13th IEEE/ACM international Workshop on Performance modeling, Benchmarking and simulation of High Performance computer systems, PMBS 2022

ISBN: (纸本)9781665451857

The proceedings contain 14 papers. The topics discussed include: ML-based performance portability for time-dependent density functional theory in HPC environments;a comprehensive evaluation of novel ai accelerators for deep learning workloads;frontier vs the exascale report: why so long? and are we really there yet?;evaluating ISO C++ parallel algorithms on heterogeneous HPC systems;going green: optimizing GPUs for energy efficiency through model-steered auto-tuning;performance analysis with unified hardware counter metrics;a methodology for evaluating tightly-integrated and disaggregated accelerated architectures;WfBench: automated generation of scientific workflow benchmarks;high-performance GMRES multi-precision benchmark: design, performance, and challenges;and an initial evaluation of arm’s scalable matrix extension.

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