The proceedings contain 38 papers. The special focus in this conference is on embeddedcomputersystems: architectures, modeling, and simulation. The topics include: QCEDA: Using Quantum computers for EDA;Real-Ti...
ISBN:
(纸本)9783031783760
The proceedings contain 38 papers. The special focus in this conference is on embeddedcomputersystems: architectures, modeling, and simulation. The topics include: QCEDA: Using Quantum computers for EDA;Real-Time Linux on RISC-V: Long-Term Performance Analysis of PREEMPT_RT Patches;RV-VP2: Unlocking the Potential of RISC-V Packed-SIMD for embedded Processing;A Novel System simulation Framework for HBM2 FPGA Platforms;ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs;efficient Post-training Augmentation for Adaptive Inference in Heterogeneous and Distributed IoT Environments;pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator;Vitamin-V: Serverless Cloud Computing Porting on RISC-V;Design and Implementation of an Open Source OpenGL SC 2.0.1 Installable Client Driver and Offline Compiler;Plan Your Defense: A Comparative Analysis of Leakage Detection Methods on RISC-V Cores;iVault: Architectural Code Concealing Techniques to Protect Cryptographic Keys;I2DS: FPGA-Based Deep Learning Industrial Intrusion Detection System;ACRA: A Cutting-Edge Analytics Platform for Advanced Real-Time Corruption Risk Assessment and Investigation Prioritization;post Quantum Cryptography Research Lines in the Italian Center for Security and Rights in Cyberspace;advancing Future 5G/B5G systems: The Int5Gent Approach;RISC-V Accelerators, Enablement and Applications for Automotive and Smart Home in the ISOLDE Project;PMDI: An AI-Enabled Ecosystem for Cooperative Urban Mobility;Open Source Software Randomisation Framework for Probabilistic WCET Prediction on Multicore CPUs, GPUs and Accelerators;a Hypervisor Based Platform for the Development and Verification of Reliable Software Applications.
The proceedings contain 38 papers. The special focus in this conference is on embeddedcomputersystems: architectures, modeling, and simulation. The topics include: QCEDA: Using Quantum computers for EDA;Real-Ti...
ISBN:
(纸本)9783031783791
The proceedings contain 38 papers. The special focus in this conference is on embeddedcomputersystems: architectures, modeling, and simulation. The topics include: QCEDA: Using Quantum computers for EDA;Real-Time Linux on RISC-V: Long-Term Performance Analysis of PREEMPT_RT Patches;RV-VP2: Unlocking the Potential of RISC-V Packed-SIMD for embedded Processing;A Novel System simulation Framework for HBM2 FPGA Platforms;ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs;efficient Post-training Augmentation for Adaptive Inference in Heterogeneous and Distributed IoT Environments;pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator;Vitamin-V: Serverless Cloud Computing Porting on RISC-V;Design and Implementation of an Open Source OpenGL SC 2.0.1 Installable Client Driver and Offline Compiler;Plan Your Defense: A Comparative Analysis of Leakage Detection Methods on RISC-V Cores;iVault: Architectural Code Concealing Techniques to Protect Cryptographic Keys;I2DS: FPGA-Based Deep Learning Industrial Intrusion Detection System;ACRA: A Cutting-Edge Analytics Platform for Advanced Real-Time Corruption Risk Assessment and Investigation Prioritization;post Quantum Cryptography Research Lines in the Italian Center for Security and Rights in Cyberspace;advancing Future 5G/B5G systems: The Int5Gent Approach;RISC-V Accelerators, Enablement and Applications for Automotive and Smart Home in the ISOLDE Project;PMDI: An AI-Enabled Ecosystem for Cooperative Urban Mobility;Open Source Software Randomisation Framework for Probabilistic WCET Prediction on Multicore CPUs, GPUs and Accelerators;a Hypervisor Based Platform for the Development and Verification of Reliable Software Applications.
The proceedings contain 28 papers. The topics discussed include: Picoserver- building a compact energy efficient multiprocessor;challenges in embedded system simulation;towards unified mechanisms for inter-processor c...
ISBN:
(纸本)9781424419852
The proceedings contain 28 papers. The topics discussed include: Picoserver- building a compact energy efficient multiprocessor;challenges in embedded system simulation;towards unified mechanisms for inter-processor communication;a general model of concurrency and its implementation as many-core dynamic RISC processors;a parameterized dataflow language extension for embedded streaming systems;an architecture for the simultaneous execution of hard real-time threads;an adaptive bloom filter cache partitioning scheme for multicore architectures;realizing reconfigurable mesh algorithms on softcore arrays;a light-weight network-on-chip architecture for dynamically reconfigurable systems;systematic design space exploration for customisable multi-processor architectures;and clustering method for the identification of convex disconnected multiple input multiple output instructions.
The proceedings contain 41 papers. The topics discussed include: parallelizing general histogram application for CUDA architectures;abstraction of polychronous dataflow specifications into mode-automata;modeling pipel...
ISBN:
(纸本)9781479901036
The proceedings contain 41 papers. The topics discussed include: parallelizing general histogram application for CUDA architectures;abstraction of polychronous dataflow specifications into mode-automata;modeling pipelined application with synchronous data flow graphs;parallel implementation of real-time semi-global matching on embedded multi-core architectures;a process-based reconfigurable SystemC module for simulation speedup;lightweight resource estimation model to extend battery life in video playback;energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs;an embedded hardware-efficient architecture for real-time cascade support vector machine classification;concurrent multi-level arrays: wait-free extensible hash maps;and fast transaction-level dynamic power consumption modeling in priority preemptive wormhole switching networks on chip.
The proceedings contain 41 papers. The topics discussed include: RACOS: transparent access and virtualization of reconfigurable hardware accelerators;exploring different execution paradigms in exposed datapath archite...
ISBN:
(纸本)9781538634370
The proceedings contain 41 papers. The topics discussed include: RACOS: transparent access and virtualization of reconfigurable hardware accelerators;exploring different execution paradigms in exposed datapath architectures with buffered processing units;system on chip generation for multi-sensor and sensor fusion applications;SysRT: a modular multiprocessor RTOS simulator for early design space exploration;a generic processing in memory cycle accurate simulator under hybrid memory cube architecture;system simulation with gem5 and SystemC;SPynq: acceleration of machine learning applications over spark on Pynq;AND network/system co-simulation for design space exploration of IoT applications.
The proceedings contain 26 papers. The topics discussed include: parallel memory implementation for arbitrary stride accesses;a table-based application-specific prefetch engine for object-oriented embeddedsystems;on ...
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ISBN:
(纸本)1424401550
The proceedings contain 26 papers. The topics discussed include: parallel memory implementation for arbitrary stride accesses;a table-based application-specific prefetch engine for object-oriented embeddedsystems;on the characterization of data cache vulnerability in high-performance embedded microprocessors;reduction of energy consumption in processes by early detection and bypassing of trivial operations;modified hotspot cache architecture: a low energy fast cache for embedded processors;area-aware optimizations for resource constrained branch predictors exploited in embedded processors;chip size estimation for SOC design space exploration;profiling driven scenario detection and prediction for multimedia applications;on the calibration of abstract performance models for system-level design space exploration;and multi-objective topology optimization for networked systems.
The proceedings contain 23 papers. The topics discussed include: a mixed hardware-software approach to flexible artificial neural network training on FPGA;high-speed FPGA-based implementations of a genetic algorithm;h...
ISBN:
(纸本)9781424445011
The proceedings contain 23 papers. The topics discussed include: a mixed hardware-software approach to flexible artificial neural network training on FPGA;high-speed FPGA-based implementations of a genetic algorithm;high-level synthesis for the design of FPGA-based signal processing systems;a physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors;instruction-based reuse-distance prediction for effective cache management;adaptive simulation sampling using an autoregressive framework;an emulation-based real-time power profiling unit for embedded software;generation and calibration of compositional performance analysis models for multi-processor systems;performance evaluation of concurrently executing parallel applications on multi-processor systems;and multi-processor system-on-chip design space exploration based on multi-level modeling techniques.
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