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检索条件"任意字段=International Conference on Embedded Computer Systems Architectures Modeling and Simulation"

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Parallel Verification of UML Using DiVinE Tool

Parallel Verification of UML Using DiVinE Tool

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international conference on computer Science and Information Technology

作者： Muhammad Abdul Basit-Ur-Rahim Jamil Ahmad Fahim Arif Department of Computer Software Engineering Military College of Signals National University of Science & Technology Islamabad Pakistan Research Center for Modeling and Simulation Military College of Signals National University of Science & Technology Islamabad Pakistan

ISBN: (纸本)9781467356107

Unified modeling Language is being used for modeling of business processes, real-time systems, embedded systems and hybrid systems. In software engineering, there are different techniques for verification of such systems. Model checking is one of the techniques for the automatic verification of software models. Earlier, these model were verified by sequential model checking tools. For very large complex systems, parallel verification can save verification time. DiVinE is a model checking tool for both CPUs and GPUs clusters to perform parallel linear time logic (LTL) verification of systems. In this paper, we propose a parallel verification methodology for UML models using DiVinE tool. We explain this methodology by the case study example of fuel filling machine.

关键词： UML Verification DiVinE Parallel Verification UML Verification checking tools central processing units Parallel Lines Complex systems hybrid systems Model checking Business process management Software engineering program verification modelling languages FILLING MACHINE Case studies

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Remote control of mobile robot through 3D virtual reality environment

Remote control of mobile robot through 3D virtual reality en...

引用

international conference on Individual and Collective Behaviors in Robotics (ICBR)

作者： Emna Baklouti Mohamed Jallouli Lobna Amouri Nader Ben Amor Ecole Nationale d'Ingénieurs de sfax ENIS Computer & Embedded Systems Laboratory (CES) Tunisia

This paper describes teleoperation systems for remote control of robot and the use of 3D virtual reality. It presents the adopted architecture and describes the experimental implementation through simulation results f... 详细信息

关键词： Mobile robots Virtual reality Solid modeling Wheels Telerobotics Three-dimensional displays

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Computation of Backpropagation Learning Algorithm Using Neuron Machine Architecture

Computation of Backpropagation Learning Algorithm Using Neur...

引用

international conference on Computational Intelligence, Modelling and simulation (CSSIM)

作者： Jerry B. Ahn Platform and Innovation Group KT Seoul Korea

The neuron machine (NM) is a hardwarearchitecture that can be used to design efficient neural networksimulation systems. However, owing to its intrinsicunidirectional nature, NM architecture does not supportbackpropagation (BP) learning algorithms. This paperproposes novel schemes for NM architecture to support BPalgorithms. Reverse-mapping memories, synapse placementalgorithm, and a memory structure called triple rotatememory can be used to share synaptic weights in both the feedforwardand error BP stages without degrading thecomputational performance. An NM system supporting a BPtraining algorithm was implemented on a field-programmablegate array board and successfully trained a neural networkthat can classify MNIST handwritten digits. The implementedsystem showed a better performance over most chip-level orboard-level systems based on other hardware architectures.

关键词： Neurons computer architecture Hardware Clocks Computational modeling Multiplexing Algorithm design and analysis

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Sneak-path Testing of Memristor-based Memories

Sneak-path Testing of Memristor-based Memories

引用

international conference on VLSI Design

作者： Sachhidh Kannan Jeyavijayan Rajendran Ramesh Karri Ozgur Sinanoglu Department of Electrical and Computer Engineering Polytechnic Institute of New York University Brooklyn USA Department of Engineering New York University Abu Dhabi Abu Dhabi UAE

Memristors are an attractive option for use in future memory architectures due to their non-volatility, low power operation and compactness. Notwithstanding these advantages, memristors and memristor-based memories are prone to high defect densities due to the non-deterministic nature of nanoscale fabrication. As a first step, we will examine the defect mechanisms in memristors and develop efficient fault models. Next, the memory subsystem has to be tested. The typical approach to testing a memory subsystem entails testing one memory element at a time. This is time consuming and does not scale for dense, memristor-based memories. We propose an efficient testing technique to test memristor-based memories. The proposed scheme uses sneak-paths inherent in crossbar memories to test multiple memristors at the same time and thereby reduces the test time by ~32%.

关键词： Memristors Testing Circuit faults Resistance Current measurement Nanoscale devices Integrated circuit modeling

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Automatic visualization interface for coarse grained reconfigurable architecture

Automatic visualization interface for coarse grained reconfi...

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international conference on BioMedical Engineering and Informatics (BMEI)

作者： Lan Cao Xinhong Hao Xiaolin Chen School of Mechatronical Engineering Beijing Institute of Technology Beijing P.R China The Institute for Communication Technologies and Embedded Systems RWTH Aachen University Aachen Germany

ISBN: (纸本)9781479927623

In this paper, a general visualization tool for coarse-grained reconfigurable architecture (CGRA) modeling is introduced. Recently, the increasing requirement for efficient and flexible architectures has significantly boosted the interests in CGRA. However, not too much attention has been paid to visualization tools for the development of CGRAs. This paper contains two main parts of contribution. Firstly, the CGRAs are built with a high level modeling language called FDL. Secondly, a user interface which could present all the information in the FDL model is obtained. Furthermore, the generated configuration bit stream helps to build routing paths on the interface.

关键词： Routing computer architecture Topology Multiplexing Visualization Generators User interfaces

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Verification of Annotated Models from Executions

Verification of Annotated Models from Executions

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international conference on embedded Software

作者： Parasara Sridhar Duggirala Sayan Mitra Mahesh Viswanathan Department of Computer Science University of Illinois at Urbana Champaign Coordinated Science Laboratory University of Illinois at Urbana Champaign

ISBN: (纸本)9781479914425

simulations can help enhance confidence in system designs but they provide almost no formal guarantees. In this paper, we present a simulation-based verification framework for embedded systems described by non-linear, switched systems. In our framework, users are required to annotate the dynamics in each control mode of switched system by something we call a discrepancy function that formally measures the nature of trajectory convergence/divergence of the system. Discrepancy functions generalize other measures of trajectory convergence and divergence like Contraction Metrics and Incremental Lyapunov functions. Exploiting such annotations, we present a sound and relatively complete verification procedure for robustly safe/unsafe systems. We have built a tool based on the framework that is integrated into the popular Simulink/Stateflow modeling environment. Experiments with our prototype tool shows that the approach (a) outperforms other verification tools on standard linear and non-linear benchmarks, (b) scales reasonably to larger dimensional systems and to longer time horizons, and (c) applies to models with diverging trajectories and unknown parameters.

关键词： Verification Switched systems Control modes Legal Executions Verification routine trajectory Liapunov function ANNOTATIONS Frameworks Unknown parameter embedded systems SOUND Vibration Hearing confidence

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modeling and Mitigation of Faults in Cyber-physical systems with Binary Sensors

Modeling and Mitigation of Faults in Cyber-physical Systems ...

引用

IEEE international conference on Computational Science and Engineering, CSE

作者： Volkan Gunes Steffen Peter Tony Givargis Center for Embedded Computer Systems University of California Irvine USA

This paper presents an analysis framework for correct system operation (i.e. system success) of Cyber-Physical systems (CPS) that deploy binary sensors with possible faults. We discuss potential faults in the interface part of such systems and address solutions for those faults in order to build dependable and reliable CPS applications. As a practical tool, we present a set of models in SIMULINK to help system designers extend simulations of general CPS applications that deploy binary sensor networks. We provide methodologies to add well-defined fault behaviors and offer assessment tools to measure the effects of possible faults on the overall system success. We demonstrate the feasibility of our contributions using a CPS application and explore various architectures for fault mitigation in a holistic design space exploration environment. With the ability to help system designers analyze and assess a non-trivial design space, the presented approach contributes to the design of fault-tolerant CPSs.

关键词： Sensor systems Mathematical model Sensor phenomena and characterization Redundancy Generators Cameras

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Development of Hardware-in-Loop simulation Test-Bed for Testing of Navigation System-INS

Development of Hardware-in-Loop Simulation Test-Bed for Test...

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international conference on Machine Intelligence and Research Advancement (ICMIRA)

作者： Rajesh S. Karvande B. Ramesh Kumar Research Centre lmarat Hyderabad India

Hardware-In-Loop simulation (HILS) is the only platform where the dynamics of the subsystem is tested and on-board software is validated in real time environment before the flight trial. The flight systems consist of navigation, guidance and control. The Inertial Navigation system (INS) which is embedded system is sending the required navigation information for the guidance and control algorithm which resides in on-board computer-OBC (embedded system). The plant model is used to create environment near flight condition and to validate guidance and control as well as navigation. The newly developed navigation package based on MIL-STD 1553 communication protocol introduced in HILS for total trajectory dynamics validation in different phases. Firstly the navigation algorithm resided in INS is validated and the sensors i.e. gyros are excited in next step to test for delays, and non linearity. The total methodology adopted for the testing of the navigation package-INS is presented in this paper.

关键词： Computational modeling Navigation Mathematical model computers Sensors Heuristic algorithms Testing

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Optimization of Blind 3D Model Watermarking Using Wavelets and DCT

Optimization of Blind 3D Model Watermarking Using Wavelets a...

引用

international conference on Intelligent systems, Modelling and simulation (ISMS)

作者： Sharvari C. Tamane Ratnadeep R. Deshmukh Vandana Jadhavpatil Department of Computer Science & Information Technology Dr. Babasaheb Ambedkar Marathwada University India

3D model watermarking is a process of inserting data (like text, image, 3D model, audio etc.) into 3D model. Watermark remains in the 3D model even after applying various attacks. The technique proposed here is based on optimization, multi-resolution representation in wavelet domain, and DCT. In this method, the optimized parameter and the watermark scrambled by Arnold Transform is embedded in the DCT mid band coefficients after applying 3 levels Haar transform on 3D model. Blind method is used to extract the watermark. The system is tested and analysed against various 3D models. Analysis shows that the optimized parameter used, increases the PSNR and correlation values of the watermarked models and watermark resp. Results show that the system is robust for similarity transformations, noise, smoothing and cropping attacks.

关键词： Watermarking Solid modeling Optimization Three-dimensional displays Correlation PSNR Transforms

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Adaptive RF Front-end Design via Self-discovery: Using Real-time Data to Optimize Adaptation Control

Adaptive RF Front-end Design via Self-discovery: Using Real-...

引用

international conference on VLSI Design

作者： Debashis Banerjee Aritra Banerjee Abhijit Chatterjee School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA USA

It has been established in prior research that significant power can be saved by dynamically trading off the performance of individual RF modules for power consumption across changing channel conditions. It has also been shown that the control law that reconfigures the RF front end must take into account the process corners from which the RF devices are selected in order to trade off performance for power in an optimal manner (minimum energy/bit at prescribed data throughput). Design of such an optimal control law is virtually intractable due to the complexity of simulating the RF front end across all possible channel and device process conditions. Hence, existing control algorithms are based on a coarse sampling of the channel-process space, suffer from modeling inaccuracies and are inherently sub-optimal from a performance vs. power perspective. In contrast, in this paper, we propose a RF front end control methodology that is optimized during real-time operation, does not require upfront simulation across all channel process conditions and is not susceptible to simulation inaccuracies. This results in far more robust/optimal control as opposed to current practice. A simulated annealing (SA) based framework for process optimization is proposed along with the use of built-in sensors for monitoring of performance and power. simulation results and hardware data are presented to show the feasibility of the proposed approach.

关键词： Radio frequency Tuning Optimization Power demand Performance evaluation Real-time systems Receivers

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