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检索条件"任意字段=International Conference on Embedded Computer Systems Architectures Modeling and Simulation"

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Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested Loops

Design Space Exploration in Application-Specific Hardware Sy...

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international conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)

作者： Corvino, Rosilde Gamatie, Abdoulaye Geilen, Marc Jozwiak, Lech Tech Univ Eindhoven POB 513 NL-5600 MB Eindhoven Netherlands CNRS LIFL Lille France

ISBN: (纸本)9781467322973;9781467322966

Application specific MPSoCs are often used to implement high-performance data-intensive applications. MP-SoC design requires a rapid and efficient exploration of the hardware architecture possibilities to adequately orchestrate the data distribution and architecture of parallel MPSoC computing resources. Behavioral specifications of data-intensive applications are usually given in the form of a loop-based sequential code, which requires parallelization and task scheduling for an efficient MPSoC implementation. Existing approaches in application specific hardware synthesis, use loop transformations to efficiently parallelize single nested loops and use Synchronous Data Flows to statically schedule and balance the data production and consumption of multiple communicating loops. This creates a separation between data and task parallelism analyses, which can reduce the possibilities for throughput optimization in high-performance data-intensive applications. This paper proposes a method for a concurrent exploration of data and task parallelism when using loop transformations to optimize data transfer and storage mechanisms for both single and multiple communicating nested loops. This method provides orchestrated application specific decisions on communication architecture, memory hierarchy and computing resource parallelism. It is computationally efficient and produces high-performance architectures.

关键词： Space Exploration Loops data distribution Custom design COMMUNICATING ARCHITECTURE Synclitism parallelism TASK SCHEDULING data transmission parallelization computer hardware Building construction

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Hierarchical probabilistic regression for AUV-based adaptive sampling of marine phenomena

Hierarchical probabilistic regression for AUV-based adaptive...

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IEEE international conference on Robotics and Automation (ICRA)

作者： Jnaneshwar Das Julio Harvey Frédéric Py Harshvardhan Vathsangam Rishi Graham Kanna Rajan Gaurav S. Sukhatme Robotic Embedded Systems Laboratory Department of Computer Science University of Southern California USA Monterey Bay Aquarium Research Institute CA USA

ISBN: (纸本)9781467356404

Marine phenomena such as algal blooms can be detected using in situ measurements onboard autonomous underwater vehicles (AUVs), but understanding plankton ecology and community structure requires retrieval and analysis of water specimens. This process requires shipboard or manual sample collection, followed by onshore lab analysis which is time-consuming. Better understanding of the relationship between the observable environmental features and organism abundance would allow more precisely targeted sampling and thereby save time. In this work, we present an approach to learn and improve models that predict this relationship. Coupled with recent advances in AUV technology allowing selective retrieval of water samples, this constitutes a new paradigm in biological sampling. We use organism abundance models along with spatial models of environmental features learned immediately after AUV deployments to compute spatial distributions of organisms in the coastal ocean purely from in situ AUV data. We use Gaussian process regression along with the unscented transform to fuse the two models, obtaining both the mean and variance of the organism abundance estimates. The uncertainty in organism abundance predictions is used in a sampling strategy to selectively acquire new water specimens that improves the organism abundance models. simulation results are presented demonstrating the advantage of performing hierarchical probabilistic regression. After the validation through simulation, we show predictions of organism abundance from models learned on lab-analyzed water sample data, and AUV survey data.

关键词： Mathematical model Biology Adaptation models Robots computers Computational modeling Gaussian processes

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Predictable Dynamic embedded Data Processing

Predictable Dynamic Embedded Data Processing

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international conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)

作者： Geilen, Marc Stuijk, Sander Basten, Twan Eindhoven Univ Technol Dept Elect Engn NL-5600 MB Eindhoven Netherlands

ISBN: (纸本)9781467322973;9781467322966

Cyber-physical systems interact with their physical environment. In this interaction, non-functional aspects, most notably timing, are essential to correct operation. In modern systems, dynamism is introduced in many different ways. The additional complexity threatens timely development and reliable operation. Applications often have different modes of operation with different resource requirements and different levels of required quality-of-service. Moreover, multiple applications in dynamically changing combinations share a platform and its resources. To preserve efficient development of such systems, dynamism needs to be taken into account as a primary concern, not as a verification or tuning effort after the design is done. This requires a model-driven design approach in which timing of interaction with the physical environment is taken into consideration;formal models capture applications and their platforms in the physical environment. Moreover, platforms with resources and resource arbitration are needed that allow for predictable and reliable behavior to be realized. Run-time management is further required to deal with dynamic use-cases and dynamic trade-offs encountered at run-time. In this paper, we present a model-driven approach that combines model-based design and synthesis with development of platforms that support predictable, repeatable, composable realizations and a run-time management approach to deal with dynamic use-cases at run-time. A formal, compositional model is used to exploit Pareto-optimal trade-offs in the system use. The approach is illustrated with dataflow models with dynamic application scenarios, a predictable platform architecture and run-time resource management that determines optimal trade-offs through an efficient knapsack heuristic.

关键词： Runtime physical environment Platform resource requirements operation mode Time Management management of resources Surgery dynamism

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Proceedings - 2007 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2007

Proceedings - 2007 International Conference on Embedded Comp...

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2007 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2007

ISBN: (纸本)1424410584

The proceedings contain 27 papers. The topics discussed include: applying data mapping techniques to vector DSPs;Instruction set encoding optimization for code size reduction;FlexCore: utilizing exposed datapath control for efficient computing;prototyping efficient interprocessor communication mechanisms;design space exploration of configuration manager for network processing applications;design space exploration of media processors: a parameterized scheduler;automatic bus matrix synthesis based on hardware interface selection for fast communication design space exploration;on the problem of minimizing workload execution time in SMT processors;performance and power analysis of parallelized implementations on an MPCore multiprocessor platform;an interrupt controller for FPGA-based multiprocessors;application case studies on HS-scale, a MP-SOC for embbeded systems;and instruction-level fault tolerance configurability.

关键词： Integrated circuit design

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Efficient system design using the Statistical Analysis of Architectural Bottlenecks methodology

Efficient system design using the Statistical Analysis of Ar...

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2012 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2012

作者： Arora, Manish Wang, Feng Rychlik, Bob Tullsen, M. Department of Computer Science and Engineering University of California San Diego San Diego CA United States Qualcomm Incorporated 5775 Morehouse Drive San Diego CA United States

ISBN: (纸本)9781467322973

CPU processor design involves a large set of increasingly complex design decisions Doing full, accurate simulation of all possible designs is typically not feasible. Prior techniques for sensitivity analysis seek to identify the most critical design parameters, but also struggle to handle the increasing design space well. They can be overly sensitive to the starting fixed point of the design, can still require a large number of simulations, and do not necessarily account for the cost of each design parameter. The Statistical Analysis of Architectural Bottlenecks (SAAB) methodology simultaneously analyzes multiple parameters and requires a small number of experiments. SAAB leverages the Plackett and Burman analysis method, but builds upon the technique in two specific ways. It allows a parameter to take multiple values and replaces the unit-less impact factor with a cost-proportional impact value. This paper applies the SAAB methodology to the design of a mobile processor sub-system. It considers area and power cost models for the design. © 2012 IEEE.

关键词： Statistical methods

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Towards Future Adaptive Multiprocessor systems-On-Chip: an Innovative Approach for Flexible architectures

Towards Future Adaptive Multiprocessor Systems-On-Chip: an I...

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international conference on embedded computer systems - architectures, modeling and simulation (IC-SAMOS)

作者： Lemonnier, Fabrice Millet, Philippe Almeida, Gabriel Marchesan Huebner, Michael Becker, Juergen Pillement, Sebastien Sentieys, Olivier Koedam, Martijn Sinha, Shubhendu Goossens, Kees Piguet, Christian Morgan, Marc-Nicolas Lemaire, Romain Thales Res & Technol 1 Ave Augustin Fresnel F-91767 Palaiseau France Karlsruhe Inst Technol KIT Inst Informat Proc Technol D-76131 Karlsruhe Germany Ruhr Univ Bochum Embedded Syst Informat Technol D-44801 Bochum Germany Univ Rennes IRISA F-22300 Lannion France Eindhoven Univ Technol Eindhoven Netherlands Ctr Suisse Elect & microtechn SA CSEM Neuchatel Switzerland CEA Leti Grenoble France

ISBN: (纸本)9781467322973;9781467322966

This paper introduces adaptive techniques targeted for heterogeneous manycore architectures and introduces the FlexTiles platform, which consists of general purpose processors with some dedicated accelerators. The different components are based on low power DSP cores and an eFPGA on which dedicated IPs can be dynamically configured at run-time. These features enable a breakthrough in term of computing performance while improving the on-line adaptive capabilities brought from smart heuristics. Thus, we propose a virtualisation layer which provides a higher abstraction level to mask the underlying heterogeneity present in such architectures. Given the large variety of possible use cases that these platforms must support and the resulting workload variability, offline approaches are no longer sufficient because they do not allow coping with time changing workloads. The upcoming generation of applications include smart cameras, drones, and cognitive radio. In order to facilitate the architecture adaptation under different scenarios, we propose a programming model that considers both static and dynamic behaviors. This is associated with self adaptive strategies endowed by an operating system kernel that provides a set of functions that guarantee quality of service (QoS) by implementing runtime adaptive policies. Dynamic adaptation will be mainly used to reduce both overall power consumption and temperature and to ease the problem of decreasing yield and reliability that results from submicron CMOS scales.

关键词： ARCHITECTURE Self tuning operating system kernels computational performance system-on-chip Platform Cognitive radio Runtime Multiprocessor Quality of service Workload

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Hardware/software specialization through aspects: The LARA approach

Hardware/software specialization through aspects: The LARA a...

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2012 international conference on embedded computer systems: architectures, modeling and simulation, IC-SAMOS 2012

作者： Cardoso, João M. P. Carvalho, Tiago Teixeira, João Diniz, Pedro C. Goncalves, Fernando Petrov, Zlatko Departamento de Engenharia Informática R. Roberto Frias s/n 4200-465 Porto Portugal INESC-ID Lisboa Portugal CoreWorks S.A. Lisboa Portugal Honeywell International S.r.o. Czech Republic

ISBN: (纸本)9781467322973

LARA is a programming language being developed to complement application code in a host programming language with instrumentation code, for monitoring, logging, and debugging, user's knowledge about specific characteristics of the application, non-functional requirements, and compiler, mapping and synthesis strategies to guide/control design-flows, especially the ones used to map computations to FPGA-based systems. This paper shows how the aspect-oriented approach provided by LARA allows developers to specify complementary program information that can be used by LARA aware design-flows to promote customized FPGA-based software/hardware implementations. Program and compiler/mapping specialization take advantage of specific properties of applications to optimize and customize specific application modules and software/hardware implementations, e.g., according to usage contexts. We illustrate the concept using a hotspot function from a real-life, industrial, application. The results show the importance of program specialization in deriving hardware/software implementations with higher-performance. © 2012 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Fault Resilient Real-Time Design for NoC architectures 12

Fault Resilient Real-Time Design for NoC Architectures

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3rd IEEE/ACM international conference on Cyber-Physical systems (ICCPS)

作者： Zimmer, Christopher Mueller, Frank North Carolina State Univ Dept Comp Sci Raleigh NC 27695 USA

ISBN: (纸本)9780769546957

Performance and time to market requirements cause many real-time designers to consider components, off the shelf (COTS) for real-time cyber-physical systems. Massive multi-core embedded processors with network-on-chip (NoC) designs to facilitate core-to-core communication are becoming common in COTS. These architectures benefit real-time scheduling, but they also pose predictability challenges. In this work, we develop a framework for Fault Observant and Correcting Real-Time embedded design (Forte) that utilizes massive multi-core NoC designs to reduce overhead by up to an order of magnitude and to lower jitter in systems via utilizing message passing instead of shared memory as the means for intra-processor communication. Message passing, which is shown to improve the overall scalability of the system, is utilized as the basis for replication and task rejuvenation. This improves fault resilience by orders of magnitude. To our knowledge, this work is the first to systematically map real-time tasks onto massive multi-core processors with support for fault tolerance that considers NoC effects on scalability on an real hardware platform and not just in simulation.

关键词： Scalability

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Preface

Preface

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： John McAllister Shuvra Bhattacharyya Department of Electrical and Computer Engineering Texas A & M University

The international conference on embedded computer systems: architectures, Modelling and simulation, is an annual gathering of academic and industrial researchers in the field of embedded computer system design. SAMOS is, in every sense of the word, a unique event. Hosted on the beautiful Mediterranean island of the same name, it provides a wonderful setting for meeting and making friends and acquaintances old and new and discussing the latest developments in applications, architectures, software, design tools and methodologies for embedded system design.

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A class of backpressure algorithms for networks embedded in hyperbolic space with controllable delay-throughput trade-off

A class of backpressure algorithms for networks embedded in ...

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15th ACM international conference on modeling, Analysis and simulation of Wireless and Mobile systems, MSWiM 2012

作者： Stai, Eleni Baras, John S. Papavassiliou, Symeon Institute of Communications and Computer Systems School of Electrical and Computer Engineering National Technical University of Athens Athens Zografou 15780 Greece Institute for Systems Research Department of Electrical and Computer Engineering University of Maryland College Park MD 20742 United States

ISBN: (纸本)9781450316286

Future communications consist of an increasing number of wireless parts, while simultaneously need to support the widespread multimedia applications imposed by social net- works. These human-machine systems, driven by both real time social interactions and the challenges of the wireless networks' design, call for efficient and easy to implement, distributed cross-layer algorithms for their operation. Per- formance metrics such as throughput, delay, trust, energy consumption, need to be improved and optimized aiming at high quality communications. We investigate the coveted throughput-delay trade-off in static wireless multihop net- works based on a "computer-aided" design of the backpres- sure scheduling/routing algorithm for networks embedded in hyperbolic space. Both routing and scheduling exploit the hyperbolic distances to orient the packets to the destina- tion and prioritize the transmissions correspondingly. The proposed design provides us with the freedom of controlling its theoretical throughput optimality and of counterbalanc- ing its practical performance through simulations, leading to significant improvements of the throughput-delay trade-off.

关键词： Throughput

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