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Architecting web-based systems with the unified modeling language 2nd

2nd international conference on Unified modeling Language, UML 1999

作者： Booch, Grady Rational Software Corporation 18880 Homestead Rd. CupertinoCA95014 United States

ISBN: (纸本)3540667121

The Web and its related technologies have made possible new means of access to and visualization of information. As such, it has shaped the structure of systems in many domains, from enterprise, mission critical e-business to distributed, embedded systems. Although experience with developing and deploying quality systems for the Web, by the Web and to the Web is a fairly recent activity, it appears that there are a relatively small number of canonical architectures that work. It is possible and desirable to codify those architectural patterns in order to offer a vehicle for controlling the development of a Web system over its lifetime, and to accelerate the development of new Web systems. The UML is well suited to representing these architectural patterns. In this presentation, we will examine the nature of Web-centric systems, and will study the common architectural patterns that apply. We will also examine the dozen or so underlying mechanisms upon which these architectures build, and show how both these architectural patterns and design patterns can be represented in the UML. We will conclude by addressing how these representations can be used in the lifecycle, supporting the notions of executable architectures and round trip engineering. © Springer-Verlag Berlin Heidelberg 1999.

关键词： Unified modeling Language

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Proceedings of the 1999 international computer Music conference, ICMC 1999

Proceedings of the 1999 International Computer Music Confere...

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25th international computer Music conference, ICMC 1999

The proceedings contain 159 papers. The topics discussed include: from expressive notation to model-based sound synthesis: a case study of the acoustic guitar;simulation of plucked strings exhibiting tension modeling driving force;analysis and critical-band-based group wavetable synthesis of piano tones;evaluation of architectures for sound generation systems with respect to interactive gestural control and real-time performance;data compression of sinusoidal modeling parameters based on psychoacoustic masking;second-order recursive oscillators for musical additive synthesis applications on SIMD and VLIW processors;applications of the processor enhanced memory module for music signal processing;and heightening access and cohesion within the worlds of electroacoustic music: the promotion of triangulation in creativity, development and scholarship.

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High-level circuit modeling for power estimation 6

High-level circuit modeling for power estimation

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6th IEEE international conference on Electronics, Circuits and systems, ICECS 1999

作者： Schimpfle, Christian V. Simon, Sven Nossek, Josef A. Institute of Network Theory and Signal Processing Munich University of Technology Arcisstr. 21 Munich80333 Germany

ISBN: (纸本)0780356829

In this paper, a method for accurate modeling of timing behavior and power consumption of digital circuits is presented. The model is based on the parameter extraction of the basic cells by circuit level simulations. This information is then embedded in a high-level description (VHDL) for every basic cell. The circuit simulations for each cell are executed only once in order to create a cell library including the VHDL models. Due to the complex timing model in the high-level descriptions, the switching activity in a larger circuit can be determined quite accurately. Besides timing, the power consumption for every possible input transition is also included in the cell descriptions. Thus, quite accurate power estimation of large circuits is possible by a simple event driven simulation with a conventional VHDL-simulator. The computation time of this method is about four orders of magnitude shorter than power estimation by SPICE. The presented model in combination with the VHDL-simulator is applied for the comparing different multiplier architectures in terms of power consumption. © 1999 IEEE.

关键词： Electric power utilization

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3rd international conference on Coordinatio Languages and Models, COORDINATION 1999

3rd International Conference on Coordinatio Languages and Mo...

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3rd international conference on Coordination Languages and Models, COORDINATION 1999

ISBN: (纸本)354065836X

The proceedings contain 32 papers. The special focus in this conference is on Coordinatio Languages and Models. The topics include: Coordination and access control of mobile agents;characteristics of an agent scripting language and its execution environment;a coordination model for agents based on secure spaces;coordination with attributes;a specification language for mobile systems;promoting re-usability of coordinated active objects using event notification protocols;pipelining the molecule soup;a semantic theory for an embedded coordination language;coordination of synchronous programs;composing specifications for coordination;on the expressiveness of coordination models;comparing software architectures for coordination languages;a hierarchical model of coordination of concurrent activities;a self-deploying election service for active networks;a simple extension of java language for controllable transparent migration and its portable implementation;coordination among mobile objects;simulation of conference management using an event-driven coordination language;internet-based coordination environments and document-based applications;coordination of a parallel proposition solver;composition language for autonomous megamodules;modeling resources for activity coordination and scheduling and static analysis of real-time component-based systems configurations.

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9th international Workshop on Field Programmable Logic and Applications, FPL 1999

9th International Workshop on Field Programmable Logic and A...

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9th international Workshop on Field Programmable Logic and Applications, FPL 1999

ISBN: (纸本)3540664572

The proceedings contain 65 papers. The special focus in this conference is on Signal Processing and CAD Tools for DRL. The topics include: Reconfigurable processors for high-performance, embedded digital signal processing;a linear gammatone filterbank design for a model of the auditory system;a plug-in architecture for video processing;an interpretive simulation and visualization environment for dynamically reconfigurable systems;modelling and synthesis of configuration controllers for dynamically reconfigurable logic systems using the DCS CAD framework;optimal finite field multipliers for FPGAs;memory access optimization and RAM inference for pipeline vectorization;analysis and optimization of 3-D FPGA design parameters;ultra-fast placement for FPGAs;placement optimization based on global routing updating for system partitioning onto multi-FPGA mesh topologies;hierarchical interactive approach to partition large designs into FPGAs;logical-to-physical memory mapping for FPGAs with dual-port embedded arrays;a temporal floorplanning based CAD framework for dynamically reconfigurable logic systems;a bipartitioning algorithm for dynamic reconfigurable programmable logic;self controlling dynamic reconfiguration;an internet based development framework for reconfigurable computing;on tool integration in high-performance FPGA design flows;hardware-software codesign for dynamically reconfigurable architectures;serial hardware libraries for reconfigurable designs;reconfigurable computing in remote and harsh environments;communication synthesis for reconfigurable embedded systems and run-time parameterizable cores.

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1st international Workshop on Cryptographic Hardware and embedded systems, CHES 1999

1st International Workshop on Cryptographic Hardware and Emb...

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1st Workshop on Cryptographic Hardware and embedded systems, CHES 1999

ISBN: (纸本)354066646X

The proceedings contain 29 papers. The special focus in this conference is on Cryptanalytic Hardware and Hardware architectures. The topics include: Factoring large numbers with the TWINKLE device;DES cracking on the transmogrifier 2a;modeling the crypto-processor from design to synthesis;A DES ASIC suitable for network encryption at 10 gbps and beyond;hardware design and performance estimation of the 128-bit block cipher CRYPTON;fast implementation of public-key cryptography on a DSP TMS320C6201;how to implement cost-effective and secure public key cryptosystems;montgomery’s multiplication technique;a scalable architecture for montgomery multiplication;arithmetic design for permutation groups;efficient finite field basis conversion involving dual bases;power analysis attacks of modular exponentiation in smartcards;DES and differential power analysis;a new class of power attacks;security evaluation schemas for the public and private market with a focus on smart card systems;a design of reliable true random number generator for cryptographic applications;random number generators founded on signal and information theory;a high-performance flexible architecture for cryptography;a reconfigurable and modular cryptographic coprocessor;elliptic curve scalar multiplier design using FPGAs;highly regular architectures for finite field computation using redundant basis;low complexity bit-parallel finite field arithmetic using polynomial basis;resistance against differential power analysis for elliptic curve cryptosystems;probing attacks on tamper-resistant devices and encryption with statistical self-synchronization in synchronous broadband networks.

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20th international conference on Application and Theory of Petri Nets, ICATPN 1999

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20th international conference on Application and Theory of Petri Nets, ICATPN 1999

ISBN: (纸本)3540661328

The proceedings contain 24 papers. The special focus in this conference is on Application and Theory of Petri Nets. The topics include: Design, simulation, and implementation of hybrid systems;efficient reachability set generation and storage using decision diagrams;structural methods to improve the symbolic analysis of petri nets;stubborn sets for standard properties;petri net based behavioural specification of CORBA systems;symmetric communication between coloured petri net simulations and java-processes;recent developments in modeling and analysis of hybrid dynamic systems;autonomous continuous P/T systems;an approach to the analysis of interworking traders;parallel approaches to the numerical transient analysis of stochastic reward nets;SWN nets as a framework for the specification and the analysis of FT techniques adopted in electric plant automation;monitoring discrete event systems using petri net embeddings;quasi-static scheduling of embedded software using equal conflict nets;theoretical aspects of recursive petri nets;testing undecidability of the reachability in petri nets with the help of 10th hilbert problem;net theory and workflow models;concurrent implementation of asynchronous transition systems;trace channel nets;reasoning about algebraic generalisation of petri nets;a model of nets and process expressions;detection of illegal behaviours based on unfoldings;five classes of invariant-preserving transformations on colored petri nets and ILF checks DAWN proofs.

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Automatic analytical modeling for the estimation of cache misses

Parallel Architectures and Compilation Techniques - Conferen...

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Parallel architectures and Compilation Techniques - conference Proceedings, PACT 1999年 221-231页

作者： Fraguela, Basilio B. Doallo, Ramon Zapata, Emilio L. Universidade da Coruna Coruna Spain

Caches play a very important role in the performance of modern computer systems due to the gap between the memory and the processor speed. Among the methods for studying their behavior, the most widely used by now has been trace-driven simulation. Nevertheless, analytical modeling gives more information and requires smaller computation times that allow it to be used in the compilation step to drive automatic optimizations on the code. The traditional draw-back of analytical modeling has been its limited precision and the lack of techniques to apply it systematically without user intervention. In this work we present a methodology to build analytical models for codes with regular access patterns. These models can be applied to caches with an arbitrary size, line size and associativity. Their validation through simulations using typical scientific code fragments has proved a good degree of accuracy.

关键词： Parallel processing systems

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Automatic analytical modeling for the estimation of cache misses

Automatic analytical modeling for the estimation of cache mi...

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international conference on Parallel Architecture and Compilation Techniques (PACT)

作者： B.B. Fraguela R. Doallo E.L. Zapata Department de Electronica e Sistemas Universidade da Coruna Coruna Spain

Caches play a very important role in the performance of modern computer systems due to the gap between the memory and the processor speed. Among the methods for studying their behaviour, the most widely used has been trace-driven simulation. Nevertheless, analytical modeling gives more information and requires smaller computation times that allow it to be used in the compilation step to drive automatic optimizations on the code. The traditional drawback of analytical modeling has been its limited precision and the lack of techniques to apply it systematically without user intervention. In this work we present a methodology to build analytical models for codes with regular access patterns. These models can be applied to caches with an arbitrary size, line size and associativity. Their validation through simulations using typical scientific code fragments has proved a good degree of accuracy.

关键词： Analytical models Equations Performance analysis Counting circuits computer architecture Electronic switching systems Computational modeling Hardware Microprocessors computer science education

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Automated translation of UML models of architectures for verification and simulation using SPIN

Automated translation of UML models of architectures for ver...

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IEEE international conference on Automated Software Engineering (ASE)

作者： P. Bose Information and Software Engineering Department George Mason University USA

The Unified modeling Language (UML) is fast becoming an industry standard for object-oriented modeling and analysis. Applying the UML to model, analyze and design dependable systems require methods and tools for model checking that are integrated with the UML and its support environment. Recent advances in model-checking technologies have led to the development of approaches and tools to check the correctness of security protocols as well as check the correctness properties (such as deadlock properties) of architectural abstractions of component based systems implementing specific styles of coordination. This paper focuses on use of a specific model-checking technology, SPIN, in model checking architectures specified using UML. In particular the paper develops an approach to check desired properties of a class of distributed component based software architectures characterized by indirect connection via mediators and shared space. The approach is demonstrated in the context of an architectural design implementing the NetBill protocol for e-commerce.

关键词： Unified modeling language Object oriented modeling Protocols Power system modeling computer architecture Electronic commerce Software engineering Birth disorders Electrical capacitance tomography Context modeling

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