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检索条件"任意字段=International Conference on Embedded Computer Systems Architectures Modeling and Simulation"

共 2831 条记录，以下是2631-2640 订阅

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Connecting Technical and Non-technical Views of System architectures

Connecting Technical and Non-technical Views of System Archi...

引用

IEEE/ACM Int'l conference on & Int'l conference on Cyber, Physical and Social Computing (CPSCom) Green Computing and Communications (GreenCom)

作者： Li Li Jozef Hooman Jeroen Voeten Embedded Systems Institute Eindhoven Netherlands Computing Science Department Radboud University Nijmegen Netherlands Department of Electrical Engineering Eindhovan University of Technology Eindhoven Netherlands

When designing, adapting or extending a complex cyber physical system, it extremely difficult to guarantee that all parts cooperate correctly, especially when many parties are involved in the development process. We propose a new approach to identify and to solve problems in the early development phases, thus reducing costs in the system implementation, test and integration phases. This is achieved by making a global, holistic model of the system with different views. From the technical point of view, a system simulation model is constructed which can be used to validate whether the global system architecture satisfies the main requirements. To bridge the gap between technical specialists and non-technical stakeholders, this technical system view can be connected to a user-friendly animation tool. This allows the creation of an interactive prototype with different stakeholder views. The approach will be illustrated by a case study in the healthcare domain.

关键词： Medical diagnostic imaging modeling Information systems X-ray imaging computer architecture

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Integrating Communication Cost into the Utility Accrual Model for the Resource Allocation in Distributed Real-Time systems

Integrating Communication Cost into the Utility Accrual Mode...

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IEEE international conference on embedded and Real-Time Computing systems and Applications (RTCSA)

作者： Xinfa Hu Joseph Y.-T. Leung Department of Computer Science New Jersey Institute of Technology Newark NJ USA

ISBN: (纸本)9780769533490

In distributed real-time systems, both computation and communication are critical factors. The timeliness of activities relies on both the computation and the communication involved in them. Moreover, the timeliness of computation relies on that of communication, and vice versa. This property requires that both computation and communication be integrated into the resource allocation model and that the model be able to capture the interplay between them. Unfortunately, the utility/benefit/value accrual models employed in current distributed real-time systems are constructed solely on computation. They are inadequate for capturing the interplay between computation and communication. This paper extends previous research on utility-based model by proposing a new utility accrual model, which integrates both computation and communication. Most importantly, the interplay between computation and communication is fully characterized in the model. Under the new model, resource managers are guided towards maximizing system-wide utility by exploring the interplay between computation and communication instead of traditional meeting the timing constraint on computation and the deadline of communication separately. To validate the effectiveness of this model, a resource allocation algorithm called CAUASA is developed under it. The performance of CAUASA is compared to that of another resource allocation algorithm that is developed according to existing utility accrual models. simulation results reveal that CAUASA is far superior to its counterpart. Therefore, the new utility accrual model provides a more effective framework for the resource allocation in distributed real-time systems.

关键词： Computational modeling Real time systems Resource management Processor scheduling Timing Scheduling algorithm Finishing

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Image coding/reconstruction and matching using a parallel distributed Hebbian architecture

Image coding/reconstruction and matching using a parallel di...

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international Joint conference on Neural Networks (IJCNN)

作者： K.P. Lam Department of Systems Engineering & Engineering Management Chinese University of Hong Kong New Territories Hong Kong China

A high-gain, post-annealing, generalized Hebbian algorithm is proposed and observed to have chaotic learning behavior. It lends itself readily to a highly efficient parallel distributed architecture for principal components computation. The work is extended to a convergence accelerator that uses the chaotic pattern learned during the first few epochs for an iterative weight-change procedure. Applications of using the parallel architecture for image encoding, reconstruction, and matching are described. Successful simulation results in yielding good quality reconstructed images and photo/sketch matching are reported.

关键词： Image coding Image reconstruction Chaos Iterative algorithms computer architecture Concurrent computing Distributed computing Convergence Parallel architectures Computational modeling

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ERSCHED: An Efficient and Reliable Scheduler for Workflows in Multi-Edge systems

ERSCHED: An Efficient and Reliable Scheduler for Workflows i...

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Intelligent Technology and embedded systems (ICITES), international conference on

作者： Linhui Wang Liying Li Yue Zeng Peijin Cong Junlong Zhou School of CSE Nanjing University of Science and Technology Nanjing China National Mobile Communications Research Laboratory Southeast University Nanjing China

ISBN: (数字)9798331506292

ISBN: (纸本)9798331506308

With the rise of edge computing, many users are turning to hosting and running workflow applications in multi-edge environments. This approach can effectively address issues such as resource limitations, low reliability, and high costs that are often encountered in single-edge environments. However, the heterogeneity of resources in multi-edge environments and the differences among edge service providers (in terms of technical architectures, service types, pricing models, etc.) make scheduling tasks in a multi-edge system quite complex. As a result, effectively utilizing multi-edge resources to efficiently and reliably schedule and execute workflows has become a crucial challenge in multi-edge environments. This paper concentrates on the multi-objective workflow scheduling optimization problem when facing reliability constraints in multi-edge environments. We design an efficient and reliable scheduler, namely ERSCHED, for executing workflows in multi-edge systems, with the goal of optimizing makespan and cost simultaneously under reliability constraints. We implement extensive experiments on both real-world and synthetic workflows to validate the efficacy of our scheduler ERSCHED. simulation results show that ERSCHED can derive better makespan-cost trade-off fronts with significantly higher HyperVolume than similar peer methods. The average improvement of HyperVolume realized by ERSCHED is 48.7%.

关键词： Schedules Costs Scheduling algorithms simulation computer architecture Pricing Reliability engineering Turning Service-oriented architecture Sorting

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modeling and Performance Analysis of Beyond 3G Integrated Wireless Networks

Modeling and Performance Analysis of Beyond 3G Integrated Wi...

引用

IEEE international conference on Communications (ICC)

作者： Ahmed H. Zahran Ben Liang Aladdin Saleh Department of Electrical and Computer Engineering University of Toronto Canada Wireless Technology Bell Canada Limited Canada

Next-generation wireless networking is evolving towards a multi-service heterogeneous paradigm that converges different pervasive access technologies and provides a large set of novel revenue generating applications. Hence, system complexity increases due to its embedded heterogeneity, which can not be accounted by the existing modeling and performance evaluation techniques. Consequently, the development of new modeling approaches becomes as a crucial requirement for proper system design and performance evaluation. This paper presents a novel mobility model for a two-tier integrated wireless system using a new modeling approach that accommodates the aforementioned complexity. Additionally, a novel session model is developed as an adapted version of the proposed mobility model. These models use phase-type distributions that are known to approximate any generic probability laws. Using the proposed session model, a novel generic analytical framework is developed to obtain several salient performance metrics such as network utilization times and handoff rates. simulation and analysis results prove the proposed model validity and demonstrate the accuracy of the novel modeling approach when compared with traditional modeling techniques.

关键词： Performance analysis Wireless networks Wireless LAN Cathode ray tubes Land mobile radio cellular systems Next generation networking Measurement Analytical models Quality of service Application software

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A HW/SW Co-design Methodology: An Accurate Power Efficiency Model and Design Metrics for embedded System

A HW/SW Co-design Methodology: An Accurate Power Efficiency ...

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ACIS international conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing (SNPD)

作者： Lftikhar Khan Taikyeong Ted. Jeong Gyungleen Park Anthony P. Ambler Department of Communications Engineering Myongji University South Korea Department of Computer Statistics Cheju National University South Korea Department of Electrical and Computer Engineering University of Technology Austin USA

Low-power embedded system design has become extremely important in the most recent years. To fulfill system-level design requirements and time-to-market constraints, a power-driven methodology is essential during embedded system design. The aim of this paper is to introduce accurate and efficient power metrics included in a hardware/software (HW/SW) co-design environment to show the system-level partitioning and design. In order to verify the design effectiveness of hardware/software co-design synthesis, we consider the digital power dissipation methodology and its power reduction techniques. To maximize the performance of system, we developed hierarchical design technique and co-design synthesis for power efficient HW/SW co-design process. In the end, we provided simulation results for single circuit with new design vs. circuit integration with hierarchical power efficiency system (HPES), multiple circuits with new design vs. circuit integration with HPES, new design and no load vs. circuit integration with HPES, new design with load vs. circuit integration with HPES.

关键词： Power system modeling embedded system Hardware Application specific integrated circuits Control system synthesis Circuit synthesis embedded software Software performance embedded computing Real time systems

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Diagnosis of sensor networks

Diagnosis of sensor networks

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IEEE international conference on Communications (ICC)

作者： C. Jaikaeo C. Srisathapornphat C.-C. Shen Computer and Information Sciences University of Delaware Newark DE USA

As sensor nodes are embedded into physical environments and becoming integral parts of our daily lives, sensor networks will become the important nerve systems that monitor and actuate our physical environments. We define the process of monitoring the status of a sensor network and figuring out the problematic sensor nodes sensor network diagnosis. However, the high sensor node-to-manager ratio makes it extremely difficult to pay special attention to any individual node. In addition, the response implosion problem, which occurs when a high volume of incoming replies triggered by diagnosis queries cause the central diagnosing node to become a bottleneck, is one major obstacle to be overcome. We describe approaches to addressing the response implosion problem in sensor network diagnosis. We also present simulation experiments on the performance of these approaches, and discuss presentation schemes for diagnostic results.

关键词： Sensor phenomena and characterization Sensor systems computerized monitoring Computational modeling Wireless communication computer network management Biomedical monitoring Image sensors Humans Biomedical imaging

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Design, simulation and synthesis of an ASIC for fractal image coding

Design, simulation and synthesis of an ASIC for fractal imag...

引用

international conference on VLSI Design

作者： S.K. Bhunia S.K. Ghosh P. Kumar P.P. Das J. Mukherjee Department of Computer Science and Engg. Indian Institute of Technology Kharagpur Kharagpur India

ISBN: (纸本)0769500137

In recent years, fractal encoding of images (using iterated function systems) has emerged as a potent technique in image compression. This method has comparable or sometimes better performance as compared to most others, especially, with respect to quality of reconstructed image and compression ratio. But most fractal encoding methods are very slow and this prevents them from realtime processing of images. Since fractal encoding methods have ample data parallelism and spatial/temporal recurrence, there is a lot of scope for designing efficient VLSI architectures for them. In this paper we have selected a suitable encoding scheme and designed the VLSI architecture for it. The proposed architecture has been simulated and synthesized, using Verilog and Synergy from Cadence Design Tools. The architecture employs principles of pipelining and parallelism to enhance performance with respect to speed of compression. simulation and synthesis results show good time performance for the proposed chip.

关键词： Application specific integrated circuits Fractals Image coding Very large scale integration Discrete cosine transforms Parallel processing Computational modeling computer science Image reconstruction Read only memory

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Edge and Fog Computing Enabled AI for IoT-An Overview

Edge and Fog Computing Enabled AI for IoT-An Overview

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IEEE international conference on Artificial Intelligence Circuits and systems (AICAS)

作者： Zhuo Zou Yi Jin Paavo Nevalainen Yuxiang Huan Jukka Heikkonen Tomi Westerlund Fudan University Shanghai China Dept. of Future Technologies University of Turku Turku Finland

ISBN: (纸本)9781538678855

In recent years, Artificial Intelligence (AI) has been widely deployed in a variety of business sectors and industries, yielding numbers of revolutionary applications and services that are primarily driven by high-performance computation and storage facilities in the cloud. On the other hand, embedding intelligence into edge devices is highly demanded by emerging applications such as autonomous systems, human-machine interactions, and the Internet of Things (IoT). In these applications, it is advantageous to process data near or at the source of data to improve energy & spectrum efficiency and security, and decrease latency. Although the computation capability of edge devices has increased tremendously during the past decade, it is still challenging to perform sophisticated AI algorithms in these resource-constrained edge devices, which calls for not only low-power chips for energy efficient processing at the edge but also a system-level framework to distribute resources and tasks along the edge-cloud continuum. In this overview, we summarize dedicated edge hardware for machine learning from embedded applications to sub-mW “always-on” IoT nodes. Recent advances of circuits and systems incorporating joint design of architectures and algorithms will be reviewed. Fog computing paradigm that enables processing at the edge while still offering the possibility to interact with the cloud will be covered, with focus on opportunities and challenges of exploiting fog computing in AI as a bridge between the edge device and the cloud.

关键词： Cloud computing Edge computing Artificial intelligence computer architecture Hardware Internet of Things Computational modeling

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Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors

Performance comparison of single-precision SPICE Model-Evalu...

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international conference on Field Programmable Logic and Applications

作者： Nachiket Kapre Andre DeHon Computer Science California Institute of Technology Pasadena CA USA Electrical and Systems Engineering University of Pennsylvania Philadelphia PA USA

Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor organizations for data-parallel, floating-point computation in SPICE model-evaluation. Our Verilog AMS compiler produces code for parallel evaluation of non-linear circuit models suitable for use in SPICE simulations where the same model is evaluated several times for all the devices in the circuit. Our compiler uses architecture specific parallelization strategies (OpenMP for multi-core, PThreads for Cell, CUDA for GPU, statically scheduled VLIW for FPGA) when producing code for these different architectures. We automatically explore different implementation configurations (e.g. unroll factor, vector length) using our performance-tuner to identify the best possible configuration for each architecture. We demonstrate speedups of 3- 182times for a Xilinx Virtex5 LX 330T, 1.3-33times for an IBM Cell, and 3-131times for an NVIDIA 9600 GT GPU over a 3 GHz Intel Xeon 5160 implementation for a variety of single-precision device models.

关键词： SPICE Field programmable gate arrays Multicore processing computer architecture Computational modeling Circuit optimization Concurrent computing Hardware design languages Circuit simulation Scheduling

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