As a result of recent advances in artificial intelligence, human cognitive modelling, autonomous systems and telerobotics, there is an opportunity to broaden our concepts of technology for projecting action at a dista...
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As a result of recent advances in artificial intelligence, human cognitive modelling, autonomous systems and telerobotics, there is an opportunity to broaden our concepts of technology for projecting action at a distance. We draw on these advances to develop a conceptual and architectural framework that enables efficient projection in time and space of intermingled manipulation and cognition tasks. Where AI-based autonomous systems have previously been concerned with human supervisory intervention primarily at a cognitive level, we add methods for rendezvous, capture and rehandoff of embedded manipulation tasks. Where telerobotics has been concerned with the projection of sensory-motor manipulation, we add the projection of cognitive processing. Thus extended, the two technologies mirror one another and merge into one of "tele-autonomous systems". We introduce notions of how the sensory, cognitive and motor functions of tele-autonomous systems can be factored and transferred back and forth between human and machine. We illustrate how the times to complete tele-autonomous tasks can be reduced through time and space constraint relaxations effected through simple controls: We employ the concepts of forward simulation and predictor display, augmented by "time and position clutches", "time ratio controls" and "time brakes", to control the resulting manipulation paths and event transitions. We sketch some generic architectural and human interface implications of these methods. Finally, we describe our environment for exploring these methods and the results of some recent experiments.
The following topics are dealt with: interconnection networks;memory management;mathematical analysis and computation;parallel processing languages;operating systems;parallel algorithms;array processors;fault-tolerant...
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ISBN:
(纸本)0818607246
The following topics are dealt with: interconnection networks;memory management;mathematical analysis and computation;parallel processing languages;operating systems;parallel algorithms;array processors;fault-tolerant designs;VLSI and optical architectures;performance analysis;multiprocessors;pipeline/vector processors;parallel computation;dataflow computers;hypercube architecture;systolic architecture;artificial intelligence;supercomputing hardware;simulation and modeling;multigrid/mesh applications;vectorization/dataflow processing;graph theory;parallel processing techniques;data structures;distributed processing;and logic programming. 170 papers were presented, all of which are published in full in the present proceedings.
The simulation of parallel digital signal processing algorithms and hardware structures can be improved by modeling processing elements as processes executing concurrently on a single CPU or a local-area network. The ...
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The simulation of parallel digital signal processing algorithms and hardware structures can be improved by modeling processing elements as processes executing concurrently on a single CPU or a local-area network. The 'DSP Workbench' strives to hide the location of processes and their communication details from the user.
The composition of defense systems is becoming more software oriented every day. New system architectures are taking maximum advantage of reductions in computer costs and increased memory and throughput capabilities. ...
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ISBN:
(纸本)0317609459
The composition of defense systems is becoming more software oriented every day. New system architectures are taking maximum advantage of reductions in computer costs and increased memory and throughput capabilities. Existing systems are being converted from purely hardware systems to hybrid system that use computers for many of the decision and control functions. This paper reviews the system development process and presents five options for modelingcomputer software embedded in hybrid systems. The utility and fidelity with the actual system provided by each modeling option are discussed. Then the cost and schedule, for developing a simulation for an example system, are determined and used to perform an evaluation of the modeling options. The evaluation shows that two of the modeling options are undesirable, based on cost. Based on schedule constraints, the remaining three options should be used in an evolutionary manner to provide the necessary simulation capabilities early in the system development process.
Future signal and data processing applications require billions of operations per second yet low software development and maintenance costs. Von Neumann architectures will not be able to meet these requirements;howeve...
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ISBN:
(纸本)0818606541
Future signal and data processing applications require billions of operations per second yet low software development and maintenance costs. Von Neumann architectures will not be able to meet these requirements;however, multiprocessor architectures have the potential to do so. The Hughes data flow multiprocessor (HDFM) is a high-performance, extensible, fault-tolerant, high-level-language programmable architecture designed for embedded signal and data processing applications. simulation results for the HDFM show that over 64 million operations per second (MOPS) may be performed using only 64 processing elements (PEs).
Design tools are needed to study advanced robot controller architectures. These tools must provide capabilities beyond simulation of linear differential equations used for designing PID controls. Other design paramete...
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Design tools are needed to study advanced robot controller architectures. These tools must provide capabilities beyond simulation of linear differential equations used for designing PID controls. Other design parameters, such as interprocess communication delays, computational delays, interprocessor bus structures and operating system services, need to be simulated. In this paper, the use of two simulation tools for modeling the next generation of robot controller architectures is discussed. First, the Hierarchical Control System Emulator (HCSE) is described as a tool for evaluating the performance of robot controller architectures. Second, the commercially available software package, SIMNON, that simulates non-linear differential and difference equations is discussed in its application to modeling robot dynamics.
As the complexity of speech recognition systems increases, conventional computers are unable to perform all the operations quickly enough to process the speech input in real time. This paper examines the use of a sing...
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As the complexity of speech recognition systems increases, conventional computers are unable to perform all the operations quickly enough to process the speech input in real time. This paper examines the use of a single instruction stream - multiple data stream (SIMD) parallel architecture to reduce the computation time for a dynamic time warping template matching based isolated word recognition system. Each of the components of the recognition system was written as an SMD parallel algorithm. The component SIMD algorithms and the complete word recognition system were simulated. The simulations showed that with 100 processing elements, each an 8 MHz MC68000, the speech system can perform isolated word recognition over a large vocabulary in real time. This real-time speech system used a 20 KHz sampling rate, 16 bits per sample, 100 samples per frame, 8 LPC coefficients per frame, 16 bits per LPC coefficient, and a 1,000 word vocabulary.
There is a continuing pressure of better processing performances in numerical signal processing. Effective utilization of LSI semiconductor technology allows the consideration of multiprocessor architectures. The prob...
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There is a continuing pressure of better processing performances in numerical signal processing. Effective utilization of LSI semiconductor technology allows the consideration of multiprocessor architectures. The problem of interconnecting the components of the architecture arises. In this paper we describe a control algorithm of the Benes interconnection network in a asynchronous multiprocessor system. A simulation study of the timeshared bus, of the omega network, of the Benes network and of the crossbar network gives a comparison of performances.
This conference proceedings contains 80 articles, all of which are indexed separately. The topics covered are: design and requirements specifications methodology;testing and evaluation;network design for computed syst...
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This conference proceedings contains 80 articles, all of which are indexed separately. The topics covered are: design and requirements specifications methodology;testing and evaluation;network design for computed systems;distributed architectures;communications protocols;programming languages;network language and system software;specification and design of communication systems;reliability and fault tolerance;implementation schemes for interprocess communication systems;data base computers;applications to radar systems;decentralized control;simulation and modeling;data base applications and techniques;distributed operating systems;and applications to modular missile-borne computers.
This conference proceedings contains 80 articles, all of which are indexed separately. The topics covered are: design and requirements specifications methodology; testing and evaluation; network design for computed sy...
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This conference proceedings contains 80 articles, all of which are indexed separately. The topics covered are: design and requirements specifications methodology; testing and evaluation; network design for computed systems; distributed architectures; communications protocols; programming languages; network language and system software; specification and design of communication systems; reliability and fault tolerance; implementation schemes for interprocess communication systems; data base computers; applications to radar systems; decentralized control; simulation and modeling; data base applications and techniques; distributed operating systems; and applications to modular missile-borne computers.
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