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Theoretical Aspects of Computing - ICTAC 2008 2008

引用

丛书名： Lecture Notes in computer Science

2008年

作者： John S. Fitzgerald Anne E. Haxthausen Husnu Yenigun

ISBN: (数字)9783540857624

ISBN: (纸本)9783540857617

This book constitutes the refereed proceedings of the 5th international Colloquium on Theoretical Aspects of Computing, ICTAC 2008 held in Istanbul, Turkey in September 2008. The 27 revised full papers were carefully reviewed and selected from over 70 submissions. The aim of the colloquium is to bring together practitioners and researchers from academia, industry and government to present research results, and exchange experience, ideas, and solutions for their problems in theoretical aspects of computing such as automata theory and formal languages, principles and semantics of programming languages, software architectures and their description languages, software specification, refinement, and verification, model checking and theorem proving, real-time, embedded and hybrid systems, theory of parallel, distributed, and internet-based (grid) computing, simulation and modeling, and service-oriented development.

关键词： Electronic data processing Congresses. Information theory Congresses.

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An Efficient End-to-End Channel Level Pruning Method for Deep Neural Networks Compression

An Efficient End-to-End Channel Level Pruning Method for Dee...

引用

IEEE international conference on Software Engineering and Service Sciences (ICSESS)

作者： Lei Zeng Shi Chen Sen Zeng Department of Computer Science University of Science and Techonology of China Hefei Anhui Province China Department of Gree Electric Appliances Zhuhai Guangdong Province China

ISBN: (数字)9781728109459

ISBN: (纸本)9781728109466

Deep neural networks (DNNS) have obtained compelling performance among many visual tasks by a significant increase in the computation and memory consumption, which severely impede their applications on resource-constrained systems like smart mobiles or embedded devices. To solve these problems, recent efforts toward compressing DNNS have received increased focus. In this paper, we proposed an effective end-to-end channel pruning approach to compress DNNS. To this end, firstly, we introduce additional auxiliary classifiers to enhance the discriminative power of shallow and intermediate layers. Secondly, we impose Ll-regularization on the scaling factors and shifting factors in batch normalization (BN) layer, and adopt the fast and iterative shrinkage-thresholding algorithm (FISTA) to effectively prune the redundant channels. Finally, by forcing selected factors to zero, we can prune the corresponding unimportant channels safely, thus obtaining a compact model. We empirically reveal the prominent performance of our approach with several state-of-theart DNNS architectures, including VGGNet, and MobileNet, on different datasets. For instance, on cifar10 dataset, the pruned MobileNet achieves 26. 9x reduction in model parameters and 3. 9x reduction in computational operations with only 0.04% increase of classification error.

关键词： Training Neural networks Classification algorithms Acceleration Hardware Iterative methods Computational modeling

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Hardware and software architectures for the CELL processor

Hardware and software architectures for the CELL processor

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international conference on Hardware/Software Codesign and System Synthesis (CODES)

作者： Michael Day Peter Hofstee Cell Chief Scientist and Cell Synergistic Processor Chief Architect IBM Systems and Technology Group Austin TX USA Cell Chief Software Architect and Distinguished Engineer IBM Systems and Technology Group Austin TX USA

The Cell processor is a first instance of a new family of processors intended for the broadband era. The processors will find early use in game systems (PlayStation3TM), a variety of other consumer electronics applications, a wide variety of embedded applications, and various forms of computational accelerators. Cell is a non-homogeneous multi-core processor, with one POWER processor core (two threads) dedicated to the operating system and other control functions, and eight synergistic processors optimized for compute-intensive *** addresses two of the main limiters to microprocessor performance: increased memory latency, and performance limitations induced by system power limits. Memory latency is addressed by introducing another software-managed level of private "local" memory, in between the private registers and shared system memory. Data is transferred between this local memory and shared memory with asynchronous cache coherent DMA commands, and synergistic processor load and store commands access the local store only. This organization of memory makes it possible for the Cell processor to have over 100 memory transactions in flight at the same time, more than enough to cover memory latency. Power limitations are addressed by two main mechanisms; a non-homogeneous multi-core organization, and an ultra high-frequency design that allows the chip to be operated at 3.2GHz at low *** Cell processor supports many of today's programming models by introducing the concept of heterogeneous tasks or threads. Both Power processor and SPE based threads can be managed by the operating system and effectively utilized by applications starting with the relatively straightforward function offload model to the more complex single source heterogeneous parallel programming model. Cell achieves between one and two orders of magnitude of performance advantage over conventional single-core processors on compute-intensive (32-bit) applications, by permitting progr

关键词： Hardware Software architecture Yarn Delay Power system modeling Application software Operating systems computer applications Registers Games

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A flexible low-complexity robust THP approach for MISO downlinks with imperfect CSI

A flexible low-complexity robust THP approach for MISO downl...

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IEEE international conference on Communications in China (ICCC)

作者： Yuan Luechao Wang Gaojiang Gerd Ascheid Liu Cang Xing Zuocheng College of Computer National University of Defense Technology Changsha Hunan P.R. China Institute for Communication Technologies and Embedded Systems RWTH Aachen University Aachen German

Tomlinson-Harashima precoding (THP) is an attractive non-linear interference cancellation method for multiple-input multiple-output (MIMO) system with decentralized receivers. Compared to linear methods, it is able to achieve significant performance improvement while introduce negligible computational complexity increase. However, THP is sensitive to inevitable channel state information (CSI) errors at the transmitter in wireless communications. We statistically model the errors caused by channel estimation and feedback delay. By taking this modeling into account, we propose a flexible low-complexity compensation method for THP with imperfect CSI. In contrast to several robust designs optimized for one specific THP implementation, our approach can achieve average robustness for various THP implementations with negligible complexity overhead. Several canonical and emerging preprocessing algorithms, e.g, sorted QR decomposition (SQRD), vertical Bell Laboratories Space Time (V-BLAST) and lattice reduction (LR), are evaluated under a 802.11ac based MIMO OFDM simulation system. The experimental results show that the proposed compensation approach is able to lower the error floors caused by imperfect CSI significantly for various THP implementations.

关键词： Channel estimation Receivers Robustness Precoding Delays Interference Wireless communication

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EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs

EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Ch...

引用

international conference on Field Programmable Logic and Applications

作者： Yee Yang Tan Felix Staudigl Lukas Jünger Anna Drewes Rainer Leupers Jan Moritz Joseph Institute for Communication Technologies and Embedded Systems RWTH Aachen University Germany Institute for Information and Communication Technologies Otto-von-Guericke Universität Magdeburg Germany

Networks-on-Chips (NoCs) recently became widely used, from multi-core CPUs to edge-AI accelerators. Emulation on FPGAs promises to accelerate their RTL modeling compared to slow simulations. However, realistic test stimuli are challenging to generate in hardware for diverse applications. In other words, both a fast and flexible design framework is required. The most promising solution is hybrid emulation, in which parts of the design are simulated in software, and the other parts are emulated in hardware. This paper proposes a novel hybrid emulation framework called EmuNoC. We introduce a clock-synchronization method and software-only packet generation that improves the emulation speed by 36.3 × to 79.3 × over state-of-the-art frameworks while retaining the flexibility of a pure-software interface for stimuli simulation. We also increased the area efficiency to model up to an NoC with 169 routers on a single FPGA, while previous frameworks only achieved 64 routers.

关键词： Emulation Network-on-chip computer architecture Benchmark testing Software Hardware Field programmable gate arrays

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Research and implementation of a web-based grid-enabled visualization system

Research and implementation of a web-based grid-enabled visu...

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2012 4th international conference on computer modeling and simulation (ICCMS 2012)

作者： HAN Wei-jie 1 , Wang yu 1 , Yan Hui 2 , Zhang Xue-bo 1 1 Department of Information Equipment, The Academy of Equipment 2 Department of Scientific Research, The Academy of Equipment

Grid-based visualization system can aggregate and share geographically distributed data sources, analysis facilities and visualization systems, and also offer transparent data access capabilities. We develop a web-based visualization system on the grid. The system consists of three components: the WebSheet, the web server and the visualization server. The front-end of the system provides the users with the web-based access interface built on JSP, and the embedded VisPortal provides grid access portal for the users. The middle part of the system is the web server which aims to manipulate, dispatch, utilize grid resources and mediate the interaction between the user and the grid. The back-end of the system is the visualization server and we build one based on Vis5D as a grid, which delivers grid-based visualization services of 5-D gridded datasets generated from the numerical weather models.

关键词： Web-based visualization, grid, VisPortal, visualization server

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FAuto: An Efficient GMM-HMM FPGA Implementation for Behavior Estimation in Autonomous systems

FAuto: An Efficient GMM-HMM FPGA Implementation for Behavior...

引用

international Joint conference on Neural Networks (IJCNN)

作者： Junde Li Navyata Gattu Swaroop Ghosh School of Electrical Engineering and Computer Science Pennsylvania State University PA USA

ISBN: (数字)9781728169262

ISBN: (纸本)9781728169279

Driving behavior estimation in car-following scenario based on contextual traffic information is an essential capability for autonomous driving systems. Real-time motion planning based on incomplete environment perception requires complicated probabilistic model for interactions with surrounding objects and road conditions. Hidden Markov Model (HMM) with Gaussian emissions has been used to model driving behaviors for its ability of inferring unobserved states. While the high-dimensional contextual data is continuously processed, the system should be high-performance and power-efficient to make real-time decisions for safe operations. Field Programmable Gate Array (FPGA) is being increasingly used on embedded System-on-Chip (SoC) for mobile applications mainly because of its parallel computation and low-power consumption. This paper implements FAuto: the framework of HMM coupled with GMM algorithm on a Xilinx PYNQ-Z2 board for autonomous systems. We design the hybrid GMM-HMM model in python, and train the model using Next Generation simulation (NGSIM) trajectory data on a CPU platform. The hardware accelerator is designed through Vivado HLS 2018.2, and verified with Jupiter notebook. FAuto achieves 2.59 TOPS/W power efficiency, and 10.39× speedup compared to Python software implementation running on quad-core i7-7500U CPU.

关键词： Hidden Markov models Estimation Field programmable gate arrays Computational modeling Markov processes Gaussian mixture model

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Emergence of Cooperation in Competitive Environments

Emergence of Cooperation in Competitive Environments

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international IEEE conference on Signal-Image Technologies and Internet-Based System

作者： Marco Alberto Javarone Antonio Emanuele Atzeni Dept. of Mathematics and Computer Science University of Cagliari Cagliari Italy Dept. of Physics University of Cagliari Cagliari Italy

We study the Prisoner's Dilemma in competitive environments with the aim to investigate if, and under which conditions, a cooperative behavior emerges in an agent population. In particular, agents are embedded in two different regions of space, i.e., A continuous space and a discrete space. The former is represented by a simple square, whereas the latter by a directed network. In both spaces, agents face by playing the Prisoner's Dilemma with their neighbors. In the continuous space, neighbors are identified by a rule based on the Euclidean distance among agents. Instead, in the network, agents have as neighbors those connected with them. In the proposed model, the competitiveness corresponds to the number of opponents each agent decides to face, i.e., Competitive agents faces many agents at each time step. Therefore, in the continuous space, the competitiveness is represented by the radius of each agent within it finds its opponents. Instead, in the discrete space, the competitiveness corresponds to the agent's out-degree, i.e., The number of neighbors connected with an arrow starting from the considered agent an directed to its neighbors. We study the evolution of the system over time in both spaces, analyzing also the degree distribution (both the in-degree and the out-degree) of the resulting directed network. It is worth to highlight that, as main result, we found the competitiveness strongly improves cooperation among agents in both domains. Furthermore, as cooperation emerges when the Prisoner's Dilemma is played over a network, several agents become hubs (i.e., Agents with a high out-degree).

关键词： Face Numerical models Games Sociology Statistics Numerical simulation Computational modeling

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embedded Neural Network to Model-based Permanent Magnet Synchronous Motor Diagnostics

Embedded Neural Network to Model-based Permanent Magnet Sync...

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第六届IEEE国际电力电子与运动控制会议 (2009 IEEE 6th international Power Electronics and Motion Control conference-ECCE Asia

作者： Junhong Zhang Yunping Zou Youping Fan Huazhong Univ.of Science and Technology/College of Electrical & Electronics Engineering Wuhan430074 Huazhong Univ.of Science and Technology/College of Electrical & Electronics Engineering Wuhan430074 Wuhan Univ./College of Electrical Engineering Inst.of Bulk Grid SecurityWuhan430072China

Effective Fault detection and diagnosis (FDD) is especially important for some special applications, such as Navy ships operating in hostile environments. So far, FDD for nonlinear systems has not been fully explored. This paper makes an effort to fill the gap by extending an existing Monitor architecture and a series of algorithms for FDD of Permanent Magnet Synchronous Motors (PMSM). A fault model is proposed for the stator winding turn-to-turn fault of PMSM. The model provides a good compromise between computational complexity and model accuracy and is versatile for both the healthy and the fault condition. simulation studies demonstrate a good correspondence with both the theoretical analysis and the experimental observations in the paper.

关键词： Neural networks Permanent magnet motors Computational modeling Fault detection Fault diagnosis Marine vehicles Nonlinear systems computer architecture Stator windings Computational complexity

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VRACK — virtual reality augmented cycling kit: Design and validation

VRACK — virtual reality augmented cycling kit: Design and v...

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IEEE Annual international Symposium Virtual Reality

作者： Richard Ranky Mark Sivak Jeffrey Lewis Venkata Gade Judith E. Deutsch Constantinos Mavroidis Biomedical Mechatronics Laboratory Department of Mechanical & Industrial Engineering Northeastern University Boston MA USA VRehab LLC NJ USA RIVERS (Research in Virtual Environments & Rehabilitation Sciences) Laboratory Department of Rehabilitation and Movement Sciences University of Medicine and Dentistry of New Jersey Newark NJ USA

ISBN: (纸本)9781424462377

In this paper the virtual reality augmented cycling kit (VRACK) a mechatronic rehabilitation system with an interactive virtual environment is presented. It was designed as a modular system that can convert most bicycles in virtual reality (VR) cycles. Novel hardware components embedded with sensors were implemented on a stationary exercise bicycle to monitor physiological and biomechanical parameters of participants while immersing them in a virtual reality simulation providing the user with visual, auditory and haptic feedback. This modular and adaptable system attaches to commercially-available stationary bicycle systems and interfaces with a personal computer for simulation and data acquisition processes. The bicycle system includes novel handle bars based on hydraulic pressure sensors and innovative pedals that monitor lower extremity kinetics and kinematics. Parameters monitored by these systems are communicated to a practitioner's interface screen and can be amplified before entering its virtual environment. The first prototype of the system was successful in demonstrating that a modular mechatronic kit can monitor and record kinetic, kinematic and physiologic parameters of riders.

关键词： Virtual reality Bicycles computerized monitoring Condition monitoring Mechatronics Virtual environment Biomedical monitoring Computational modeling Kinetic theory Kinematics

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