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检索条件"任意字段=International Conference on Embedded Computer Systems Architectures Modeling and Simulation"

共 2831 条记录，以下是41-50 订阅

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Measuring and Interpreting Dependent Task-Based Applications Performances 15th

Measuring and Interpreting Dependent Task-Based Application...

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15th international conference on Parallel Processing and Applied Mathematics, PPAM 2024

作者： Pereira, Romain Gautier, Thierry Roussel, Adrien Carribault, Patrick Avalon LIP ENS Inria Lyon France LIHPC CEA DAM DIF Arpajon91297 France

ISBN: (纸本)9783031856969

Breaking down the parallel time into work, idleness, and overheads is crucial for assessing the performance of HPC applications, but difficult to measure in asynchronous dependent tasking runtime systems. No existing tools allow its measurement portably and accurately. This paper introduces POT: a tool-suite for dependent task-based applications performance measurement. We focus on its low-disturbance methodology consisting of task modeling, discrete-event tracing, and post-mortem simulation-based analysis. It supports the OMPT standard OpenMP specifications. The paper evaluates the precision of POT’s parallel time breakdown analysis on LLVM and MPC implementations and shows that measurement bias may be neglected above 16μs workload per task, portably across two architectures and OpenMP runtime systems © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Discrete event simulation

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21st international Colloquium on Theoretical Aspects of Computing, ICTAC 2024

21st International Colloquium on Theoretical Aspects of Comp...

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21st international Colloquium on Theoretical Aspects of Computing, ICTAC 2024

ISBN: (纸本)9783031770180

The proceedings contain 22 papers. The special focus in this conference is on Theoretical Aspects of Computing. The topics include: Well-Behaved (Co)algebraic Semantics of Regular Expressions in Dafny;jump Complexity of Deterministic Finite Automata with Translucent Letters;learning Closed Signal Flow Graphs;dual Adjunction Between Ω-Automata and Wilke Algebra Quotients;on Concurrent Program Algebra and Demonic Automata;bisimulations and Logics for Higher-Dimensional Automata;maximizing Weighted Dominance in the Plane;generalized Parikh Matrices for Tracking Subsequence Occurrences;card-Based Protocols with Single-Card Encoding;winning Strategy Templates for Stochastic Parity Games Towards Permissive and Resilient Control;disconnection Rules are Complete for Chemical Reactions;verification with Common Knowledge of Rationality for Graph Games;reversibility in Process Calculi with Nondeterminism and Probabilities;a Theory of Proc-Omata—and Proof Methods for Process architectures;Formal Foundations for Efficient simulation of MOM systems: The Refinement Calculus for Object-Oriented Event-Graphs;type Safety for Isabelle/Solidity;history-Based Reasoning About Behavioral Subtyping;switched systems in Coq for modeling Periodic Controllers;A Quantum-Inspired Mechanical Method for Proving of Ramsey’s Theorem by Symbolic Computation over the Finite Field GF(2);runtime Enforcement with Event Reordering.

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Fast Bit-Sliced VLSI architectures on FPGA for Montgomery Domain Modular Inversion

Fast Bit-Sliced VLSI Architectures on FPGA for Montgomery Do...

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international conference on VLSI Design

作者： Soham Adhikary Ayan Palchaudhuri Department of Electronics & Communication Engineering School of Electrical and Computer Sciences Indian Institute of Technology Bhubaneswar Argul Khordha Odisha India

ISBN: (数字)9798331522445

ISBN: (纸本)9798331522452

Modular inversion computation forms a crucial component in Elliptic Curve Cryptosystems. In this paper, we have proposed a fast VLSI architecture for Kaliski's Montgomery domain modular inversion al-gorithm using bit-sliced design paradigm. Logic sharing among functional modules and direct configuration of the FPGA logic primitives were adopted to reduce the critical path wherever possible. The hardwired carry chain fabric of FPGA was exploited to bring down the critical path delay. The entire design flow was implemented on modern day FPGA family and the post-implementation timing simulation results are reported.

关键词： embedded systems simulation computer architecture Very large scale integration Elliptic curve cryptography Fabrics Table lookup Delays Logic Field programmable gate arrays

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embedded computer systems: architectures, modeling, and simulation: 5th international Workshop, SAMOS 2005. Proceedings

Embedded Computer Systems: Architectures, Modeling, and Simu...

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5th international Workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2005

The proceedings contain 49 papers from the embedded computer systems: architectures, modeling, and simulation: 5th international Workshop, SAMOS 2005. The topics discussed include: interprocedural optimization for dynamic hardware configurations;reconfigurable embedded systems: an application-oriented perspective on architectures and design techniques;reconfigurable multiple operation array;RAPANUI: rapid prototyping for media processor architecture exploration;data-driven regular reconfigurable arrays: design space exploration and mapping;automatic FIR filter generation for FPGAs;and two-dimensional fast cosine transfrom for vector-STA architectures.

关键词： embedded systems

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modeling and simulation Verification of Operating Mode Switching of Train Control System Based on Train-to-Train Communication 24th

Modeling and Simulation Verification of Operating Mode Swi...

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24th international conference on Algorithms and architectures for Parallel Processing, ICA3PP 2024

作者： Li, Qiang Liao, Ian Wen, Sheng Xiang, Yang Lanzhou Jiaotong University Lanzhou China Swinburne University of Technology Melbourne Australia Top-Rail Service Pittsburg United States

ISBN: (纸本)9789819615506

The train control system needs to accommodate various operational scenarios through the design of distinct working modes, each triggered by changing input conditions. These modes correspond to specific speed limits and safety requirements, ensuring the safety, efficiency, and continuity of train operations. The future of next-generation urban rail transit lies in train control systems based on train-to-train communication. Due to structural changes, traditional CBTC (Communication-Based Train Control) model designs are no longer applicable, and there is currently no comprehensive model design available. This paper examines the mode-switching function and processes appropriate for train-to-train communication control systems. A new mode definition and switching scheme is proposed. In the event of train-to-train communication failure, the train switches to a backup operation mode using train-to-ground communication to acquire position information from ground equipment. To describe this transition, we use the theory of Colored Petri Nets to establish a mode-switching model based on Hierarchical Timed Colored Petri Nets (HTCPN). The model effectively transitions trains from train-to-train mode (T2T) to train-to-ground mode (T2G) under failure conditions. We studied the impact of different operational intervals in the backup mode on system performance through simulations, which show that trains can effectively switch to train-to-ground mode during communication failures. Analysis of successful mode switches and switching times under different backup mode intervals reveals that the success rate increases with longer intervals. An interval of 240 s minimizes train operation delays to within 3 min. The HTCPN model established serves as a reference for verifying and analyzing other multi-mode train control systems. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Petri nets

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DATCloud: A Model-Driven Framework for Multi-Layered Data-Intensive architectures

DATCloud: A Model-Driven Framework for Multi-Layered Data-In...

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IEEE international conference on Software Architecture Workshops (ICSAW)

作者： Moamin Abughazala Henry Muccini DISIM Department University of L'Aquila L'Aquila Italy Department of Information Technology An Najah N. University Nablus Palestine

ISBN: (数字)9798331533366

ISBN: (纸本)9798331533373

The complexity of multi-layered, data-intensive systems demands frameworks that ensure flexibility, scalability, and efficiency. DATCloud is a model-driven framework designed to facilitate the modeling, validation, and refinement of multi-layered architectures, addressing scalability, modularity, and real-world requirements. By adhering to ISO/IEC/IEEE 42010 standards, DATCloud leverages structural and behavioral meta-models and graphical domain-specific languages (DSLs) to enhance reusability and stakeholder communication. Initial validation through the VASARI system at the Uffizi Gallery demonstrates a 40% reduction in modeling time and a 32% improvement in flexibility compared to manual methods. While effective, DATCloud is a work in progress, with plans to integrate advanced code generation, simulation tools, and domain-specific extensions to further enhance its capabilities for applications in healthcare, smart cities, and other data-intensive domains.

关键词： Software architecture Smart cities Scalability ISO Standards computer architecture Medical services Manuals Data models Stakeholders Standards

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Formal modeling and Priority Handling Verification of Interrupt Injection in a Hypervisor 3rd

Formal Modeling and Priority Handling Verification of Inte...

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3rd international conference on Cyberspace simulation and Evaluation, CSE 2024

作者： Huang, Yuxin Luo, Jian Chen, Lirong Xiao, Kun Luo, Lei Li, Yushan University of Electronic Science and Technology of China Chengdu 611731 China China Mobile IoT Company Limited Chongqing 401121 China

ISBN: (纸本)9789819645084

Virtualization has become a key tool for optimizing resource use, and ARM virtualization extensions have made it easier for hypervisors to run on embedded systems. As a fundamental behavior of the system, interrupt handling is a critical component of operating systems, and the same holds true for interrupt virtualization in hypervisors. However, the implementation of interrupt virtualization can be complex, even with the hardware-assisted virtualization provided by the Generic Interrupt Controller (GIC). The behavior of the virtual GIC on a virtual machine could be inconsistent with that of the GIC in a non-virtualized environment, potentially leading to issues such as interrupt loss and priority inversion. As a key method for proving system correctness, formal modeling and verification are essential for proving the priority handling properties of interrupt virtualization. In this paper, we examine how interrupt injection is managed in existing open-source hypervisors on ARM platforms with GIC hardware-assisted virtualization extensions, focusing particularly on how hypervisors handle interrupt overflow during injection. Finally, we apply formal methods to describe the behavior of interrupt injection and verify that priority inversion can occur if the virtual interrupts in the list registers are not evicted according to their priority. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： ARM Formal Verification Hypervisor Interrupt Virtualization Isabelle/HOL

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embedded computer systems: architectures, modeling, and simulation - 6th international Workshop, SAMOS 2006, Proceedings

Embedded Computer Systems: Architectures, Modeling, and Simu...

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6th international Workshop on architectures, modeling, and simulation, SAMOS 2006

ISBN: (纸本)3540364102

The proceedings contain 48 papers. The topics discussed include: reconfigurable platform for digital convergence terminals;European research in embedded systems;interface overheads in embedded multimedia software;automated distribution of UML 2.0 designed applications to a configurable multiprocessor platform;key research challenges for successfully applying MDD within real-time embedded software development;domain-specific modeling of power aware distributed real-time embedded systems;mining dynamic document spaces with massively parallel embedded processors;designing wireless sensor nodes;design, implementation, and experiment on outdoor deployment of wireless sensor network for environmental monitoring;energy-driven partitioning of signal processing algorithms in sensor networks;security in wireless sensor networks: considerations and experiments;on security of PAN wireless systems;and code size reduction by compiler tuning.

关键词： computer systems

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embedded computer systems: architectures, modeling, and simulation: 7th international Workshop, SAMOS 2007 Proceedings

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7th international Workshop on embedded computer systems: architectures, modeling, and simulation, SAMOS 2007

ISBN: (纸本)9783540736226

The proceedings contain 46 papers. The topics discussed include: software is the answer but what is the question?;integrating VLIW processors with a network on chip;communication architecture simulation on the virtual synchronization framework;a model-driven automatically-retargetable debug tool for embedded systems;performance evaluation of memory management configurations in Linux for an OS-level design space exploration;model and validation of block cleaning cost for flash memory;VLSI architecture for MRF based stereo matching;low-power twiddle factor unit for FFT computation;trade-offs between voltage scaling and processor shutdown for low-energy embedded multiprocessors;an automatically-retargetable time-constraint-driven instruction scheduler for post-compiling optimization of embedded code;improving TriMedia cache performance by profile guided code reordering;and a streaming machine description and programming model.

关键词： embedded systems

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HelioCubed: A High Order Inner Heliosphere simulation Code with a Mapped Cubed Sphere Grid and Adaptive Mesh Refinement 16

HelioCubed: A High Order Inner Heliosphere Simulation Code w...

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16th international conference on Numerical modeling of Space Plasma Flows, ASTRONUM 2024

作者： Singh, Talwinder Colella, Phillip Van-Straalen, Brian Bozhart, Chris Pogorelov, Nikolai V. Department of Physics & Astronomy Georgia State University AtlantaGA30303 United States Applied Numerical Algorithms Group Lawrence Berkeley National Laboratory BerkeleyCA94720 United States Electrical Engineering and Computer Science Department University of California Berkeley BerkeleyCA94720 United States Department of Space Science The University of Alabama in Huntsville HuntsvilleAL35805 United States Center for Space Plasma and Aeronomic Research The University of Alabama in Huntsville HuntsvilleAL35805 United States

We present the HelioCubed, a high-order magnetohydrodynamic (MHD) code designed for modeling the inner heliosphere. The code is designed to achieve 4th order accuracy both in space and in time. In addition, HelioCubed can perform simulations on mapped grids, such as those based on cubed spheres, which makes it possible to overcome stability limitations caused by the geometrical singularity at the polar axis of a spherical grid, thus enabling substantially larger time steps. HelioCubed has been developed using the high-level Proto library, ensures performance portability across CPU and GPU architectures, and supports back-end implementations, e.g., CUDA, HIP, OpenMP, and MPI. The code is compatible with the HDF5 library, which facilitates seamless data handling for simulations and boundary conditions derived from semi-empirical and MHD models of the solar corona. While presenting the results of preliminary simulations, we demonstrate that our simulations are indeed performed with 4th order of accuracy. Our approach ensures that HelioCubed solves the MHD equations preserving the radial flow to machine round-off error even on cubed-sphere grids. Solar wind simulations are performed using the boundary conditions provided by the Wang-Sheeley-Arge coronal model of the ambient solar wind. It also allows us to to simulate coronal mass ejections using observation-driven flux rope models. These capabilities make HelioCubed a versatile and powerful tool to advance heliophysics research and space weather forecasting. © 2025 Institute of Physics Publishing. All rights reserved.

关键词： Mesh generation

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