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检索条件"任意字段=International Conference on Embedded Computer Systems Architectures Modeling and Simulation"

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Automatic recognition of computational kernels for platform-dependent code optimizations

Automatic recognition of computational kernels for platform-...

引用

international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： María H. Rodríguez Blanco Georg Reinke Gerd Ascheid Rainer Leupers Institute for Communication Technologies and Embedded Systems RWTH Aachen University Aachen Nordrhein-Westfalen DE Institute for Communication Technologies and Embedded Systems RWTH Aachen University Aachen Germany

ISBN: (纸本)9781509030774

We present a novel approach that assists the task of porting code to an embedded platform. Our tool automatically identifies code segments in the input program that can be replaced with optimized kernels from a platform-dependent library. Using a C-function as a model that describes the computational kernel, the tool identifies equivalent code regardless of syntactic and computational variations. For a case study using the Texas Instruments C66x DSP library, our approach identified code replacement opportunities that resulted in runtime performance speedups of up to 2.2x.

关键词： Kernel Libraries Computational modeling Syntactics Pattern matching Digital signal processing

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Real-Time hardware/software co-design using devs-based transparent m&s framework 48

Real-Time hardware/software co-design using devs-based trans...

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48th Summer computer simulation conference, SCSC 2016, Part of the 2016 Summer simulation Multi-conference, SummerSim 2016

作者： Risco-Martin, Jose L. Mittal, Saurabh Fabero, Juan Carlos Malagon, Pedro Ayala, Jose L. C/Prof. Jose Garcia Santesmases Complutense University of Madrid Madrid Spain MITRE Corporation McLean VA United States Technical University of Madrid Avda. Complutense Madrid Spain

ISBN: (纸本)9781510824256

Design and development of hard Real-Time (RT) embedded systems present several crucial requirements regarding criticality and timeliness of these systems. Formal methods have been presented as a promising alternative to deal with the design issues of these applications. However, these formal method do not scale well in complex systems. modeling and simulation (M&S) provides cost-effective approaches to verify and validate the design and implementation details of complex RT applications. Nevertheless, M&S approaches and artifacts are usually discarded in the later phases of the development. Discrete Event systems Specification (DEVS) provides an appropriate M&S framework to provide formal specifications to the actual RT system, incrementally moving from software specifications to a full hardware embedded system. In this work, we propose a hardware-in-The-loop model- driven method, based on DEVS for RT/embedded application/systems engineering. Our approach is based on an incremental substitution of DEVS virtual software models with Unix-compliant device files through a formally defined process in the modeling phase. Consequently, any DEVS simulation engine can be used. This paper advances the state-of-The-Art in hardware-software co-design methodologies. © 2016 Society for modeling & simulation international (SCS).

关键词： Discrete event simulation

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Coarse grained reconfigurable architectures in the past 25 years: Overview and classification

Coarse grained reconfigurable architectures in the past 25 y...

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Mark Wijtvliet Luc Waeijen Henk Corporaal Department of Electrical Engineering Eindhoven University of Technology Eindhoven AZ The Netherlands

ISBN: (纸本)9781509030774

Reconfigurable architectures become more popular now general purpose compute performance does not increase as rapidly as before. Field programmable gate arrays are slowly moving into the direction of Coarse Grain Reconfigurable architectures (CGRA) by adding DSP and other coarse grained IP blocks, general purpose processors become more heterogeneous and include sub-word parallelism and even some reconfigurable logic. In the past 25 years, several CGRAs have been published. In this paper an overview and classification of these architectures is presented. This work also provides a clear definition of CGRAs and identifies topics for future research which are key to unlock the full potential of CGRAs.

关键词： computer architecture Field programmable gate arrays Program processors Hardware Dynamic scheduling Performance evaluation Logic gates

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Supporting composition in symbolic system synthesis

Supporting composition in symbolic system synthesis

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Kai Neubauer Christian Haubelt Michael Glaß University of Rostock Rostock-Warnemünde Germany University of Erlangen-Nuremberg Erlangen Germany

ISBN: (纸本)9781509030774

Typically, state-of-the-art approaches in system synthesis do not consider the trend in embedded systems design towards systems-of-systems where optimized subsystems exist from previous projects or as 3 rd party IP. In this paper, we propose a novel top-down system synthesis approach with additional support for the composition of subsystems that is based on the use of hierarchical mapping edges and a list-based scheduling algorithm using distributed priority queues. The proposed method not only enables composition of existing subsystems, but experimental results also show a significant reduction of the design space while maintaining a good quality of the implemented systems. Especially for large network-on-chip systems (NoC), our approach outperforms an existing top-down methodology in solving time by nearly 50% and in average quality by 11%.

关键词： Schedules Resource management embedded systems Communication channels Market research IP networks Scheduling algorithms

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Towards multi-level-simulation using dynamic cloud environments 6

Towards multi-level-simulation using dynamic cloud environme...

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6th international conference on simulation and modeling Methodologies, Technologies and Applications, SIMULTECH 2016

作者： Wittek, Stefan H.A. Göttsche, Michael Rausch, Andreas Grabowski, Jens Department of Informatics Clausthal University of Technology Clausthal-Zellerfeld Germany Institute of Computer Science Georg-August-University Göttingen Göttingen Germany

ISBN: (纸本)9789897581991

The engineering of cyber physical systems requires holistic simulation perspectives. To cope with the complexity of these systems, we aim to provide a simulation methodology that is efficient regarding model complexity. The required holistic perspective is reached on a coarse level, which is co-simulated with multiple detailed models of some areas of the system that are of particular interest to the investigated phenomena. Which areas are thus "zoomed in" is dynamic during a simulation run. To reflect this, the resulting Multi-Level-simulation is deployed in a dynamic cloud environment, using the provided hardware resources in a cost-efficient manner. © Copyright 2016 by SCITEPRESS - Science and Technology Publications, Lda. All rights reserved.

关键词： embedded systems

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A hybrid approach for mapping and scheduling on heterogeneous multicore systems

A hybrid approach for mapping and scheduling on heterogeneou...

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： A. Emeretlis G. Theodoridis P. Alefragis N. Voros Dept. of Electrical & Computer Engineering University of Patras Patras Greece Dept. of Computer & Informatics Engineering TEI of Western Greece Antirio Greece

ISBN: (纸本)9781509030774

A hybrid approach for mapping applications represented as Directed Acyclic Graphs (DAGs) is introduced in this work. It combines the Benders decomposition principle, which integrates Integer Linear and Constraint Programming (ILP and CP) methods, with a pure ILP model to find optimal solutions. The cuts that are generated during the iterative Benders solution process are later exploited by the ILP solver to prune the remaining search space. The proposed model succeeds to provide the optimal solution in cases where either method alone fails to do so, while it also reduces the total solution time.

关键词： Multicore processing Optimization Scheduling computers Programming Computational modeling Linear programming

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Perspectives on system-level MPSoC design space exploration

Perspectives on system-level MPSoC design space exploration

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Andy Pimentel Universiteit van Amsterdam Amsterdam Noord-Holland NL

ISBN: (纸本)9781509030774

The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of the field of system-level design and synthesis. To cope with the design complexity, system-level design and synthesis methods aim at raising the abstraction level of the design process. Key enablers to this end are, for example, the use of architectural platforms to facilitate re-use of IP components and the notion of high-level system modelling and simulation. The latter allows for capturing the behavior of platform components and their interactions at a high level of abstraction. As such, these high-level models minimize the modeling effort and are optimized for execution speed, and can therefore be applied during the very early design stages to perform design space exploration (DSE). Such early DSE is of paramount importance as early design choices heavily influence the success or failure of the final product. In this talk, I will provide an overview of the recent advances in our research on system-level MPSoC DSE, such as scenario-based DSE for design-time as well as run-time application mapping, and will present some future challenges that need to be addressed in this domain.

关键词： Space exploration Complexity theory System-level design embedded systems Multiprocessing systems IP networks

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High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms

High-level synthesis of dynamic dataflow programs on heterog...

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Endri Bezati Simone Casale-Brunet Marco Mattavelli Jorn W. Janneck EPFL SCI STI MM École Polytechnique Fédérale de Lausanne Switzerland Dept. of Computer Science Lund University Sweden

ISBN: (纸本)9781509030774

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on programmable logic devices and embedded processors. Past research has shown that, for complex systems, raising the level of abstraction of design stages does not necessarily come at a penalty in terms of performance or resource requirements. Dataflow programs provide behavioral descriptions capable of expressing both sequential and parallel components of application algorithms and enable natural design abstractions, modularity, and portability. In this paper, an open source tool, implementing dataflow programs onto embedded heterogeneous platforms by means of high-level synthesis, software synthesis and interface synthesis is presented Experimental design results demonstrate the capability and the effectiveness of the tool for implementing a wide range of applications when combined with Vivado HLS.

关键词： computer architecture Unified modeling language Programming Software Hardware System analysis and design Computational modeling

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numap: A portable library for low-level memory profiling

numap: A portable library for low-level memory profiling

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Manuel Selva Lionel Morel Kevin Marquet Univ Lyon Insa Lyon Inria CITI Villeurbanne France

ISBN: (纸本)9781509030774

The memory subsystem of modern multi-core architectures is becoming more and more complex with the increasing number of cores integrated in a single computer system. This complexity leads to profiling needs to let software developers understand how programs use the memory subsystem. Modern processors come with hardware profiling features to help building tools for these profiling needs. Regarding memory profiling, many processors provide means to monitor memory traffic and to sample read and write memory accesses. Unfortunately, these hardware profiling mechanisms are often very complex to use and are specific to each micro-architecture. In this work, we present numap, a library dedicated to the profiling of the memory sub-system of modern multi-core architectures. numap is portable across many micro-architectures and comes with a clean application programming interface allowing to easily build profiling tools on top of it.

关键词： Phasor measurement units Hardware Libraries Program processors Linux computer architecture Kernel

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An OpenCL-based framework for rapid virtual prototyping of heterogeneous architectures

An OpenCL-based framework for rapid virtual prototyping of h...

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international conference on embedded computer systems: architectures, modeling and simulation (IC-SAMOS)

作者： Efstathios Sotiriou-Xanthopoulos Leonard Masing Kostas Siozios George Economakos Dimitrios Soudris Jürgen Becker School of Electrical and Computer Engineering National Technical University of Athens Athens Greece Institute for Information Processing Karlsruhe Institute of Technology Karlsruhe Germany

ISBN: (纸本)9781509030774

The increasing performance and power requirements in embedded systems has lead to a variety of heterogeneous hardware architectures, featuring many different types of processing elements. This heterogeneity however induces extra effort on system development and programming. To address this heterogeneity, OpenCL provides a portable programming model which enables the use of one source code in various architectures featuring different types of processors. Also, such systems impose higher design complexity due to the existence of an increased number of hardware components. Virtual Prototyping aims to alleviate this issue by enabling the hardware modeling in higher abstraction levels. This paper combines the benefits of OpenCL with Virtual Prototyping, by proposing an OpenCL-based framework for rapid prototyping, which (a) automatically derives a virtual prototype from an OpenCL code; (b) executes the OpenCL application by running the host program along with the hardware simulation; and (c) proposes a design flow for faster system evaluation, as compared to state-of-the-art FPGA-based flow. Using a set of OpenCL benchmarks, it is shown that the proposed framework enables faster prototyping by up to 18 x, as compared to state-of-the-art flow.

关键词： Hardware Field programmable gate arrays Programming computer architecture Kernel Virtual prototyping

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