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检索条件"任意字段=International Conference on Field Programmable Logic and Applications"
16761 条 记 录,以下是341-350 订阅
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AN ANALYTICAL MODEL DESCRIBING THE RELATIONSHIPS BETWEEN logic ARCHITECTURE AND FPGA DENSITY
AN ANALYTICAL MODEL DESCRIBING THE RELATIONSHIPS BETWEEN LOG...
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18th international conference on field programmable and logic applications
作者: Lam, Andrew Wilton, Steven J. E. Leong, Philip Luk, Wayne Univ British Columbia Elec & Comp Engn Vancouver BC V5Z 1M9 Canada Chinese Univ Hong Kong Comp Sci & Engn Hong Kong Hong Kong Peoples R China Imperial Coll Dept Comp London England
This paper describes an analytical model, based principally on Rent's Rule, that relates logic architectural parameters to the area efficiency of an FPGA. In particular, the model relates the lookup-table size, th... 详细信息
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WEIGHTED PARTITIONING OF SEQUENTIAL PROCESSING CHAINS FOR DYNAMICALLY RECONFIGURABLE FPGAS
WEIGHTED PARTITIONING OF SEQUENTIAL PROCESSING CHAINS FOR DY...
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23rd international conference on field programmable logic and applications (FPL)
作者: Feilen, Michael Iliopoulos, Andreas Vonbun, Michael Stechele, Walter Tech Univ Munich Lehrstuhl Integrierte Syst D-80290 Munich Germany
Temporal runtime-reconfiguration of FPGAs allows for a resource-efficient sequential execution of signal processing modules. Approaches for partitioning processing chains into modules have been derived in various prev... 详细信息
来源: 评论
The Design Method of logic Circuits based on the Voltage-Input Enhanced Scouting logic Gates  32
The Design Method of Logic Circuits based on the Voltage-Inp...
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32nd international conference on field-programmable logic and applications (FPL)
作者: Liu, Fan Zhang, Sunrui Cui, Xiaole Peking Univ Shenzhen Grad Sch Key Lab Integrated Microsyst Shenzhen Peoples R China Peng Cheng Lab Shenzhen Peoples R China
The Enhanced Scouting logic (ESL) is a memristive logic gate family with low sensitivity to resistance variation and high device endurance. This work studies the design methods of logic circuits based on the Voltage-I... 详细信息
来源: 评论
Post-LUT-Mapping Implementation of General logic on Carry Chains Via a MIG-Based Circuit Representation  31
Post-LUT-Mapping Implementation of General Logic on Carry Ch...
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31st international conference on field-programmable logic and applications (FPL)
作者: Kim, Jin Hee Anderson, Jason Univ Toronto Toronto ON Canada
Carry chains on FPGAs have traditionally been only used for fast binary arithmetic operations. In this paper, we propose using the carry chain to implement general logic as a means of reducing the critical path delay ... 详细信息
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Partitioning Large-Scale, Multi-FPGA applications for the Data Center  33
Partitioning Large-Scale, Multi-FPGA Applications for the Da...
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33rd international conference on field-programmable logic and applications (FPL)
作者: Mazraeli, Mohammadmahdi Gao, Yu Chow, Paul Univ Toronto Elect & Comp Engn Toronto ON Canada
With the deployment of FPGAs in a data center, there is the opportunity to build large multi-FPGA applications. In this paper, we design a partitioner to address the problem of efficiently assigning the various tasks ... 详细信息
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A Demo of FPGA Aggressive Voltage Downscaling: Power and Reliability Tradeoffs  28
A Demo of FPGA Aggressive Voltage Downscaling: Power and Rel...
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28th international conference on field programmable logic and applications (FPL)
作者: Salami, Behzad Unsal, Osman Cristal, Adrian BSC Barcelona Spain UPC Barcelona Spain
The power consumption of digital circuits, e.g., field programmable Gate Arrays (FPGAs), is directly related to their operating supply voltages. On the other hand, usually, chip vendors introduce a conservative voltag... 详细信息
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POWER EFFICIENT DSP DATAPATH CONFIGURATION METHODOLOGY FOR FPGA
POWER EFFICIENT DSP DATAPATH CONFIGURATION METHODOLOGY FOR F...
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18th international conference on field programmable and logic applications
作者: McKeown, S. Woods, R. McAllister, J. Queens Univ Belfast Programmable Syst Lab Inst Elect Commun & Informat Technol Belfast BT3 9DT Antrim North Ireland
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within peak power budget. A system level, low... 详细信息
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Tutorial: 65 NM FPGas, a look under the hood technology, features, and applications
Tutorial: 65 NM FPGas, a look under the hood technology, fea...
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16th international conference on field programmable logic and applications
作者: Alfke, Peter Xilinx Inc San Jose CA USA
This tutorial describes the Why and How of the new 65-nm families of Virtex-5 FPGAs. It describes several aspects of the technology that affect speed, density, and power consumption. The basic device structure and pac... 详细信息
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Predictive load balancing for interconnected FPGAS
Predictive load balancing for interconnected FPGAS
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16th international conference on field programmable logic and applications
作者: Bakos, Jason D. Cathey, Charles L. Michalski, E. Allen Univ South Carolina Dept Comp Sci & Engn Columbia SC 29208 USA
A field programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism over the alternative approach of soft... 详细信息
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Broken-Karatsuba multiplication and its application to Montgomery modular multiplication  27
Broken-Karatsuba multiplication and its application to Montg...
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27th international conference on field programmable logic and applications (FPL)
作者: Ding, Jinnan Li, Shuguo Tsinghua Univ Natl Lab Informat Sci & Technol Inst Microelect Beijing Peoples R China
Large number multiplication has always been an essential operation in cryptographic algorithms. In this paper, we propose Broken-Karatsuba multiplication by applying the non-least-positive form to represent large numb... 详细信息
来源: 评论