Recently Transition Metal Dichalcogenide (TMDC) materials have been explored as channel material for enhanced performance of electronic devices. In this study, the variations of electrostatics and transport characteri...
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ISBN:
(纸本)9781728119793
Recently Transition Metal Dichalcogenide (TMDC) materials have been explored as channel material for enhanced performance of electronic devices. In this study, the variations of electrostatics and transport characteristics of a triple material double gate metal-oxide-field effect transistor (MOSFET) with TMDC channel materials have been investigated through numerical simulator. The simulator is designed based on self-consistent solution of 1D Poisson-Schrodinger equation along the direction perpendicular to the channel and transport characteristics are observed employing Non-equilibrium Greens Function (NEGF) formalism. The proposed device structure shows improvement in Drain Induced Barrier Lowering (DIBL). The impacts of different TMDC materials on electrical characteristics like energy sub band profile, current-voltage relationship, ON/OFF current ratio have been investigated. Such study would be beneficial for next generation electronic device applications.
One of the most important topics of today is a packet processing in data centers with respect to the power consumption and efficient utilization of computational resources. The ARM architecture has proved to be an ene...
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ISBN:
(纸本)9782839918442
One of the most important topics of today is a packet processing in data centers with respect to the power consumption and efficient utilization of computational resources. The ARM architecture has proved to be an energy efficient computational system. Together with an integrated FPGA on a single die, it offers potentially a high performance with respect to the power consumption. DPDK - a set of libraries and drivers intended primarily for fast packet processing - is becoming to be a standard approach for packet processing, especially in data centers. In this paper, we exploit the potential of packet processing based on DPDK and FPGA SoC architectures. Especially, we aim at the potential of utilizing the ARM Cortex-A9 and Cortex-A53 CPUs.
In Utility based industries that employ a large mobile workforce, efficient utilization of field engineers is key to optimal service delivery. The utilization of the engineers can be improved by predicting the future ...
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In Utility based industries that employ a large mobile workforce, efficient utilization of field engineers is key to optimal service delivery. The utilization of the engineers can be improved by predicting the future performance of work areas byusing machine learning tools such as Deep Neural Networks (DNNs). The dramatic success of DNNs has led to an explosion of its applications. However, the effectiveness of DNNs can be limited by the inability to explain how the models arrived at their predictions. In this paper, we present a novel Type-2 Fuzzy logic System (FLS) whose inputs are preproccssed by a Stacked Autoencoder Neural Network to add some interpretability to a Deep Neural Network model. The proposed type-2 FLS will contain a small rule set with a small number of antecedents per rule to maximize the model's interpretability. We also present an algorithm which can be used to efficiently train the proposed model. We will compare the proposed model with a Standard Stacked Autoencoder Deep Neural Network, a Multi-Layer Perceptron (MLP) neural network and an Interval Type-2 Fuzzy logic System. The results show that even though the Standard Stacked Autoencoder and MLP Neural Networks have better performance, they do not provide any insight into the reasoning behind the predictions. The Proposed model, on the other hand, provides better result than the standalone type-2 FLS and a comparable performance to the neural networks and provides a little hit of insight into the decision-making process. Without this insight, we cannot he sure why there is a drop in the performance and we need to further analyze the WA before we can take any decision. This leads to quicker decision making and potentially improving the efficiency of the engineers.
An improved architecture for efficiently computing the sum of absolute differences (SAD) on FPGAs is proposed in this work. It is based on a configurable adder/subtractor implementation in which each adder input can b...
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ISBN:
(纸本)9782839918442
An improved architecture for efficiently computing the sum of absolute differences (SAD) on FPGAs is proposed in this work. It is based on a configurable adder/subtractor implementation in which each adder input can be negated at runtime. The negation of both inputs at the same time is explicitly allowed and used to compute the sum of absolute values in a single adder stage. The architecture can be mapped to modern FPGAs from Xilinx and Altera. An analytic complexity model as well as synthesis experiments yield an average look-up table (LUT) reduction of 17.4% for an input word size of 8 bit compared to state-of-the-art. As the SAD computation is a resource demanding part in image processing applications, the proposed circuit can be used to replace the SAD core of many applications to enhance their efficiency.
In this paper, we describe a Selectable Grained Reconfigurable Architecture (SGRA) in which each Configurable logic Block can be configured to operate in either fine-grained or coarse-grained mode. Compared with the M...
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ISBN:
(纸本)9781538640340
In this paper, we describe a Selectable Grained Reconfigurable Architecture (SGRA) in which each Configurable logic Block can be configured to operate in either fine-grained or coarse-grained mode. Compared with the Mixed Grained Reconfigurable Architecture (MGRA), which has a fixed ratio of fine- and coarse-grained operation blocks and a heterogeneous floorplan, SGRA offers greater flexibility in the mapping and placement of functional units, thus reducing wasted wiring and improving the critical path delay. We also present an automated design flow for SGRA that is developed by customizing the Verilog-to-Routing (VTR) platform. Experimental results demonstrate that SGRA achieves, on average, a 13% reduction in circuit area over MGRA.
A Virtual Private Network (VPN) encrypts and decrypts the private traffic it tunnels over a public network. Maximizing the available bandwidth is an important requirement for network applications, but the cryptographi...
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ISBN:
(纸本)9782839918442
A Virtual Private Network (VPN) encrypts and decrypts the private traffic it tunnels over a public network. Maximizing the available bandwidth is an important requirement for network applications, but the cryptographic operations add significant computational load to VPN applications, limiting the network throughput. This work presents a coprocessor designed to offer hardware acceleration for these encryption and decryption operations. The open-source SigmaVPN application is used as the base solution, and a coprocessor is designed for the parts of Networking and Cryptography library (NaCl) which underlies the cryptographic operation of SigmaVPN. The hardware-software codesign of this work is implemented on a Xilinx Zynq-7000 SoC, showing a 93% reduction in the execution time of encrypting a 1024-byte frame, and this improved the TCP and UDP communication bandwidths by a factor of 4.36 and 5.36 respectively compared to pure software solution for a 1024-byte frame.
Internet of things (IoT) is a massively growing industry in todays times. In fact, more and more devices able to interact together have been recently designed and launched in the market. All the objects that we use in...
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ISBN:
(纸本)9781728116389;9781728116372
Internet of things (IoT) is a massively growing industry in todays times. In fact, more and more devices able to interact together have been recently designed and launched in the market. All the objects that we use in our daily lives are becoming smarter. Everybody agrees that the education has been dramatically changed by the internet over the past few years. Therefore, learning Internet of Things technologies is becoming unavoidable in education. It makes possible for the learners to gain knowledge from anywhere at any time. It allows students and teachers to stay connected with different means, checking messages and upcoming events. IoT can be considered as a new method for managing the teaching environment with advanced tools and establish a rapid communication between the students and teachers in the classroom. Most educators agree that it plays a crucial role in changing the educational landscape. While teachers and instructors away from the classroom, still interact with their students and even replying to posts. In this paper, we propose a practical approach allowing to progressively learn, by practice the essential concepts of Internet of Things applied to Smart Cities. From basic knowledge of python language and the use of microcontrollers Pycom such as LoPy, students can develop skills and also smart applications in the field of Internet of Things. We are interested, throughout this manuscript, to teach it to the scientific community and provide experiments on how to build architectures wherein at each layer lies a plethora of devices and services communicating to make an integrated solution. This can be a good start in the right direction and move further up the aisle to open up a new research area.
The quality of TRNG designs mainly depends on the grade of the noise source from which the entropy will be harvested to extract randomness. Especially for purely digital noise sources suitable for FPGA implementations...
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ISBN:
(纸本)9788026106425
The quality of TRNG designs mainly depends on the grade of the noise source from which the entropy will be harvested to extract randomness. Especially for purely digital noise sources suitable for FPGA implementations the use of Ring Oscillators is suggested in many scientific publications. Standard Ring Oscillator based noise sources however have earned some criticism regarding the amount of entropy generated. On this account different enhancements have been proposed, with Fibonacci Ring Oscillators (FIROs) and Galois Ring Oscillators (GAROs) being prominent examples, which under some circumstances are able to sustain a chaotic oscillation suitable for entropy extraction. This paper deals with the assessment of fully constrained FIRO and GARO noise source designs for a specific target FPGA. Due to the restrictive placement of ring elements the assessment yielded new criteria for choosing proper FIRO/GARO feedback configurations and an enhanced sampling method for entropy extraction has been derived.
A nonvolatile field-programmable gate array (NVF-PGA), where both magnetic tunnel junction (MTJ) devices and greedy power-saving techniques are utilized, is proposed. Because the circuit components are shared among se...
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ISBN:
(纸本)9782839918442
A nonvolatile field-programmable gate array (NVF-PGA), where both magnetic tunnel junction (MTJ) devices and greedy power-saving techniques are utilized, is proposed. Because the circuit components are shared among several MTJ devices by the use of logic-in-memory (LIM) structure, the number of leakage current paths is reduced, which results in leakage power reduction during power-on. Moreover, the use of the self-termination scheme, which automatically turns off the write current immediately after the desired data is written, makes it possible to minimize power consumption during the backup operation. In fact, the proposed NVFPGA exhibits a 90 % power reduction in comparison with that of a conventional SRAM-based FPGA under typical benchmark-circuit implementations.
In 1995, I presented a materials design concept for transparent amorphous oxide semiconductors with a large electron mobility (TAOS) at the 16'h internationalconference on amorphous semiconductors along with conc...
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ISBN:
(纸本)9781509063284
In 1995, I presented a materials design concept for transparent amorphous oxide semiconductors with a large electron mobility (TAOS) at the 16'hinternationalconference on amorphous semiconductors along with concrete example materials of TAOS and the paper was published in 1996 [1[. The basic concept of TAOS is that large electron mobility should be retained even in amorphous materials if the conduction band minimum is mainly composed of spatially large spread of metal ns-orbitals.1 The validity of this design concept was demonstrated by analysis of electronic structure using photoemission experiments combined with calculations based on X-ray structural analysis[2].
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