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检索条件"任意字段=International Conference on Field Programmable Logic and Applications"

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Design and Characterization of a Novel High-Compliance Spring for Robots with Soft Joints

Design and Characterization of a Novel High-Compliance Sprin...

引用

IEEE international conference on Advanced Intelligent Mechatronics (AIM)

作者： Negrello, F. Catalano, M. G. Garabini, M. Poggiani, M. Caldwell, D. G. Tsagarakis, N. G. Bicchi, A. Ist Italiano Tecnol Dept Adv Robot Via Morego 30 I-16163 Genoa Italy Univ Pisa Res Ctr Enrico Piaggio Lucio Lazzarino 1 I-56126 Pisa Italy

ISBN: (纸本)9781509060009

Low stiffness elements have a number of applications in Soft Robotics, from Series Elastic Actuators (SEA) to torque sensors for compliant systems. In its general formulation, the design problem of elastic components is complex and depends on several variables: material properties, load range, shape factor and size constraints. Consequently, most of the spring designs presented in literature are based on heuristics or are optimized for specific working conditions. This work presents the design study and characterization of a scalable spoked elastic element with hinge tip constraints. We compared the proposed design with three existing spring principles, showing that the spoked solution is the convenient option for low-stiffness and low shape factor elastic elements. Therefore, a design analysis on the main scaling parameters of the spoked spring, namely number of spokes and type of constraints, is presented. Finally, an experimental characterization has been conducted on physical prototypes. The agreement among simulations and experimental results demonstrates the effectiveness of the proposed concept.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Transport Properties of Nanostructured Graphene 17

Transport Properties of Nanostructured Graphene

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17th international conference on Numerical Simulation of Optoelectronic Devices NUSOD

作者： Jauho, Antti-Pekka Tech Univ Denmark DTU Nanotech CNG DK-2820 Lyngby Denmark

ISBN: (纸本)9781509053230

Despite of its many wonderful properties, pristine graphene has one major drawback: it does not have a band gap, which complicates its applications in electronic devices. Many routes have been suggested to overcome this difficulty, such as cutting graphene into nanoribbons, using chemical methods, or making regular nanoperforations, also known antidot lattices. Theoretically, all these ideas lead to a reasonable band gap, but realizing them in the lab is very difficult because all fabrication steps induce disorder or other nonidealities, with potentially disasterous consequences for the intended device operation. In this talk I elaborate these ideas and review the state-of-the-art both from the theoretical and the experimental points of view. I also introduce two new ideas: (1) triangular antidots, and (2) nanobubbles formed in graphene. Both of these nanostructuring methods are predicted to yield novel transport signatures, which could form the basis of new types of devices. Our simulations show that it may be possible to generate very high quality spin- and/or valley polarized currents with these structures - something that has not yet been achieved in the lab. Importantly, our simulations involve millions of atoms which is necessary in order to address structures feasible in the lab.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Learning Data-Efficient Hierarchical Features for Robotic Graspable Object Recognition

Learning Data-Efficient Hierarchical Features for Robotic Gr...

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IEEE international conference on Advanced Intelligent Mechatronics (AIM)

作者： Wang, Zhichao Wang, Bin Guo, Chuangqiang Li, Zhiqi Liu, Yang Liu, Hong Harbin Inst Technol State Key Lab Robot & Syst Harbin Heilongjiang Peoples R China

ISBN: (纸本)9781509060009

Robotic graspable object recognition is a crucial ingredient in many exciting autonomous manipulation applications. However, identifying complex image features from limited data remains largely unsolved. In this paper, we leverage the advantages of two kinds of feature representation approaches, kernel descriptors and deep neural networks, to present a novel hierarchical feature learning framework for robotic graspable object recognition. This work enables the recovery of sparse and compressible features from limited data examples. Firstly, we design multiple kernel descriptors from the raw RGB-D images to adequately capture the discriminative structure of the object. Then, the extracted abstract representations are transferred to a four-layer deep neural network to generate more representative features for final graspable discrimination. Our network obtains impressive generalization capability with limited training data. Extensive experiments are carried out to validate the proposed method and the results show the state-of- the-art performance in discriminating graspable object task under limited-data.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements 28

reMinMin: A Novel Static Energy-Centric List Scheduling Appr...

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28th IEEE international conference on Application-specific Systems, Architectures and Processors (ASAP)

作者： Loesch, Achim Platzner, Marco Paderborn Univ Paderborn Germany

ISBN: (纸本)9781509048250

Heterogeneous compute nodes in form of CPUs with attached GPU and FPGA accelerators have strongly gained interested in the last years. applications differ in their execution characteristics and can therefore benefit from such heterogeneous resources in terms of performance or energy consumption. While performance optimization has been the only goal for a long time, nowadays research is more and more focusing on techniques to minimize energy consumption due to rising electricity costs. This paper presents reMinMin, a novel static list scheduling approach for optimizing the total energy consumption for a set of tasks executed on a heterogeneous compute node. reMinMin bases on a new energy model that differentiates between static and dynamic energy components and covers effects of accelerator tasks on the host CPU. The required energy values are retrieved by measurements on the real computing system. In order to evaluate reMinMin, we compare it with two reference implementations on three task sets with different degrees of heterogeneity. In our experiments, MinMin is consistently better than a scheduler optimizing for dynamic energy only, which requires up to 19.43% more energy, and very close to optimal schedules.

关键词： field programmable gate arrays Energy consumption Energy measurement Computational modeling Graphics processing units Processor scheduling Power demand

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Development of a Series Wrapping Cam Mechanism for Energy Transfer in Wearable Arm Support applications

Development of a Series Wrapping Cam Mechanism for Energy Tr...

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international conference on Rehabilitation Robotics (ICORR)

作者： Schroeder, Jeremiah S. Perry, Joel C. Univ Idaho Dept Mech Engn Moscow ID 83844 USA

ISBN: (纸本)9781538622964

An estimated 17 million individuals suffer a stroke each year with over 5 million resulting in permanent disability. For many of these, the provision of gravity support to the impaired upper limb can provide significant and immediate improvement in arm mobility. This added mobility has the potential to improve arm function and user independence overall, but, so far, wearable arm supports have found only limited uptake by end-users. The reasons are unclear, but it is hypothesized that device uptake is strongly affected by aspects of arm support implementation such as added weight and volume and the effectiveness of the support provided. In the interest of reducing the size and visibility of wearable arm supports, cable driven actuation was investigated, and a device called the series wrapping cam was developed. This device uses two wrapping cams to stretch a spring as the user's arm elevation decreases. It optimally uses the range of motion of a custom latex spring in a compact mechanism. A one degree-of-freedom proof-of-concept prototype of the series wrapping cam was manufactured and tested. The torque supplied by the prototype correctly responds to shoulder elevation to balance the weight of the extended arm at any level of elevation. However, the support is unaffected by the degree of elbow flexion-extension. Shoulder joint torque is a function of both shoulder elevation and elbow flexion, suggesting further benefits could be achieved through a bi-articular design.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Work-in-Progress: A High-performance FPGA Accelerator for Sparse Neural Networks

Work-in-Progress: A High-performance FPGA Accelerator for Sp...

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international conference on Compilers Architectures and Synthesis For Embedded Systems (CASES)

作者： Lu, Yuntao Gong, Lei Xu, Chongchong Sun, Fan Zhang, Yiwei Wang, Chao Zhou, Xuehai Univ Sci & Technol China Sch Comp Sci & Technol Hefei Anhui Peoples R China

ISBN: (纸本)9781450351843

Neural networks have been widely used in a large range of domains, researchers tune numbers of layrs, neurons and synapses to adapt various applications. As a consequence, computations and memory of neural networks models are both intensive. As large requirements of memory and computing resources, it is difficult to deploy neural networks on resource-limited platforms. Sparse neural networks, which prune redundant neurons and synapses, alleviate computation and memory pressure. However, conventional accelerators cannot benefit from the sparse feature. In this paper, we propose a high-performance FPGA accelerator for sparse neural networks which utilizes eliminate computations and storage space. This work compresses sparse weights and processes compressed data directly. Experimental results demonstrate that our accelerator will reduce 50% and 10% storage of convolutional and full-connected layers, and achieve 3x speedup of performance over an optimized conventional FPGA accelerator.

关键词： field programmable gate arrays Biological neural networks Indexes Neurons

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A High-Performance Accelerator for Large-Scale Convolutional Neural Networks 15

A High-Performance Accelerator for Large-Scale Convolutional...

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15th IEEE international Symposium on Parallel and Distributed Processing with applications (ISPA) / 16th IEEE international conference on Ubiquitous Computing and Communications (IUCC)

作者： Sun, Fan Wang, Chao Gong, Lei Xu, Chongchong Zhang, Yiwei Lu, Yuntao Li, Xi Zhou, Xuehai USTC Dept Comp Sci & Technol Hefei 230027 Anhui Peoples R China

ISBN: (纸本)9781538637906

Convolutional neural networks(CNNs) have been widely applied in various applications because of their ability to achieve accuracy close to or even better than human level perception. However, for large-scale CNN, the computation-intensive convolutional layers and memory-intensive fully connected layers have brought many challenges to the implementation of CNN on FPGA platform. In the existing implementations, the same parallelism strategy is used for the entire CNN model, such a "one size fits all" approach may result in resource utilization problem. To overcome this problem, this work proposes an FPGA-based accelerator, which consists of multiple processing elements(PEs), each is responsible for the computation of one layer in the network model. All the PEs are mapped on one chip so that different layers can work concurrently in a pipelined style. A methodology is proposed to maximize the throughput of the accelerator. In the fully connected layers, a pruning method is used to decrease the number of weights, which can save a lot of storage and computation. Moreover, a batch-based computing method is applied to the compressed data in order to reduce the required memory bandwidth. As a case study, we implement a large-scale CNN model, AlexNet, on VC707 Board which has a Xilinx FPGA chip Virtex-7 485T. The proposed accelerator can achieve a peak performance of 498.6 GOP/s and the power efficiency with the value of 21.3 GOP/s/W under 100MHz clock frequency, which outperforms previous approaches.

关键词： Hardware Feature extraction Computational modeling Parallel processing Resource management Mathematical model field programmable gate arrays

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FPGA-Based Accelerator Design from a Domain-Specific Language 26

FPGA-Based Accelerator Design from a Domain-Specific Languag...

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26th international conference on field-programmable logic and applications (FPL)

作者： Oezkan, M. Akif Reiche, Oliver Hannig, Frank Teich, Juergen Friedrich Alexander Univ Erlangen Nurnberg FAU Nurnberg Germany

ISBN: (纸本)9782839918442

A large portion of image processing applications often come with stringent requirements regarding performance, energy efficiency, and power. FPGAs have proven to be among the most suitable architectures for algorithms that can be processed in a streaming pipeline. Yet, designing imaging systems for FPGAs remains a very time consuming task. High-Level Synthesis, which has significantly improved due to recent advancements, promises to overcome this obstacle. In particular, Altera OpenCL is a handy solution for employing an FPGA in a heterogeneous system as it covers all device communication. However, to obtain efficient hardware implementations, extreme code modifications, contradicting OpenCL's data-parallel programming paradigm, are necessary. In this work, we explore the programming methodology that yields significantly better hardware implementations for the Altera Offline Compiler. We furthermore designed a compiler back end for a domain-specific source-to-source compiler to leverage the algorithm description to a higher level and generate highly optimized OpenCL code. Moreover, we advanced the compiler to support arbitrary bit width operations, which are fundamental to hardware designs. We evaluate our approach by discussing the resulting implementations throughout an extensive application set and comparing them with example designs, provided by Altera. In addition, as we can derive multiple implementations for completely different target platforms from the same domain-specific language source code, we present a comparison of the achieved implementations in contrast to GPU implementations.

关键词： field programmable gate arrays (FPGA)

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Application of Multi-Scale Quantum Harmonic Oscillator Algorithm for Multifactor Task Allocation Problem in WSANs 13

Application of Multi-Scale Quantum Harmonic Oscillator Algor...

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13th IEEE international conference on Control & Automation (ICCA)

作者： Mu, Lei Qu, Xiaomei Wang, Peng Southwest Univ Nationalities Sch Comp Sci & Technol Chengdu 610041 Sichuan Peoples R China

ISBN: (纸本)9781538626795

Task allocation is an essential part of many applications of WSANs. The key problem of task allocation in these systems such as intelligent minefield is how to obtain the node-target assignment. Mathematical model with task effectiveness as the evaluation index was built on the analysis of multi-node cooperative decision problem. Combing with the target's parameters and node's own status, the influence factors of task effectiveness were analyzed and the task effectiveness function was proposed. Then the value of this function can be utilized as the evaluation index of assignment schemes since it reflected the integrated impact of system by target's threat and node's status more comprehensively. The essence of multi-node cooperative task allocation was how to make node-target assignment to achieve the maximum task effectiveness of the whole system. Because every node can attack only one target, multi-node cooperative attack decision problem turned into assignment problem. An application of Multi-Scale Quantum Harmonic Oscillator Algorithm was implemented to solve the assignment problem for multiple nodes with multiple targets. The results show that the algorithm is suitable for multifactor task allocation problem in WSANs.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Adding Navigation, Artificial Audition and Vital Sign Monitoring Capabilities to a Telepresence Mobile Robot for Remote Home Care applications

Adding Navigation, Artificial Audition and Vital Sign Monito...

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international conference on Rehabilitation Robotics (ICORR)

作者： Laniel, Sebastien Letourneau, Dominic Labbe, Mathieu Grondin, Francois Polgar, Janice Michaud, Francois Univ Sherbrooke Interdisciplinary Inst Technol Innovat 3IT 3000 Univ Blvd Sherbrooke PQ J1K 0A5 Canada Western Univ Sch Occupat Therapy London ON Canada

ISBN: (纸本)9781538622964

A telepresence mobile robot is a remote-controlled, wheeled device with wireless internet connectivity for bidirectional audio, video and data transmission. In health care, a telepresence robot could be used to have a clinician or a caregiver assist seniors in their homes without having to travel to these locations. Many mobile telepresence robotic platforms have recently been introduced on the market, bringing mobility to telecommunication and vital sign monitoring at reasonable costs. What is missing for making them effective remote telepresence systems for home care assistance are capabilities specifically needed to assist the remote operator in controlling the robot and perceiving the environment through the robot's sensors or, in other words, minimizing cognitive load and maximizing situation awareness. This paper describes our approach adding navigation, artificial audition and vital sign monitoring capabilities to a commercially available telepresence mobile robot. This requires the use of a robot control architecture to integrate the autonomous and teleoperation capabilities of the platform.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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