Quantum-dot Cellular Automata (QCA) is a promising as well as an emerging technology for implementing digital systems at the Nano - scale regime. QCA technology has a unique feature, which operates at low power, high ...
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ISBN:
(纸本)9781509023097
Quantum-dot Cellular Automata (QCA) is a promising as well as an emerging technology for implementing digital systems at the Nano - scale regime. QCA technology has a unique feature, which operates at low power, high speed and density. This feature makes QCA as an alternative technology for CMOS. The present work selects the basic components of the Configurable logic Block (CLB) of a Xilinx fieldprogrammable gate array using QCA technology. We have designed and simulated QCA based circuits such as multiplexer, Decoders, 8-Bit LUT. The proposed multiplexer based LUT have been designed and simulated using the QCA Designer software tool. The simulation results obtained from QCA Designer Tool are compared with Cadence CMOS technology. Our proposed CLB design shows an improvement of 24% fewer QCA cells, occupies 62% lesser overall area compared to previous works. The simulation result shows that the proposed QCA technology occupies smaller area and less power consumption.
This work is part of a large project contributing in the design and development of medium field and high resolution Positron Emission Topographic (PET) scanners. The Multi Pixel Photon Counters (MPPCs) are an elementa...
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ISBN:
(纸本)9781538608739
This work is part of a large project contributing in the design and development of medium field and high resolution Positron Emission Topographic (PET) scanners. The Multi Pixel Photon Counters (MPPCs) are an elementary part of each PET scanner. They convert the scintillation energy, originated by the emitted gamma rays from patient's body, into an electrical pulse. These pulses are later on conditioned and processed to locate the cancerous cells in the patient's body. The form of these pulses is very important in making a precise localization of the cancerous cells. However, the acquisition chains of these pulses add specific artifacts in them like offsets, attenuations, etc. Moreover, the Analog to Digital conversion module limits the digital signal temporal resolution. Collectively, these artifacts effect the system precision in terms of measuring the depth of interaction and the time stamp. It renders a reduction in the system sensitivity and resolution. In order to overcome these inadequacies a digital baseline restorer and an interpolation modules are devised. They respectively compensate artifacts of the signal offset and of the signal temporal resolution limitation. These modules are implemented in VHSIC Hardware Description Language (VHDL). The functionality of implemented modules is tested with functional simulations. Results are presented, which assure a proper operation of the developed modules.
To most learners, programming language is not simple. In particular, when a large number of errors occur, teaching progress of courses will be affected, which leads to poor learning effectiveness. This study developed...
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ISBN:
(纸本)9781509041114
To most learners, programming language is not simple. In particular, when a large number of errors occur, teaching progress of courses will be affected, which leads to poor learning effectiveness. This study developed a web-based programming language teaching platform to solve this issue.
This paper presents the mechanical design of a novel 3-PSS (P and S represent the prismatic and spherical joints, respectively) parallel-kinematic flexure nanopositioning stage. This stage provides a high-precision mo...
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ISBN:
(纸本)9781509060009
This paper presents the mechanical design of a novel 3-PSS (P and S represent the prismatic and spherical joints, respectively) parallel-kinematic flexure nanopositioning stage. This stage provides a high-precision motion driven by three piezoelectric actuators. By employing the compound displacement amplifier and 3-PSS parallel mechanism, the flexure nanopositioning stage can deliver two rotational degree-of-freedom (DOF) and one translational DOF. Statics modeling and dynamics analysis of the nanopositioning stage are carried out to evaluate the performance of the stage. To verify the accuracy of the analytical modeling, simulation studies with finite element analysis (FEA) are carried out. Results demonstrate the promising performance of the designed spatial nanopositioning stage for dexterous micromanipulation applications.
This paper studies digital beam forming (DBF) methods based on phased array. First of all, the basic principle of DBF is introduced, and the signal direction is controlled through realizing DBF. Secondly, different be...
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ISBN:
(纸本)9781538657850
This paper studies digital beam forming (DBF) methods based on phased array. First of all, the basic principle of DBF is introduced, and the signal direction is controlled through realizing DBF. Secondly, different beam forming methods and their limitations and applications are analyzed. Through the comparison and analysis of different parameters, it is proper to adopt linear constrained minimum variance beam forming method in practical application. Finally, the beam width and zero depth of different parameter beam forming methods are analyzed by simulation.
Soft processors have a role to play in easing the difficulty of designing applications into FPGAs for two reasons: first, they can be deployed only when needed, unlike permanent on-die hard processors. Second, for the...
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ISBN:
(纸本)9781509023561
Soft processors have a role to play in easing the difficulty of designing applications into FPGAs for two reasons: first, they can be deployed only when needed, unlike permanent on-die hard processors. Second, for the portions of an application that can function sufficiently fast on a soft processor, it is far easier to write and debug single-threaded software code than to create hardware. The breadth of this second role increases when the performance of the soft processor increases, yet there has been little progress in the performance of soft processors since their commercial inception - in particular, the sophisticated out-of-order superscalar approaches that arrived in the mid 1990s are not employed, despite the fact that their area cost is now easily tolerable. In this paper we take an important step towards out-of-order execution in soft processors by exploring instruction scheduling in an FPGA substrate. This differs from the hard-processor design problem because the logic substrate is restricted to LUTs, whereas hard processor scheduling circuits employ CAM and wired-OR structures to great benefit. We discuss both circuit and microarchitectural trade-offs, and compare three circuit structures for the scheduler, including a new structure called a fused-logic matrix scheduler. With this circuit, large schedulers up to 40 entries can be built with the same cycle time as the commercial Nios II/f soft processor (240 MHz). This careful design has the potential to significantly increase both the IPC and raw compute performance of a soft processor, compared to current commercial soft processors.
We present, evaluate and discuss the viability of commercial 3D printer filaments for use in terahertz 3D printing applications. This is achieved in a combined approach, analysing optical and mechanical properties in ...
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We present, evaluate and discuss the viability of commercial 3D printer filaments for use in terahertz 3D printing applications. This is achieved in a combined approach, analysing optical and mechanical properties in conjunction with the filaments' overall printability. We analyse 18 common and exotic filaments including: acrylonitrile butadiene styrene (ABS), polylactic acid (PLA), nylon, polyethylene terephthalate (PET), high impact polystyrene (HIPS), polypropylene (PP), polycarbonate (PC) and polyvinyl alcohol (PVA) with their corresponding coploymer blends and modifications. Optically, samples are characterized in the 0.1-1 THz frequency range via time domain spectroscopy. Prints were produced on a Makerbot Replicator 2X experimental 3D printer. Interestingly, optical properties are shown to remain consistent despite mechanical modifications made to the filament.
Neural network has been widely used for various applications. While most of previous approaches tried to use large neural networks such as convolutional neural network (CNN) and deep neural network (DNN), these heavy ...
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Neural network has been widely used for various applications. While most of previous approaches tried to use large neural networks such as convolutional neural network (CNN) and deep neural network (DNN), these heavy models are hardly adapted to IoT(internet of things) platforms due to their limited resources. This work proposes a compact neural network accelerator for IoT devices. Our design shows 11.95 GOP/s total throughput and 413.99mW power consumption with 98.04% accuracy.
作者：
Chen YongjunRuan BoYangtze Univ
Hubei Cooperat Innovat Ctr Unconvent Oil & Gas Wuhan 430100 Hubei Peoples R China Yangtze Univ
Coll Elect & Informat Jingzhou 434023 Hubei Peoples R China
This article proposed a novel fracture control system for shale gas fracturing truck used in the construction, blender, equipment vehicles connected by a PLC control network, each equipment is contacted with automatic...
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ISBN:
(纸本)9781467386449
This article proposed a novel fracture control system for shale gas fracturing truck used in the construction, blender, equipment vehicles connected by a PLC control network, each equipment is contacted with automatic remote control unit, the pressure to achieve through the network and treatment plant centralized control cracking operations, network control system uses ring industrial Ethernet connection. Each field blender, fracturing truck station data, parameters can be transmitted through the network in order to achieve data sharing and downloading function parameters pass each other. Meanwhile, An adaptive displacement control with hysteresis modeling for a fracturing truck is proposed in this paper, the ladder program has been used in the AB-PLC for displacement control, the result of experiment also show that the control system have improved the fracturing construction effect.
Due to the rise in the number of vehicles in the past few years, the frequency of traffic accident has increased as well, resulting in huge losses. As a means to improve traffic safety, advanced driver assistance syst...
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Due to the rise in the number of vehicles in the past few years, the frequency of traffic accident has increased as well, resulting in huge losses. As a means to improve traffic safety, advanced driver assistance system (ADAS) has gradually gained more attention. However, it is difficult for traditional traffic sign recognition algorithms to achieve high accuracy in the ADAS whose scenarios are various in the practical application. And most current methods based on convolution neural network (CNN) for traffic sign recognition has large amount of parameters, making its implementation on resource-limited hardware platform challenging. In this work, we present a FPGA-based convolution neural network module for the recognition of traffic signs in ADAS. Experimental results shows that the accuracy rate of the model is 98.1%, the total number of parameters is 4.7M, only accounting for 12.5% of AlexNet, and the number of calculation in single forward transmission is 703.2M, which takes up 61.4% of AlexNet.
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