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检索条件"任意字段=International Conference on Field Programmable Logic and Applications"

共 16769 条记录，以下是511-520 订阅

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High Availability for virtualized programmable logic Controllers with Hard Real-Time Requirements on Cloud Infrastructures

High Availability for virtualized Programmable Logic Control...

引用

IEEE international conference on Industrial Informatics (INDIN)

作者： Thomas Kampa Amer El-Ankah Daniel Grossmann AImotion Bavaria Technische Hochschule Ingolstadt AUDI AG Ingolstadt Germany ABM Digital UG Frankfurt Germany AImotion Bavaria Technische Hochschule Ingolstadt Ingolstadt Germany

Cloud computing is becoming more popular in domains where previously hardware-based bare metal implementations dominated the field of computation workloads such as the automation and process industry. A variety of stateful applications exist that will require high availability on cloud infrastructures while also meeting the hard real-time requirements in the millisecond area of their superimposed processes, e.g., virtualized programmable logic controllers (vPLCs) and artificial intelligence inference services. This paper presents an approach for stateful applications on distributed systems to meet the application’s requirements in failover scenarios through state synchronization by means of Remote Direct Memory Access (RDMA). Experimental results with a software PLC confirm the effectiveness of the described approach in comparison to UDP-based synchronization, reducing the average synchronization time by up to 99.39%. The concept is suitable for applications on virtual machines and containers and might be an enabler for virtualization of real-time critical applications such as control functions in the automation and process industry.

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Two-Axis Gimbal Motor Based on FPGA Control

Two-Axis Gimbal Motor Based on FPGA Control

引用

international conference on Fuzzy Systems and Knowledge Discovery (FSKD)

作者： Shengsheng Zhang Jiye Jiao School of Electronic Engineering Xi'an University of Posts and Telecommunications Xi'an China

ISBN: (数字)9798350356328

ISBN: (纸本)9798350356335

Two-axis gimbal is widely used in various industries, through the control of the motor in the gimbal to achieve the gimbal's attitude changes, the motor control directly affects the stability of the gimbal, accuracy and flexibility. However, most of the existing two-axis gimbal motor control Microcontroller Unit (MCU) as the main control, MCU needs to deal with complex algorithms and the face of the sensor data interaction, the system latency is large, the real-time response time of the gimbal becomes slower. To address these issues, this paper proposes a two-axis gimbal motor control on field programmable Gate Array (FPGA), first of all, the overall control framework design, and then sub-module design and verify the correctness of the logic, and finally tested on the FPGA development board. The experimental results show that the gimbal motor has good control performance and fast response time.

关键词： Industries Motor drives Microcontrollers programmable logic arrays logic gates Motors Knowledge discovery Real-time systems Time factors field programmable gate arrays

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Customizable and programmable Deep Learning 27th

Customizable and Programmable Deep Learning

引用

27th international conference on Pattern Recognition, ICPR 2024

作者： Pal, Ratnabali Kar, Samarjit Sekh, Arif Ahmed National Institute of Technology Durgapur WB Durgapur India Brainware University WB Kolkata India Department of Graphical Systems Vilnius Gediminas Technical University Vilnius Lithuania XIM University Odisha Bhubaneswar India UiT The Arctic University of Norway Tromssa Norway

ISBN: (纸本)9783031781063

In this study, we explore the potential of pre-trained deep learning models, proposing a new approach that emphasizes their reusability and adaptability. Our framework, termed "customizable" deep learning, facilities users to seamlessly integrate diverse pre-trained models for addressing new tasks and enhancing existing solutions. Furthermore, we introduce a "programmable" adapter that enables the flexible combination of different pre-trained modules, expanding the range of applications and customization options. Through empirical experiments, particularly focusing on Visual Question Answering (VQA) for visually impaired (VI) individuals, we demonstrate the practical effectiveness of our methodology. These contributions advance the deep learning field while promoting customization and re-usability across various domains and tasks. The code is available https://***/Ratnabali-Pal/CPDA-VQA. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Federated learning

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FPL Demo: Runtime Stream Processing with Resource-Elastic Pipelines on FPGAs

FPL Demo: Runtime Stream Processing with Resource-Elastic Pi...

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international conference on field programmable logic and applications

作者： Kaspar Mätas Kristiyan Manev Joseph Powell Dirk Koch The University of Manchester UK Heidelberg University DE

FPGAs are efficient at dataflow applications, as demonstrated in various application domains, including machine learning, communication, and image processing. In this demo, we accelerate database management operations transparently to the user by stitching together partially reconfigurable stream processing modules that implement database operators. Our runtime system orchestrates this, which builds custom pipelines according to runtime conditions. This demo will showcase an acceleration of SQL queries using our dynamic stream processing system running on a ZCU102 FPGA board.

关键词： Runtime Databases Image processing Pipelines Machine learning Streaming media field programmable gate arrays

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FPGA Implementation of Modified Compressor for Signal Processing applications

FPGA Implementation of Modified Compressor for Signal Proces...

引用

2023 IEEE international conference on Next Generation Electronics, NEleX 2023

作者： Harikrishna, K. Tripathy, S.K. National Institute of Technology Department of Electronics and Communication Assam Silchar788010 India

ISBN: (纸本)9798350319088

Multiplication plays the key role in digital signal processing, digital image processing, mobile computing, very large-scale integration (VLSI), embedded systems and several other fields. To obtain better, accurate and fast output in today's technology world we need efficient processors. To accomplish this task, we have designed a novel multiplier using (7,3) and (15,4) compressor. The high compression ratio compressors are used in the multiplication process to add the partial products results in better performance. Further, proposed method performance parameters are compared with all existing literature and found that our design is better than the existing researches. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

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Efficient Co-Approximate Parallel Compressive Depth Reconstruction on FPGA

Efficient Co-Approximate Parallel Compressive Depth Reconstr...

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2025 IEEE international conference on Acoustics, Speech, and Signal Processing, ICASSP 2025

作者： Wu, Yun McAllister, John School of Electrical Electronic and Computer Engineering Queen's University Belfast United Kingdom

ISBN: (纸本)9798350368741

Efficient depth image reconstruction from sparse samples is crucial for machine perception applications, such as robotics, vehicle assistance and autonomy. It demands fast processing speed with low power consumption for sensing quality and safety, as well as cost reduction for FPGA and solid state implementations, within constrained resource budgets on edge devices. A new co-approximate framework of parallel approximate compressive depth reconstruction engine on FPGA is proposed using 1 solvers, proximal gradient decent (PGD), with instrumented frequency and voltage scaling during the iterative optimization process. By evaluating various number of parallel approximate processing units for the depth image reconstruction engine, up to 51% further power saving is achieved, and 421× speed up of parallel processing compared to the baseline, henceforth the efficiency is elevated over 43×. © 2025 IEEE.

关键词： Approximate Computing Compressive Sensing Convex Optimization Depth Reconstruction field-programmable Gate Array

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FPGA Technologies for Smart and Sustainable Agriculture: A Comprehensive Overview 12

FPGA Technologies for Smart and Sustainable Agriculture: A C...

引用

12th Mediterranean conference on Embedded Computing, MECO 2023

作者： Muharemovic, Asja Jokic, Dejan Simeunovic, Marko Hanjalic, Haris International Burch University Sarajevo Bosnia and Herzegovina University of Donja Gorica Podgorica Montenegro

ISBN: (纸本)9798350322910

This paper provides a comprehensive overview of the latest field programmable Gate Array (FPGA) technologies that are being used to enhance smart and sustainable agriculture practices. The review was conducted using the PRISMA (Preferred Reporting Items for Systematic Reviews and Meta-Analyses) instructions as a report standard and different inclusion and exclusion criteria were utilized. To ensure data accuracy, reduce bias, and manage references, the Zotero tool was used. The agriculture industry is facing numerous challenges, such as water scarcity, soil degradation, and climate change, which can be mitigated through the integration of modern technologies. FPGAs have emerged as a promising solution in agriculture due to their high performance, flexibility, and low power consumption. In this paper, we discuss various FPGA-based solutions that are being developed to address key agricultural challenges, including precision farming, crop monitoring, livestock management, and environmental sensing. Authors also review FPGA architectures and programming tools that are specifically designed for agricultural applications. The use of FPGA-based systems in precision agriculture has resulted in numerous benefits, including reducing energy consumption, water usage, and temperature while expanding the range of applications. Additionally, the combination of IoT and FPGA is proving to be a promising solution for livestock management, and FPGA technology has also shown promise in energy efficiency and plant disease diagnosis. Overall, FPGA technology has proven to be a valuable tool in various aspects of agriculture, with its use expected to increase in the future. © 2023 IEEE.

关键词： field programmable gate arrays (FPGA)

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Simplification of numeric variables for PLC model checking 21

Simplification of numeric variables for PLC model checking

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19th ACM-IEEE international conference on Formal Methods and Models for System Design (MEMOCODE)

作者： Lopez-Miguel, Ignacio D. Adiego, Borja Fernandez Tournier, Jean-Charles Vinuela, Enrique Blanco Rodriguez-Aguilar, Juan A. European Org Nucl Res CERN Beams Dept Geneva Switzerland CSIC Artificial Intelligence Res Inst IIIA Bellaterra Spain

ISBN: (纸本)9781450391276

Software model checking has recently started to be applied in the verification of programmable logic controller (PLC) programs. It works efficiently when the number of input variables is limited, their interaction is small and, thus, the number of states the program can reach is not large. As observed in the large code base of the CERN industrial PLC applications, this is usually not the case: it thus leads to the well-known state-space explosion problem, making it impossible to perform model checking. One of the main reasons that causes state-space explosion is the inclusion of numeric variables due to the wide range of values they can take. In this paper, we propose an approach to discretize PLC input numeric variables (modelled as non-deterministic). This discretization is complemented with a set of transformations on the control-flow automaton that models the PLC program so that no extra behaviours are added. This approach is then quantitatively evaluated with a set of empirical tests using the PLC model checking framework PLCverif and three different state-of-the-art model checkers (CBMC, nuXmv, and Theta), showing beneficial results for BDD-based model checkers.

关键词： programmable logic controller (PLC) model checking verification predicate abstraction control-flow automaton (CFA)

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AMA: An Analytical Approach to Maximizing the Efficiency of Deep Learning on Versal AI Engine

AMA: An Analytical Approach to Maximizing the Efficiency of ...

引用

international conference on field programmable logic and applications

作者： Xiaodong Deng Shijie Wang Tianyi Gao Jing Liu Longjun Liu Nanning Zheng National Key Laboratory of HumanMachine Hybrid Augmented Intelligence National Engineering Research Center for Visual Information and Applications and Institute of Artificial Intelligence and Robotics Xi’an Jiaotong University

ISBN: (数字)9798331530075

ISBN: (纸本)9798331530082

The traditional cache-based multi-core architecture represented by CUDA has been plagued by the “memory wall” problem, and a large number of applications represented by large language model inference are unable to meet the high computational intensity requirements. The Versal AI Engine architecture provides a variety of rich inter-core connections in the processor array, increasing many data reuse opportunities and potentially alleviating the “memory wall” issue. However, traditional parallel programming models cannot be directly applied to this architecture, and how to map computations to achieve high computational utilization becomes a new challenge. To address this, we propose AMA, a hierarchical performance analysis model built on the Versal AI Engine architecture, designed to maximize the efficiency of typical deep learning applications. Experiments show that AMA modeling is accurate and efficient. On the VCK190 platform, we achieved a matrix multiplication throughput of 5867.29 GFLOPS in fp32 and 88.55 TOPS in int8, and a convolution throughput of 99.6770 TOPS. In terms of energy efficiency, AMA achieved 142.68 GFLOPS/W in fp32 precision and 1.416 TOPS/W in int8 matrix multiplication. Compared to the current state-of-the-art methods, we achieved a $\mathbf{1 4. 9 9 \%}$ increase in throughput and a 22.92% increase in energy efficiency, providing new analytical performance model and practical guidance for efficient deep learning deployment on AI Engine.

关键词： Deep learning Analytical models Convolution Computational modeling Computer architecture Throughput Energy efficiency Performance analysis Computational efficiency Engines

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FPL Demo: SERVE: Agile Hardware Development Platform with Cloud IDE and Cloud FPGAs

FPL Demo: SERVE: Agile Hardware Development Platform with Cl...

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international conference on field programmable logic and applications

作者： Zelin Wang Ke Zhang Yisong Chang Yanlong Yin Yuxiao Chen Ran Zhao Songyue Wang Mingyu Chen Yungang Bao State Key Laboratory of Processor ICT CAS Beijing China University of Chinese Academy of Sciences Beijing China

We introduce SERVE, a cloud platform for agile hardware software co-design, with cloud IDE and cloud FPGAs integrated. SERVE enables users to focus on logic designs, without facing the hassle of setting up FPGA tools and development environment. Users can write and simulate hardware logic in the cloud IDE and then generate bitstream files through a Continuous Integration (CI) pipeline. Finally, the bitstream files are deployed on an FPGA board. A great amount of testbenches will be executed to ensure the correctness of the hardware logic. We will demo a workflow of modifying a RISC- V processor and getting the design change quickly evaluated using SERVE.

关键词： Pipelines Hardware Software logic design field programmable gate arrays

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