The introduction of machine learning algorithms has revolutionized the design of invisible devices,particularly in the intricate domain of *** this study,we proposed a core-shell configuration to realize elastic spher...
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The introduction of machine learning algorithms has revolutionized the design of invisible devices,particularly in the intricate domain of *** this study,we proposed a core-shell configuration to realize elastic sphere cloaks driven by a Bayesian optimization algorithm to pinpoint the optimal configuration with high *** simulations in solid and aqueous environments were performed to validate the cloaking efficacy of our design and the parameters identified by the *** results closely agreed with the theoretical predictions,underscoring the robustness of the proposed *** approach provides new insights into the design of elastic wave invisibility devices and has potential applications in underwater communication and sonar detection.
The proceedings contain 298 papers. The topics discussed include: sharp-switching devices with positive feedback mechanisms based on silicon-on-insulator substrate;impact of nanosheet pitch, ambient temperature, and t...
ISBN:
(纸本)9781665469067
The proceedings contain 298 papers. The topics discussed include: sharp-switching devices with positive feedback mechanisms based on silicon-on-insulator substrate;impact of nanosheet pitch, ambient temperature, and thermal contact resistance on electrothermal characteristics of vertical gate-all-around nanosheet FETs;bias temperature instability analysis of nanosheet based SRAM;parallel dual-gate thin-film transistors for sensing and neuromorphic computing;a micro transfer-printer for high-accuracy optoelectronic and photonic integration;silicon nanowire transistor integrated with phase change gate;a new type of homogenization field power semiconductor devices;ultralow loss lateral insulated gate bipolar transistor with U-shape trench anode;a novel approach to suppress the inhomogeneous reverse recovery behavior of the body diode in superjunction MOSFET;a novel full tun-on reverse-conducting IGBT with enhanced carrier concentration modulation in collector side;and a novel insulating-pillar superjunction with vertical insulators: breakthrough of specific ON-resistance limit.
The impact of self-heating effect on hot carrier injection (HCI) for n-type lateral double-diffused MOS (LDMOS) devices has been systematically investigated. It is found that the HCI-induced threshold voltage shift ca...
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ISBN:
(纸本)9798331517137;9798331517144
The impact of self-heating effect on hot carrier injection (HCI) for n-type lateral double-diffused MOS (LDMOS) devices has been systematically investigated. It is found that the HCI-induced threshold voltage shift can be suppressed by introducing sufficient self-heating with large drain voltage (Vds). This phenomenon, not observed in logic MOSFETs, can be attributed to the reduced generation of electron-hole pairs resulting from weakened avalanche multiplication in the drift region of LDMOS when operating under high power conditions. This finding underscores the importance of heat management in improving the HCI reliability of LDMOS devices.
In this paper, an RF energy harvester with a wide input power range and low reverse leakage current is proposed with two versions of an off-chip matching network and an on-chip matching network, a wide dynamic range o...
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ISBN:
(纸本)9798331517137;9798331517144
In this paper, an RF energy harvester with a wide input power range and low reverse leakage current is proposed with two versions of an off-chip matching network and an on-chip matching network, a wide dynamic range of 31.24 dB is achieved by incorporating the complementary diode structure in the final stage of the rectifier. Additionally, a voltage limiter is designed to provide a highly accurate 3.3 V limiting voltage and a reverse leakage current of 1.368 mu A. Simulation results demonstrate that the off-chip matched version achieves a high power harvesting efficiency (PHE) of 57.75% and a wide input power range of 16.82 dB. The on-chip matched version exhibits a high PHE of 32.02% and a wide input power range of 11.48 dB, with a reverse leakage current of 1.398 mu A for both versions.
Substrate coupling at gigahertz frequencies is investigated in silicon-on-insulator (SOI) technology with the consideration of radio-frequency (RF) integratedcircuit (IC) design and manufacturing. By computational el...
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ISBN:
(纸本)9798331517137;9798331517144
Substrate coupling at gigahertz frequencies is investigated in silicon-on-insulator (SOI) technology with the consideration of radio-frequency (RF) integratedcircuit (IC) design and manufacturing. By computational electromagnetic (EM) studies based on the finite element method (FEM) to solve EM fields, S-parameter results are obtained to find out the substrate coupling for different thickness of the buried oxide (BOX) and resistive silicon (Si) handle layer. With a 100-nm BOX layer, |S-21| maintains at a low level of -65 dB or below for < 3 GHz signals over a physical separation of 700 mu m. At higher frequencies, the RF signal isolation becomes much inferior, with |S-21| approximate to -20 dB at 12 GHz. This can translate to crosstalk voltage of more than 500 mV for a 5-V interference source on the same RF IC chip. The use of 1-mu m BOX can bring down |S-21| to -50 dB at 12 GHz. The electric field distribution from full-wave EM simulation discloses the EM coupling mainly through the BOX layer rather than the Si substrate. A thicker BOX layer would cause less EM coupling because of a weaker electric field in the substrate at the interference source. These EM investigation results have direct implications for the design and realisation of SOI RF ICs, favouring the use of relatively inexpensive low- or medium-resistivity wafers with a thin Si handle layer.
In the post Moore's law era, chiplet becomes an important technology for the continual progress of integratedcircuits. Due the higher cost and larger delay of inter-die connections, interconnection design and the...
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In this paper, an energy-efficient low-voltage 7T SRAM-based charge recovery logic NMC macro is proposed. Firstly, a weight-stationary NMC macro architecture in dual clock and voltage domains is proposed to save memor...
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ISBN:
(纸本)9798331517137;9798331517144
In this paper, an energy-efficient low-voltage 7T SRAM-based charge recovery logic NMC macro is proposed. Firstly, a weight-stationary NMC macro architecture in dual clock and voltage domains is proposed to save memory energy consumption at near-threshold regime, without sacrificing computing throughput. Secondly, the charge recovery logic at subthreshold regime is also employed to reduce NMC logic energy consumption, while maintaining the computing speed. Simulation results show that the energy efficiency of the proposed 4Kb 7T-SRAM based CRL NMC macro design is around 3.71 TOPS/W, i.e., 6.49x improvement against the baseline design, when accelerating convolutional operations by 1.8 GOPS at 100 MHz with SRAM operating under 0.6 V and CRL computing under 0.4 V.
In this paper, we present an AlN/GaN metal-insulator-semiconductor high electron mobility transistor (MISHEMT) on a Si substrate, utilizing in-situ SiN as the gate dielectric, demonstrating exceptional mm-wave perform...
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ISBN:
(纸本)9798331517137;9798331517144
In this paper, we present an AlN/GaN metal-insulator-semiconductor high electron mobility transistor (MISHEMT) on a Si substrate, utilizing in-situ SiN as the gate dielectric, demonstrating exceptional mm-wave performance at low supply voltages. Facilitated by the thin in-situ SiN layer, a low ohmic contact resistance (R-C) of 0.2 Omega center dot mm was achieved. The device, featuring a T-shape gate with a 104 nm gate foot length (L-G) and a total gate metal thickness of 620 nm, exhibited a maximum drain current (I-D) of 1.44 A/mm, a peak transconductance (g(mmax)) of 449 mS/mm, and a cut-off frequency/maximum oscillation frequency (f(T)/f(max)) of 130/210 GHz. Under 28 GHz load-pull conditions and with a drain voltage of 5/10 V, the device delivered maximum output power densities (P-outmax) of 0.66/2.10 W/mm, and a peak power-added efficiencies (PAE) of 39%/35%. These outstanding results underscore the vast potential of AlN/GaN HEMTs on Si for power amplifiers (PAs) in mobile mm-wave front-end applications.
We designed, fabricated and characterized silicon-based AlN/GaN 2DEG Schottky barrier diode (SBD) and AlGaN/GaN metal-semiconductor-metal(MSM)2DEG varactor. The AlN/GaN SBD has a series resistance (Rs) of 17.7 Omega a...
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ISBN:
(纸本)9798331517137;9798331517144
We designed, fabricated and characterized silicon-based AlN/GaN 2DEG Schottky barrier diode (SBD) and AlGaN/GaN metal-semiconductor-metal(MSM)2DEG varactor. The AlN/GaN SBD has a series resistance (Rs) of 17.7 Omega and a zero-bias junction capacitance (C-j0) of 270 fF. The calculated cutoff frequency (fT) is 33 GHz. By simulation, we evaluated the frequency multiplier performance of this device. When the input power is 16 dBm at 10 GHz, a 10 dBm output signal was obtained at 20 GHz, with a doubling efficiency of about 26%. We achieved a MSM varactor with an extremely small anode-cathode spacing (L-ac = 450 nm) through a two-step lithography process. Based on the de-embedded S-parameter test results, the AlGaN/GaN MSM has a series resistance of 10 O and a junction capacitance of 3.4 fF at zero bias, with a cutoff frequency as high as 4.6 THz
As advanced materials, wide bandgap semiconductors possess advantages such as high voltage and temperature tolerance, superior high-frequency characteristics, and low energy consumption, which have led to their widesp...
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ISBN:
(纸本)9798331517137;9798331517144
As advanced materials, wide bandgap semiconductors possess advantages such as high voltage and temperature tolerance, superior high-frequency characteristics, and low energy consumption, which have led to their widespread application in power devices. However, these excellent properties are also valuable for memristor applications. Currently, there is a lack of research foundation on the switching characteristics of wide bandgap semiconductors when applied to memristors, and further exploration is needed on the conduction mechanism and other electrical characteristics. In this work, we designed crossbar arrays of wide bandgap semiconductor silicon carbide (SiC)-based memristor. Through characterization and electrical testing, we demonstrated that the switching characteristics are caused by the electrochemical metallization mechanism (ECM). On a single device, the transition from volatility to non-volatility can be achieved by controlling compliance current (CC), with a symmetrical operating voltage of about +/- 0.5 V, a large switching ratio of similar to 10(3), and excellent pulse control ability. Our work paves the way for expanding the application of wide bandgap semiconductors and developing advanced memristors.
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