This work presents a novel dual-function hardware security primitive that combines a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG) based on a 32x32 threshold switching (TS) array. By har...
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ISBN:
(纸本)9798331517137;9798331517144
This work presents a novel dual-function hardware security primitive that combines a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG) based on a 32x32 threshold switching (TS) array. By harnessing inherent variations of TS, our design generates unique and unpredictable bitstream suitable for authentication and cryptographic applications. The PUF utilizes the resistance distribution in the high resistance state (HRS) as a static entropy source, while the TRNG leverages the parity of switching pulses from HRS to the low resistance state (LRS) as a dynamic entropy source. Comprehensive experimental measurements are conducted to characterize the statistical distributions of HRS resistance values and switching pulse counts, which are subsequently incorporated into a Verilog-A behavioral model for simulation purposes. According to the simulation result, generated PUF and TRNG successfully pass all NIST SP800-22 tests, confirming its suitability for cryptographic applications.
In this paper, a low-noise amplifier (LNA) microwave monolithic integratedcircuit (MMIC) with amplitude limiting function is demonstrated, which is implemented using GaAs technology. The limiting unit of this circuit...
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ISBN:
(纸本)9798350389968
In this paper, a low-noise amplifier (LNA) microwave monolithic integratedcircuit (MMIC) with amplitude limiting function is demonstrated, which is implemented using GaAs technology. The limiting unit of this circuit uses a PIN diode design, and the low-noise amplifier unit uses a two-stage cascode structure composed of GaAs-pHEMT. The frequency band used by the limiting low-noise amplifier is the X-band and the insertion loss in the entire frequency band is less than 1 dB. The noise figure is less than 1.7dB and the gain is greater than 20 dB. It shows excellent performance and has broad application prospects.
This study focuses on two basic types of stacked Complementary-FET (CFET) devices: Common-Gate (CG) and Split-Gate (SG) structures. CG structures stand out due to their simplified fabrication process, while SG structu...
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In this work, volume change liner stressor Ge2Sb2Te5 (GST) and ZnS:SiO2 were experimentally integrated with the ferroelectric (FE) capacitors for the first time. Strained Hf0.5Zr0.5O2 (HZO) FE capacitors with various ...
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ISBN:
(纸本)9798331517137;9798331517144
In this work, volume change liner stressor Ge2Sb2Te5 (GST) and ZnS:SiO2 were experimentally integrated with the ferroelectric (FE) capacitors for the first time. Strained Hf0.5Zr0.5O2 (HZO) FE capacitors with various GST and ZnS:SiO2 liner thickness were fabricated to study the impact of strain on the polarization of FE devices. 14% increases of remanent Pr and saturation polarization Ps can be obtained in the FE capacitors with the GST stressor. In contrast, 4.9% and 2.7% reduction of Pr and Ps can be obtained in the FE capacitors with the ZnS:SiO2 stressor. Calibrated TCAD simulation models for the n-FeFET and p-FeFET with strained HZO dielectric were constructed to study the effect of different levels of experimentally induced strain on the performance of the scaled HZO FeFETs, respectively.
Solar design(https://***/)is an online photovoltaic device simulation and design platform that provides engineering modeling analysis for crystalline silicon solar cells,as well as emerging high-efficiency solar cells...
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Solar design(https://***/)is an online photovoltaic device simulation and design platform that provides engineering modeling analysis for crystalline silicon solar cells,as well as emerging high-efficiency solar cells such as organic,perovskite,and tandem *** platform offers user-updatable libraries of basic photovoltaic materials and devices,device-level multi-physics simulations involving optical–electrical–thermal interactions,and circuit-level compact model simulations based on detailed balance *** internationally advanced numerical methods,the platform accurately,rapidly,and efficiently solves optical absorption,electrical transport,and compact circuit *** achieves multi-level photovoltaic simulation technology from“materials to devices to circuits”with fully independent intellectual property *** to commercial softwares,the platform achieves high accuracy and improves speed by more than an order of ***,it can simulate unique electrical transport processes in emerging solar cells,such as quantum tunneling,exciton dissociation,and ion migration.
Aiming at the requirement of analog signal detection in electrical and electronic system detection equipment, a universal analog signal detection circuit is designed in this paper. Through the analysis of signal type,...
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The rapid advancement of integratedcircuit (IC) technology has increased the demand for efficient and effective VLSI optimization methods. This paper presents a systematic literature review as well as a conceptual fr...
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The rapid advancement of integratedcircuit (IC) technology has increased the demand for efficient and effective VLSI optimization methods. This paper presents a systematic literature review as well as a conceptual framework for optimizing placement and routing congestion estimation and control in VLSI design. This paper review existing algorithms, optimization techniques for placement and routing, congestion estimation, and control mechanisms. The goal is to comprehend the advantages, disadvantages, and applicability of these algorithms in addressing VLSI design problems. Furthermore, the research proposal seeks to create a comprehensive approach that incorporates various optimization techniques to improve the overall performance of integratedcircuits. The estimation and control of routing congestion receive special attention because it has a significant impact on signal flow and overall circuit quality. The preferred programming platform for implementing the proposed methodology is the MATLAB technical computing language, along with the required toolboxes. This research aims to contribute to the advancement of efficient and reliable IC designs by addressing the key challenges in VLSI design using an optimized placement and routing framework.
Sneak circuit analysis is a crucial reliability design process. In the design of spacecraft electronic systems, it is challenging to identify sneak circuits related to integrated chip interface circuits, and there are...
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This paper presents a novel approach to designing, a low-cost gripper that is highly repeatable and functionally integrated. The gripper is optimized to compensate for gripping errors with particular consideration to ...
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ISBN:
(纸本)9798350384581;9798350384574
This paper presents a novel approach to designing, a low-cost gripper that is highly repeatable and functionally integrated. The gripper is optimized to compensate for gripping errors with particular consideration to potential challenges of articulated robots. The primary design goal is to achieve maximum repeatability during the gripping and releasing stages of a pick-and-place process for a chip-like silicon die. The design is centered around a custom printed circuit board integrates functionality for vision-based error compensation, vacuum level monitoring, part contact detection, and detection of abnormal vibrations. We detail our design requirements and specific design choices for the mechanical and electronic design and provide qualitative and quantitative experimental validation of the achieved repeatability and the integrated functions.
This paper presents the design of a broadband bandpass filter for the Ku-band based on a Half-Mode Substrate integrated Waveguide (HSIW) structure. The filter utilizes HSIW as the main resonant cavity and employs step...
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ISBN:
(纸本)9798350389968
This paper presents the design of a broadband bandpass filter for the Ku-band based on a Half-Mode Substrate integrated Waveguide (HSIW) structure. The filter utilizes HSIW as the main resonant cavity and employs stepped impedance microstrip lines as input and output ports. Two H-shaped slot resonators are used to introduce two transmission zeros for the upper stopband, and stepped impedance resonators are added on the open boundary of HSIW and the feeding lines to introduce five transmission zeros for the lower stopband. This design enhances the filter's selectivity and out-of-band suppression capability. Simulation and test results show that the filter operates in the frequency range of 12.91 GHz to 18.12 GHz with an insertion loss of -2.38 dB and a typical return loss of -10dB. Additionally, out-of-band suppression reaches -30 dB or lower at 20.62 GHz to 28.87 GHz and 4.33 GHz to 10.52 GHz. The verified performance demonstrates that the filter exhibits favorable transmission characteristics and out-of-band suppression capabilities.
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