Artificial intelligence (AI) algorithms have vast application prospects in the field of analog circuitdesign. This paper introduces an AI algorithm-based assisted system for analog circuitdesign. The system adopts a...
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The research and discussion in this paper, there are package design with the structure of FOCoS (Fan Out Chip on Substrate) for an actual high-performance computing IC device with ASIC (Application Specific integrated...
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ISBN:
(纸本)9798350353808
The research and discussion in this paper, there are package design with the structure of FOCoS (Fan Out Chip on Substrate) for an actual high-performance computing IC device with ASIC (Application Specific integratedcircuit) chips and HBM (High Bandwidth Memory) chips. In the process of this study, the die-to-die (D2D) interconnection between ASIC chip to ASIC chip is used UCIe (Universal Chiplet Interconnect Express) interface for high speed signal transmission and HBM3/HBM3e is applied on data transfer between ASIC chip and high bandwidth memories. Through electrical analysis, the suitable RDL (Re-Distribution Layer) structure and routing topology are applied on various interface.
This work proposes a design approach for a novel lumped parameter chip with negative group delay (NGD) that can be applied at low frequencies. Based on the modeling of an inductorless resistor-capacitor network, the t...
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ISBN:
(数字)9798350389968
ISBN:
(纸本)9798350389968
This work proposes a design approach for a novel lumped parameter chip with negative group delay (NGD) that can be applied at low frequencies. Based on the modeling of an inductorless resistor-capacitor network, the transfer function of the circuit is quantitatively derived using Kirchhoff's current law and microwave network analysis techniques. A system of equations is established using the NGD value as the target, and the values of all components composing the NGD network can be precisely calculated by a quantitative analysis of the system of equations. This technique eliminates the size dependency of conventional NGD circuits on signal wavelength, thus realizing circuit miniaturization. The circuit has been verified by tape-out and test validation to achieve NGD characteristics in the broadband range of 0.2-1.2 GHz with a maximum NGD of-0.2 ns;when the bandwidth is reduced to 0.35 GHz, the maximum NGD of the circuit can be increased to -1 ns.
This paper presents an innovative approach to sustainable circuitdesign through the development of recyclable printed circuit boards (PCBs). The proposed method involves the direct printing of circuits onto biodegrad...
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ISBN:
(纸本)9798331529475;9798331529468
This paper presents an innovative approach to sustainable circuitdesign through the development of recyclable printed circuit boards (PCBs). The proposed method involves the direct printing of circuits onto biodegradable substrates using a silver-based ink, followed by the integration of components via Ultra Precise Deposition (UPD) for fine wire interconnection of integratedcircuits (ICs). This technique facilitates the assembly of a comprehensive Bipolar Junction Transistor (BJT) circuit. Notably, the circuit incorporates a touch sensor-fabricated using the same silver ink-that modulates the luminance of a surface-mount light-emitting diode (LED). This design not only prioritizes sustainability by ensuring the recyclability of the PCB substrates but also extends to the electronic components and the conductive silver tracks. The approach significantly advances sustainable practices in electronics manufacturing, enabling the complete recycling of all constituent components.
Multiple-stage complementary metal-oxide-semiconductor (CMOS) operational amplifiers (Op Amps) have been extensively studied in the literature;often, each new design reports several performance advancements over the e...
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Multiple-stage complementary metal-oxide-semiconductor (CMOS) operational amplifiers (Op Amps) have been extensively studied in the literature;often, each new design reports several performance advancements over the existing ones. However, the design space boundaries of those new proposals were rarely explored. Predicting the design space boundary of a new circuit topology is usually challenging due to the dependency on many aspects of technical consideration regarding the process technology, sizing priority adopted in practice, and balancing of performance metrics on power, area, noise immunity, and so on. Knowing the design space boundary could be beneficial to a fair appraisal of new designs. In this paper, we propose a gm/ID-based method for the design space exploration of multistage Op Amps. By introducing a sampling technique while taking advantage of the device grouping property with gm/ID, it is possible to explore the circuit performance boundary by combining approximate symbolic modeling and gm/ID table lookup. Due to the introduction of a fast performance evaluation method, a large ensemble of circuit sizing samples can be evaluated in parallel, by which an efficient data mining procedure could be incorporated to deduce the circuit samples that can achieve extremal performance at Pareto boundaries. The fidelity of this proposal has been validated via simulation program with integratedcircuit emphasis (SPICE) . The sampling method is also compared with a multi-objective genetic algorithm to show the superiority in capturing Pareto boundaries.
The quadratic complexity of attention computation poses a challenge for traditional Transformers, which the window attention mechanism aims to mitigate. However, the diverse applications of Transformer architectures r...
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This special section of the IEEE Journal of Solidstate circuits (JSSC) highlights outstanding papers presented at the 2023 IEEE international Solid-State circuits conference (ISSCC), which was held from February 19 to...
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This special section of the IEEE Journal of Solidstate circuits (JSSC) highlights outstanding papers presented at the 2023 IEEE international Solid-State circuits conference (ISSCC), which was held from February 19 to 23, 2023 in San Francisco, USA, under the conference theme “Building on 70 years of Innovation in Solid-State circuitdesign.” ISSCC is the foremost global forum for the presentation of advances in solid-state circuits and systems-on-a-chip (SoCs) and offers a unique opportunity for engineers working at the cutting edge of integratedcircuit (IC) design and application. The conference includes several technical programs ranging from analog, digital, memory, wireline (WLN)/wireless, and power management circuits and systems with applications in various fields. This JSSC special section highlights selected papers from ISSCC, specifically on topics related to WLN circuits, digital circuit techniques (DCTs), digital architecture and systems (DASs), machine learning (ML) accelerators, and memory circuits.
Benefiting from the high carrier mobility, the two-dimensional (2D) material borophene is promising to be used in high-speed applications. This paper investigates entirely the I/V characteristics of a borophene field-...
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In response to the need for smaller and lighter power supply equipment, there has been a push towards higher power density in current power electronic converters. This development aligns well with the requirements of ...
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In response to the need for smaller and lighter power supply equipment, there has been a push towards higher power density in current power electronic converters. This development aligns well with the requirements of photovoltaic grid-connected inverters. Among various passive filters utilized in these inverters, the LCL filter stands out as a popular choice. Nevertheless, it should be noted that traditional LCL filters have limited core utilization and exhibit significant redundancy. In view of the above problems, this paper proposes a magnetic integrated passive filter based on ripple transfer technology and carries out volume optimization design. Compared to the conventional LCL filter, the magnetic integrated passive filter offers a reduction in size and weight while preserving its capability to ripples attenuate. Finally, a laboratory prototype with a rated power of 2 kW is built to verify the effectiveness of the proposed magnetic integrated passive filter. In this paper, a magnetic integrated passive filter based on ripple transfer technology is proposed, and the volume optimization design is carried out. The magnetic integrated passive filter reduces the size, weight, and inductance loss, while maintaining the ripple attenuation ability. image
Memristor is a device with nonlinear and memory characteristics, and it is an appropriate candidate for constructing chaotic and hyperchaotic systems. In this work, we have designed a memristor model and subsequently ...
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