In a theoretical study is shown that computing systems consisting of a huge number of small processing elements exploit better the potential of high dense opticalinterconnections than systems with large but few proce...
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In a theoretical study is shown that computing systems consisting of a huge number of small processing elements exploit better the potential of high dense opticalinterconnections than systems with large but few processors. This is demonstrated for the example of a binary associative memory that needs sparsely coded vectors to maximize the memory capacity. Furthermore this sparse coding reduces current problems concerning the power consumption in micro laser arrays. An estimation shows that both on GaAs based monolithically and on silicon based hybrid smart pixels solutions for such an associative memory offer short-term reachable goals that are competitive with existing all-electronic systems.
To provide paralleloptical data input to optical information processing systems a choice must be made between highly parallel modulator arrays and (currently) moderately parallel arrays of active sources. Two technol...
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ISBN:
(纸本)0818675918
To provide paralleloptical data input to optical information processing systems a choice must be made between highly parallel modulator arrays and (currently) moderately parallel arrays of active sources. Two technologies are compared for suitability to address arrays of differential pairs of PnpN optical thyristors;these are liquid crystal display devices (LCDs) and vertical cavity surface emitting lasers (VCSELs). An 8 x 8 array of thyristor pairs is addressed optically with a LCD and a single thyristor pair is driven with a VCSEL pair. The trade-offs between speed and parallelism are considered in each case and desirable properties for future devices are determined.
We analyzed the performance improvement of parallelprocessing systems with fully or highly connected opticalinterconnections over systems with a bus. Solving an 1024 by 1024 point 2-D FFT with 300Mflops processors a...
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ISBN:
(纸本)0818685727
We analyzed the performance improvement of parallelprocessing systems with fully or highly connected opticalinterconnections over systems with a bus. Solving an 1024 by 1024 point 2-D FFT with 300Mflops processors and 66MHz interconnections, the speedup factor of the execution time of fully interconnected systems over systems with a bus is 3.1 for 32 PEs, and 1.2 for 4 PEs. We proposed an extended ring system as a highly connected interconnection, and also discussed the speed-up factor as for highly connected interconnections.
A fault-tolerant high-performance optical 2×2 switch is proposed for massivelyparallelprocessing network applications. The switch is designed using all optical components. This allows the exploitation of spatia...
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A fault-tolerant high-performance optical 2×2 switch is proposed for massivelyparallelprocessing network applications. The switch is designed using all optical components. This allows the exploitation of spatial parallelism. The proposed switch can be used with any multistage interconnection network such as omega, Banyan, shuffle, Benes. For the purpose of this study, the baseline network was used as the underlying network. The reasons for choosing the baseline are that it uses 2×2 switches, is not fault-tolerant and is self-routing. Performance/reliability analysis is done and compared with two major fault-tolerant networks. The results show that without redundant switches, better network survivability is achieved. Since the network is assembled using only the 2×2 switches, it can be mass produced.
We present a shared memory (SM) parallel computer architecture designed to take advantage of the integration of a large number of optical I/Os on VLSI circuits. It is shown how the unique features of this new technolo...
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ISBN:
(纸本)0818675918
We present a shared memory (SM) parallel computer architecture designed to take advantage of the integration of a large number of optical I/Os on VLSI circuits. It is shown how the unique features of this new technology can be exploited to build a high performance, uniform memory access SM scalable to up to 1000 processors. Our architecture relies on a space invariant broadcast topology that can be easily implemented using fiber arrays or simple robust free space opto-mechanics. The paper presents the concept of the architecture and describes the design of the components and protocols needed for its implementation.
One of the most important features of interconnection networks for massivelyparallel computer systems is scaleability. The fiber-optic network described in this paper uses both wavelength division multiplexing and a ...
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One of the most important features of interconnection networks for massivelyparallel computer systems is scaleability. The fiber-optic network described in this paper uses both wavelength division multiplexing and a configurable ratio between optics and electronics to gain an architecture with good scaleability. The network connects distributed modules together to a huge parallel system where each node itself typically consists of parallelprocessing elements. The paper describes two different implementations of the star topology, one uses an electronic star and fiber optic connections, the other is purely optical with a passive optical star in the center. The medium access control of the communication concept is presented and some scaleability properties are discussed involving also a multiple-star topology.
The need for optical systems to be designed for high data rates on each channel has a great impact on some photonic technologies because reasonable delivered powers are needed, and exotic but slow or inefficient appro...
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The need for optical systems to be designed for high data rates on each channel has a great impact on some photonic technologies because reasonable delivered powers are needed, and exotic but slow or inefficient approaches will have a hard time competing solely on the basis of very high parallelism. Photonic devices offer unique capabilities for performing multiplication, addition and delay at very high speed. They can be useful in ancillary special purpose processors. massivelyparallel signal distribution may be necessary, but the speed may be relaxed and the number of transmitters may be far fewer than the number of channels needed in these cases.
The architecture and implements of optical fiber interconnection system for massivelyparallel multiprocessor arrays are presented in detail. The optical fiber interconnection system has the advantages of high transmi...
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The architecture and implements of optical fiber interconnection system for massivelyparallel multiprocessor arrays are presented in detail. The optical fiber interconnection system has the advantages of high transmission speed, high communication bandwidth, powerful anti-disturbance as well as simple, reliable, economical and easy to compact. The electrical device is used as the program controlled device of the topology reconfiguration and fiber optic is used as global interconnection in the system. Therefore, the network can be reconfigurated into various topologies for different algorithms in order that the parallel multiprocessor array has the advantages of high processing speed, various operation modes, applicable for SIMD or MIMD computing structure.
Free-space optics can help alleviate the communications problems of electronic computers by its large spatial and temporal bandwidth. For compact packaging, the concept of planar-integrated free-space optics is used. ...
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ISBN:
(纸本)0818685727
Free-space optics can help alleviate the communications problems of electronic computers by its large spatial and temporal bandwidth. For compact packaging, the concept of planar-integrated free-space optics is used. Here, we give an overview of the design, fabrication and thermal management of planar optical interconnects.
The different paradigm shifts that have occurred in digital parallel computing technology are presented. State-of-the-art hybrid optoelectronic technologies, that will allow the implementation of demonstrators featuri...
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The different paradigm shifts that have occurred in digital parallel computing technology are presented. State-of-the-art hybrid optoelectronic technologies, that will allow the implementation of demonstrators featuring operations that are difficult to perform with all-electronic technologies, are discussed. The building of these demonstrators require the knowledge of how to merge different technologies, while anticipating the next paradigm shift in photonic computing technologies. The goal of this `next generation' technology should not be to persuade electronic engineers of its value by extrapolation of specifications, but rather to convince them of its power by demonstration.
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