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international conference on distributed Computing Systems

作者： Chenghao Hu Baochun Li Department of Electrical and Computer Engineering University of Toronto

ISBN: (数字)9798350386059

ISBN: (纸本)9798350386066

Transformer models achieved significant break-throughs in a wide variety of applications, yet their exorbitant computation costs pose significant challenges when it comes to deploying these models for inference, especially on resource-constrained edge devices. In this paper, we introduce the concept of cross-device distributed inference to transformer models, which accelerates the speed of inference by distributing its workload among multiple edge devices. Unlike previous work designed for multi-GPU environments, the challenge of distributing inference workload on edge devices includes not only limited computation power, but also low bandwidth connections to exchange intermediate results. To address these challenges, we propose Voltage, a distributed inference system tailored for edge devices. By exploiting the inherent parallelizability of the input sequence, Voltage partitions the transformer inference workload based on positions to accelerate the inference speed. We also analyze the relationship between the partition settings and the computation complexity, which allows Voltage to adaptively select the most efficient computation scheme. To demonstrate its effectiveness and generalizability, the performance of Voltage has been evaluated in the context of well-known transformer models, and in a variety of experimental settings. Our results show that Voltage significantly outperforms tensor parallelism by reducing the communication size by 4 x, thereby accelerate the inference speed by up to 32.2 % compared with single device deployment.

关键词： Performance evaluation Tensors Costs Computational modeling Voltage parallel processing Transformers

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DeepPreNet: A Deep Learning Pre-processing Method for Speech Distortion Correction in Parametric Array Loudspeaker

DeepPreNet: A Deep Learning Pre-Processing Method for Speech...

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international conference on Acoustics, Speech, and Signal processing (ICASSP)

作者： Wenyao Ma Yunxi Zhu Fengyuan Hao Liwen Qin Fengyi Fan Jun Yang Key Laboratory of Noise and Vibration Research Institute of Acoustics Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China

ISBN: (数字)9798350368741

ISBN: (纸本)9798350368758

The parametric array loudspeaker produces highly directional sound via a nonlinear process in air, which also introduces inherent baseband distortions. However, conventional recursive modulators employed to compensate for nonlinearity demand substantially increased bandwidth and are not optimized for speech applications. In this paper, we propose a deep learning method tailored for speech, called DeepPreNet. It contains two parts: a pre-processing network (PreNet) and a forward inference model (ForwModel). The ForwModel is a pre-trained network using real recorded speeches to model the actual nonlinear process, enhancing its reliability for PreNet training. The PreNet is trained to generate pre-processed signals, which are subsequently fed into the ForwModel to recover the distortion-free speech. By leveraging the harmonic-rich feature of speech, the proposed method incorporates distortions to reconstruct clean speech, thereby alleviating the bandwidth constraints imposed by the transducer. Experiments in both near- and far-field conditions demonstrate that the proposed method achieves remarkable performance compared to refined baseline techniques with the real transducer response.

关键词： Loudspeakers Deep learning Training Acoustic distortion Transducers Bandwidth Speech enhancement parallel processing Harmonic distortion Reliability

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Data Volume-Aware Computation Task Scheduling for Smart Grid Data Analytic applications

Data Volume-Aware Computation Task Scheduling for Smart Grid...

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IEEE international conference on Communications (ICC)

作者： Binquan Guo Hongyan Li Ye Yan Zhou Zhang Peng Wang State Key Laboratory of Integrated Service Networks Xidian University Xi'an P. R. China Tianjin Artificial Intelligence Innovation Center (TAIIC) Tianjin P. R. China

Emerging smart grid applications analyze large amounts of data collected from millions of meters and systems to facilitate distributed monitoring and real-time control tasks. However, current parallel data processing systems are designed for common applications, unaware of the massive volume of the collected data, causing long data transfer delay during the computation and slow response time of smart grid systems. A promising direction to reduce delay is to jointly schedule computation tasks and data transfers. We identify that the smart grid data analytic jobs require the intermediate data among different computation stages to be transmitted orderly to avoid network congestion. This new feature prevents current scheduling algorithms from being efficient. In this work, an integrated computing and communication task scheduling scheme is proposed. The mathematical formulation of smart grid data analytic jobs scheduling problem is given, which is unsolvable by existing optimization methods due to the strongly coupled constraints. Several techniques are combined to linearize it for adapting the Branch and Cut method. Based on the topological information in the job graph, the Topology Aware Branch and Cut method is further proposed to speed up searching for optimal solutions. Numerical results demonstrate the effectiveness of the proposed method.

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Split Convolutional Neural Networks for distributed Inference on Concurrent IoT Sensors 27

Split Convolutional Neural Networks for Distributed Inferenc...

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27th IEEE international conference on parallel and distributed Systems, ICPADS 2021

作者： Chen, Jiale Van Le, Duc Tan, Rui Ho, Daren Nanyang Technological University HP-NTU Digital Manufacturing Corporate Lab Singapore School of Computer Science and Engineering Nanyang Technological University Singapore HP Inc. United States

ISBN: (纸本)9781665408783

Convolutional neural networks (CNNs) are increasingly adopted on resource-constrained sensors for in-situ data analytics in Internet of Things (IoT) applications. This paper presents a model split framework, namely, splitCNN, in order to run a large CNN on a collection of concurrent IoT sensors. Specifically, we adopt CNN filter pruning techniques to split the large CNN into multiple small-size models, each of which is only sensitive to a certain number of data classes. These class-specific models are deployed onto the resource-constrained concurrent sensors which collaboratively perform distributed CNN inference on their same/similar sensing data. The outputs of multiple models are then fused to yield the global inference result. We apply splitCNN to three case studies with different sensing modalities, which include the human voice, industrial vibration signal, and visual sensing data. Extensive evaluation shows the effectiveness of the proposed splitCNN. In particular, the splitCNN achieves significant reduction in the model size and inference time while maintaining similar accuracy, compared with the original CNN model for all three case studies. © 2021 IEEE.

关键词： Vibration analysis

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Is Asymptotic Cost Analysis Useful in Developing Practical parallel Algorithms

Is Asymptotic Cost Analysis Useful in Developing Practical P...

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35th IEEE international parallel and distributed processing Symposium (IPDPS)

作者： Blelloch, Guy Carnegie Mellon Univ Pittsburgh PA 15213 USA

ISBN: (纸本)9781665440660

Asymptotic analysis of runtime, and space, has been the cornerstone in the development of practical sequential algorithms. The analysis is not meant to predict runtimes on any particular machine, but rather to guide algorithm designers and implementors in the right direction, and let them better understand how algorithms might scale. Quicksort, Dijkstra's algorithm, dynamic programming, depth first search, for example, are fast in theory and in practice–-and scale pretty much as the theory predicts. All CS undergrads learn about these algorithms and techniques, and they are broadly implemented in many widely used libraries and applications. Over the years models have been extended to include the benefits of locality, allowing for a refined asymptotic analysis when needed. Unfortunately the jury is still out on the role of asymptotic analysis in the practice of parallel algorithms. There is no lack of theoretical work on analyzing the cost of parallel algorithms, with such work dating back almost fifty years, but these ideas have not been widely adopted in practice. There are various possible reasons, including inaccurate cost models, giant constants in the big-O, no adequate programming languages, lack of education on the topic, or perhaps parallel machines are just too complicated to model theoretically and we should just give up. In this talk I will describe how simple parallel models can be useful for developing practical parallel algorithms, and many of the theoretical ideas in parallel algorithms are useful, at least in the context of shared-memory multicore machines. I will cover work on developing practically efficient algorithms for a wide variety of applications of graphs, trees, computational geometry, and strings. As with sequential algorithms, the basic model does not account for locality, but I will discuss some simple ways to extend it.

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Making Memristive processing-in-Memory Reliable 28

Making Memristive Processing-in-Memory Reliable

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28th IEEE international conference on Electronics, Circuits, and Systems (IEEE ICECS)

作者： Leitersdorf, Orian Ronen, Ronny Kvatinsky, Shahar Technion Israel Inst Technol Viterbi Fac Elect & Comp Engn Haifa Israel

ISBN: (纸本)9781728182810

processing-in-memory (PIM) solutions vastly accelerate systems by reducing data transfer between computation and memory. Memristors possess a unique property that enables storage and logic within the same device, which is exploited in the memristive Memory processing Unit (mMPU). The mMPU expands fundamental stateful logic techniques, such as IMPLY, MAGIC and FELIX, to high-throughput parallel logic and arithmetic operations within the memory. Unfortunately, memristive processing-in-memory is highly vulnerable to soft errors and this massive parallelism is not compatible with traditional reliability techniques, such as error-correcting-code (ECC). In this paper, we discuss reliability techniques that efficiently support the mMPU by utilizing the same principles as the mMPU computation. We detail ECC techniques that utilize the unique properties of the mMPU for efficiently utilizing the massive parallelism. Furthermore, we present novel solutions for efficiently implementing triple modular redundancy (TMR). The short-term and long-term reliability of large-scale applications, such as neural-network acceleration, are evaluated. The analysis clearly demonstrates the importance of high-throughput reliability mechanisms for memristive processing-in-memory.

关键词： processing-in-memory (PIM) memristor stateful logic reliability soft errors error correcting code (ECC) triple modular redundancy (TMR)

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Comparison of QoS optimisation techniques in adaptive smart device peer-to-peer overlay networks

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international JOURNAL OF parallel EMERGENT AND distributed SYSTEMS 2021年第6期36卷 668-686页

作者： Maiti, Ananda Maxwell, Andrew Kist, Alexander Univ Southern Queensland Sch Mech & Elect Engn Toowoomba Qld Australia

Smart device networks form the backbone of many Internet of Things (IoT) applications. The performance of these systems depended on many factors. This includes their ability to connect to each other and network latency. In this paper, two algorithms are discussed that build a Peer-to-peer (P2P) overlay network. The focus is on real-time end-to-end remote instrumentation for IoT applications. P2P overlay networks are used for various purposes from content distribution through to media sharing. In contrast to traditional P2P systems, IoT systems can be highly sensitive to network latency and require low bandwidth. The main contributions of this paper are two algorithms to create overlay networks that assign peer nodes to super-peer nodes. The network contains a large number of smart devices and the key aim is to minimize system wide network latency. Other constraints regarding the nodes ability include the ability to become a super-peer node such as connectivity and limited processing capacities of the smart devices are also considered in context of a P2P remote instrumentation system. Both algorithms create a 3-hop network where the latency is lowered as much as possible with the given set of nodes. The algorithms have been validated through simulation.

关键词： distributed computing smart devices peer-to-peer network assignment problem remote instrumentation data clustering

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Dynamic Allocation of Processor Cores to Graph applications on Commodity Servers 23

Dynamic Allocation of Processor Cores to Graph Applications ...

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Proceedings of the 32nd international conference on parallel Architectures and Compilation techniques

作者： Lucia Pons Julio Sahuquillo Timothy M. Jones Universitat Politècnica de València Valencia Spain University of Cambridge Cambridge United Kingdom

ISBN: (纸本)9798350342543

Graph processing is increasingly adopted to solve problems that span many application domains, including scientific computing, social networks, and big-data analytics. These applications present particular features (huge working sets and irregular scalability) that make the default Linux scheduler, which adopts a time-sharing policy to provide a fair scheduler, perform poorly when co-locating multiple graph applications in the same processor. This work focuses on maximizing processor utilization, which is a major concern of current data centers. To this end, we propose AFAIR, a flexible scheduling policy that allocates multiple graph applications on the same processor and assigns a fraction of the cores exclusively to each application instead of sharing them. Moreover, AFAIR dynamically adds/removes cores to the running applications, adapting the number of threads used for parallel execution to balance memory load. This allows AFAIR to achieve almost perfect fairness, on average 95%.

关键词： fair scheduling

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Map Reduce techniques for Machine Learning in Big Data Analytics

Map Reduce Techniques for Machine Learning in Big Data Analy...

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international conference on Contemporary Computing and Informatics (IC3I)

作者： Sanjeev Kukreti Hassan M. Al-Jawahry Anurag Shrivastava Saloni Bansal Hemanth Raju Rowsonara Begum Department of Computer Science & Engineering Graphic Era Deemed to be University Dehradun Uttarakhand India Department of computers Techniques engineering College of technical engineering The Islamic university Najaf Iraq Saveetha School of Engineering Saveetha Institute of Medical and Technical Sciences Chennai Tamil Nadu India Department of Computer Engineering and Applications GLA University Mathura Uttar Pradesh India Department of Mechanical Engineering New Horizon College of Engineering Bangalore Karnataka India Department of Computer Science and Engineering MLR Institute of Technology Hyderabad Telangana

ISBN: (数字)9798350350067

ISBN: (纸本)9798350350074

One of the most groundbreaking approaches to the processing and analysis of large datasets has been created as a result of the combination of MapReduce techniques and machine learning algorithms within the framework of big data analytics. The problems of traditional data processing in terms of handling the volume, velocity, and variety of big data are addressed by the distributed computing architecture introduced by MapReduce. This research investigates the ways in which MapReduce may be used to simplify the process of machine learning, with a particular focus on the capabilities of the framework to manage enormous volumes of data and to parallelize operations. By contrasting the performance of MapReduce with that of more traditional methods, the study solves the problems of scalability and computing efficiency that are brought about by massive amounts of data. Through an in-depth analysis, the paper highlights the optimization potential of MapReduce as well as its implications for next-generation machine learning applications across a variety of industries.

关键词： Industries Technological innovation Machine learning algorithms Scalability Machine learning Computer architecture Big Data Informatics Optimization Next generation networking

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Custom Accessors: Enabling Scalable Data Ingestion, (Re-)Organization, and Analysis on distributed Systems

Custom Accessors: Enabling Scalable Data Ingestion, (Re-)Org...

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IEEE international conference on Big Data

作者： Vito Giovanni Castellana Burcu O. Mutlu Ian Di Dio Lavore Jesun Firoz Katherine Wolf Marco Minutoli John Feo Pacific Northwest National Laboratory Richland WA USA Politecnico di Milano Milano Italy

ISBN: (数字)9798350362480

ISBN: (纸本)9798350362497

The emerging class of high velocity and high volume data analytic workflows comprise interwoven data ingestion, organization, and processing stages, with ingestion and organization steps often contributing comparable or even higher computational costs than actual processing steps. Since complex workflows consist of a variety of phases that view and use data differently, being able to construct efficient, scalable, distributed data structures (arrays, vectors, sets, maps, and multi-maps) is essential and requires custom methods to extend and shrink containers, analyze and position data, and, maintain globally-consistent meta-data. In this paper, we propose a novel data-structure access paradigm based on the concept of Accessors. At a high level, accessors are customizable callable objects that can modify the behavior of insert, read, update, and delete operations for distributed containers while preserving atomicity guarantees. Accessors provide a very clean and natural way to implement a variety of programming patterns, e.g., conditional insertion/deletion and cascading computations, which would be otherwise hard (or even impossible) to express in parallel and distributed settings without using locks. We demonstrate the practicality and usefulness of our approach with two representative use cases and study the performance of these applications on a distributed High-Performance Computing system. Our analysis highlights that our proposed abstraction allows for an effective overlapping and concurrent execution of different workflow steps (e.g., data ingestion and analysis), which in a conventional analytics pipeline would execute sequentially, contributing cumulatively to the overall latency.

关键词： Phased arrays Data ingestion Data analysis High performance computing Pipelines distributed databases Organizations Containers Programming Vectors

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