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检索条件"任意字段=International Conference on Parallel and Distributed Processing Techniques and Applications"

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Real-Time Analytics for Big Data in Smart City applications: Transforming Urban Environments with Data-Driven Insights

Real-Time Analytics for Big Data in Smart City Applications:...

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Automation and Computation (AUTOCOM), international conference on

作者： Avinash Khanderi Gnanajeyaraman Rajaram Ramy Riad Hussein Prashant Johri T. Mohanraj M. Balamurugan Walmart Inc. Senior Data Engineer Bentonville Arkansas Department of CSE SIMATS Engineering Saveetha School of Engineering Saveetha Institute of Medical and Technical Sciences Chennai India Department of Computers Techniques Engineering College of Technical Engineering The Islamic University Najaf Iraq School of Computing Science and Engineering Galgotias University Greater Noida India Department of Computer Science Engineering Karpagam Academy of Higher Education Coimbatore India Department of EEE Excel Engineering College Komarapalayam India

ISBN: (数字)9798331542375

ISBN: (纸本)9798331542382

This paper offers an overview of real-time analytics for smart cities proposing a framework for real-time data processing to improve the urban landscape. In the proposed system, large-scale data-streams can be processed using advanced machine learning algorithms, edge computing, and distributed data storage. Analyzing the outcomes of the evaluation procedure evidences reportable performance enhancements in the areas of smart city applications. Average traffic speed in transportation systems in the same period rose by 60%, concurrency and response to incidents likewise cut down by 40% and 53% respectively. The energy management systems responded with a 16% decrease in maximum energy load and the waste reduction was by 50%, while the costs savings was by 25% increase. Public safety applications alone realised a 60% decrease in the time taken to detect a crime and a 28.6% increase in efficiency on disaster resources with an overall spike in public satisfaction of 25.7%. Such findings improve the understanding of how this framework can increase urban efficiency, sustainability, and quality of life, which makes the solution usable in future smart city projects.

关键词： Waste reduction Energy consumption Costs Smart cities Disasters Memory Big Data Real-time systems Energy management systems Vehicle dynamics

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Modeling Adversarial Strategies in GPU Side-Channel Attacks: A Game-Theoretic Perspective

Modeling Adversarial Strategies in GPU Side-Channel Attacks:...

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Computing for Sustainability and Intelligent Future (COMP-SIF), international conference on

作者： Nelson Lungu Suchismita Rout Bibhuti Bhusan Dash Sudhir Kumar Behera Utpal Chandra De Sudhansu Shekhar Patra Information Communication Technology National Institute of Public Administration Lusaka Zambia School of Computer Engineering Kalinga Institute of Industrial Technology (KIIT) Deemed to be University Bhubaneswar Odisha India School of Computer Applications Kalinga Institute of Industrial Technology (KIIT) Deemed to be University Bhubaneswar Odisha India Department of Information Technology Dr. Ambedkar Memorial Institute of Information technology & Management Science (DAMITS) Rourkela Odisha India

ISBN: (数字)9798331538538

ISBN: (纸本)9798331538545

The use of Graphics processing Units (GPUs) in safety-critical applications is increasing; yet, their highly parallel designs provide weaknesses that facilitate side-channel attacks, enabling the theft of confidential information. Prior research has shown that time, contention, power, and access pattern side-channels are viable against GPU workloads. Nonetheless, their current protections remain insufficient to comprehensively safeguard real-world shader operations. A novel game-theoretical framework is proposed to model and evaluate the intricate dynamics between attackers and defenders in GPU side-channel assaults. The interactions are reformulated as a two-player, non-cooperative game, and the best tactics for both players have been established under various payment models and danger situations. Experimental results obtained from commercial GPUs corroborate that the suggested technique effectively represents hostile dynamics in reality, necessitating the development of resilient countermeasures. This project seeks to bridge the gap between theoretical security analysis and practical GPU protection methods. We provide a robust foundation for designing appropriate and secure GPU architectures for continuously changing side channel threadings. Human-centric approaches to driving work emphasise the need of considering human elements like as perception, judgement, and decision-making to effectively assess adversary techniques in cybersecurity. The game theoretical model offers a structured approach for forecasting probable assault vectors, assessing defence methods, and formulating effective counters customised to the adversary.

关键词： Computational modeling Decision making Graphics processing units Side-channel attacks Games Predictive models Vectors Protection Sustainable development Forecasting

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Efficient Pathfinding in a Maze to overcome Challenges in Robotics and AI Using Breadth-First Search

Efficient Pathfinding in a Maze to overcome Challenges in Ro...

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international conference on Communication Systems and Network Technologies (CSNT)

作者： Abiya Biju Gayathri MP Jayapandian N Alan Chris Noeal Rajeev Thaleeparambil Department of CSE Christ University Bangalore India Department of Computer Science and Engineering Christ University Bangalore India

ISBN: (数字)9798331531935

ISBN: (纸本)9798331531942

Efficient pathfinding in a maze is a key obstacle in robotics, computer science, and artificial intelligence. The article is proposing a strategy using the Breadth-First Search (BFS) algorithm to establish the shortest path for a robot navigating from the top-left to the bottom-right corner of a maze depicted as a two-dimensional grid. The maze comprises open pathways and obstructions, signified by 0 and 1, respectively. The robot's permissible actions include up, down, left, and right, restricted by the boundaries of the grid and the position of obstacles. BFS, an approach well-suited for unweighted graphs, sequentially examines all available routes, ensuring that the first observed path to the goal is the shortest. A visited set removes redundant cell visits, reducing infinite loops and inefficient processing. The algorithm's efficiency is dramatically upgraded by harnessing a queue structure to maintain live routes and their associated steps. This approach assures effectiveness and extensiveness for grid-based navigation problems, making it especially appropriate for real-world robotic applications where minimizing traversal cost is critical. Additionally, the paper discusses the algorithm's execution, complexities, and potential upgrades for larger grids or dynamic environments. Experimental results demonstrate BFS's resilience and efficacy in solving pathfinding challenges in various maze configurations. This work contributes to developing stable navigation techniques, integral to advancing autonomous robotic navigation and related fields.

关键词： Technological innovation Navigation Heuristic algorithms Refining parallel processing Robustness Real-time systems Artificial intelligence Robots Resilience

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Towards Automatic, Predictable and High-Performance parallel Code Generation 30th

Towards Automatic, Predictable and High-Performance Paralle...

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30th international conference on parallel and distributed processing techniques, PDPTA 2024, held as part of the World Congress in Computer Science, Computer Engineering and Applied Computing, CSCE 2024

作者： Mullin, Lenore Hains, Gaétan 1400 Washington Ave AlbanyNY12222 United States LACL Université Paris-Est Créteil94000 France

ISBN: (纸本)9783031856372

High-performance architectures have complex features so that reliable production of parallel software is beyond the reach of many Computer Science graduates. Compilers alone cannot guarantee the highest performance and multiple APIs with complex performance features are difficult to master. As a first step towards more comprehensive solutions we are building key elements of a pre-compiler system that will automatically produce predictable, scalable and high-performance code from declarative tensor expressions. In this paper we summarize and analyze a large set of timing experiments of matrix multiplication variants that are mapped to vectorized and multithread code. The analysis covers two high-end target architectures and exhaust a whole space of code, compiler, pragma and parallelism parameters. Our analysis shows how the best choice of parameters is produced from a small set of tests that can converge in a matter of seconds and then predict performance of larger instances to within 25% or much less. Inefficient choices of parameters is also shown to be reliably predicted from small tests, so that our design for a precompiler is guaranteed to be a realistic and portable tool. The generality of our Mathematics of Arrays tensor algebra, and very broad applicability of tensor operations (signal processing, scientific computing, AI, etc.) supports our claim that these experiments and design can be generalized to a general purpose parallel programming tool. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Tensors

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Real-Time Analytics for Big Data in Smart City applications: Transforming Urban Environments with Data-Driven Insights

Real-Time Analytics for Big Data in Smart City Applications:...

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3rd IEEE international conference on Automation and Computation, AUTOCOM 2025

作者： Khanderi, Avinash Rajaram, Gnanajeyaraman Hussein, Ramy Riad Johri, Prashant Mohanraj, T. Balamurugan, M. Walmart Inc. Bentonville AR United States Simats Engineering Saveetha School of Engineering Saveetha Institute of Medical and Technical Sciences Department of Cse Chennai India College of Technical Engineering The Islamic University Department of Computers Techniques Engineering Najaf Iraq School of Computing Science and Engineering Galgotias University Greater Noida India Karpagam Academy of Higher Education Department of Computer Science Engineering Coimbatore India Excel Engineering College Department of Eee Komarapalayam India

ISBN: (纸本)9798331542375

关键词： Big Data Congestion Reduction Data-Driven Insights Energy Demand Reduction Performance Metrics Real-Time Analytics Smart City Sustainable Urban Development Traffic Speed Urban Environment

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Accelerating Traditional Object Detection Methods on Sophisticated Embedded Systems 4th

Accelerating Traditional Object Detection Methods on Sophis...

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4th international conference on Intelligent Systems and Pattern Recognition, ISPR 2024

作者： Sehairi, Kamal Bouhafs, Abdelkader Boucherit, Ibtissam Mama Bouwmans, Thierry Chouireb, Fatima Department of Physics Laboratory of Applied Sciences and Didactics École Normale Supérieure de Laghouat Laghouat Algeria Department of Electronics Telecommunication Signals and Systems Laboratory University Amar Telidji of Laghouat Laghouat Algeria Department of Computer Science Lab. Mathématiques Image et Applications Université de La Rochelle La Rochelle France

ISBN: (纸本)9783031821523

Identifying and locating objects in images and videos, including elements like traffic signs, vehicles, buildings, and people, constitutes a fundamental and demanding task in computer vision, known as object detection. Due to the higher computing complexity of this technique and the large amount of data carried by the video signal, it is nearly impossible for ordinary general-purpose processors GPPs or CPUs to run these techniques in real-time, especially for embedded systems applications. Therefore, special hardware that can acquire, control, or execute in parallel is required. These specialized hardware systems include Digital Signal Processors DSPs, Field Programmable Gate Arrays FPGAs, Visual processing Units VPUs, Tensor processing Units TPUs, Neural processing Units NPUs or Graphics processing Units GPUs. This work presents the benefits of accelerating traditional object detection methods on a high-end embedded system, the Jetson Nano Developer Kit. This single computer board is equipped with the Tegra K1 System on Chip SoC, which is composed of a quad-core ARM A15 and 192 cores of Kepler-embedded GPU. Computing acceleration was ensured via the use of the CUDA OpenCV library for both the Histogram of Oriented Gradients HOG and the Haar Cascade Classifier. For VGA resolution, results reveal that the GPU implementation on this embedded system is 1.4× faster than the CPU for the HOG method and 2× for the Haar Cascade Classifier method. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： System-on-chip

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Edge AI in 6G: Vision, Technologies, and applications

Edge AI in 6G: Vision, Technologies, and Applications

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Pervasive Computational Technologies (ICPCT), international conference on

作者： Vanessa Azucena Monzón Centeno Jesús Emilio Agustín Padilla Caballero Claudia Rossana Poma García Jonathan Orihuela Flores Wilmer Amado Huamán Malca Carlos Alberto Ferrando Gómez Escuela de Posgrado Universidad César Vallejo Lima Perú Pregrado Universidad Nacional de Educación Enrique Guzmán y Valle Lima Perú Pregrado Universidad Nacional del Callao Callao Perú

ISBN: (数字)9798331508685

ISBN: (纸本)9798331519476

The development of wireless connections is being pushed by an unprecedented rise of artificial intelligence (AI) software, with 6G becoming a game-changing technology. However advanced artificial intelligence (AI) needs a lot of connectivity and processing power, which causes delays, energy waste, network traffic, and privacy breaches. By combining sensing, interaction, computing, and intellect, Edge AI—which incorporates model learning and reasoning capacities at the connection's edge—offers an innovative approach for 6G network deployments. With an emphasis on distributed machine learning algorithms and incorporated wireless networking protocols, this article offers a vision for sustainable and reliable edge artificial intelligence (AI) systems. To fit edge AI, the article also covers novel design concepts, service-driven utilization techniques for optimizing, and a complete end-to-end system framework.

关键词： 6G mobile communication Wireless communication Wireless sensor networks Edge AI Telecommunication traffic Software Sensors Reliability Internet of Things Artificial intelligence

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Indian Sign Language Alphanumeric Hand Gestures Recognition Using Deep Learning techniques

Indian Sign Language Alphanumeric Hand Gestures Recognition ...

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Advanced Research in Computing (ICARC), international conference on

作者： Shakana Mahendran Ramya Mahendran Department of Physical Science FAS Vavuniya Campus of the University of Jaffna Vavuniya Sri Lanka Information Technology Center Trincomalee Campus EUSL. Trincomalee Sri Lanka

ISBN: (数字)9798331530983

ISBN: (纸本)9798331530990

Alphanumeric sign language recognition plays a vital role in enabling effective communication between individuals who are deaf and the general population. This research focuses on classifying alphanumeric hand gestures in Indian Sign Language using real-time image processing. The study collects diverse hand shape images captured under varying backgrounds and lighting conditions, making it suitable for real-world applications. In the preprocessing stage, images are cropped and resized to a standardized 128×128 pixel format to ensure uniformity in the dataset. A two-pronged approach is adopted to classify the collected images. Sequential and parallel CNNs are employed to capture spatial and channel information effectively. Additionally, a channel attention module enhances the model’s ability to identify crucial channel information. The Deep Convolutional Neural Network (DCNN) employed in this study achieved remarkable accuracy, reaching 99.976%. This outcome demonstrates the superior performance of this approach compared to other classification methods, whether utilizing real-time or non-laboratory experimental data. This research contributes to developing an efficient, accurate, and cost-effective system for classifying alphanumeric signs in Indian Sign Language. It facilitates easy and fast communication between individuals who are deaf and those who are not, promoting inclusive interactions.

关键词： Hands Training Deep learning Sign language Accuracy Shape Computational modeling Real-time systems Stability analysis Convolutional neural networks

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parallel N-Body Performance Comparison: Julia, Rust, and More 30th

Parallel N-Body Performance Comparison: Julia, Rust, and Mo...

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作者： Lewis, Mark C. Garcia, Clarissa Tollett, Audrey Aguirre, Seven Hafner, Henry McMahon, John Sickafoose, Amanda A. Trinity University San AntonioTX78212 United States Planetary Science Institute TucsonAZ85719 United States

ISBN: (纸本)9783031856372

This paper explores parallelism performance for C, C++, Go, Java, Julia, and Rust on N-body simulations. We begin with a basic O(N2) simulation for each language based on the n-body benchmark in the Benchmark Game. The original benchmark is adjusted to include a larger number of particles and run in parallel. We also add parallelism to the force calculations using a kD-tree. This work builds on previous work by including parallelism and adding the Julia programming language to our survey. We find that for straight number-crunching, all of these languages provide similar performance, and all have sufficient support for parallelism that runtimes scale well with thread counts. On the other hand, when a spatial data structure, such as the kD-tree, is introduced, the runtimes vary dramatically between languages. In that situation, Julia’s performance looks more like Python, taking over 100 times as long as Rust/C/C++ to finish. Rust comes out on top with an impressive 50% lead over C and C++. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： C++ (programming language)

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DV Emotion Net: A Sub-Study on Emotion Detection Model Performance Across P100, T4, and TPU VM V3-8

DV Emotion Net: A Sub-Study on Emotion Detection Model Perfo...

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Sentiment Analysis and Deep Learning (ICSADL), international conference on

作者： Dhiren Dommeti Siva Ramakrishna Nallapati Rand Alfaris School of Professional Studies (SPS) Clark University Worcester Massachusetts USA

ISBN: (数字)9798331523923

ISBN: (纸本)9798331523930

This study evaluates the performance of different hardware configurations-GPU P100, GPU T4, and TPU VM v3-8-in the context of emotion detection using the DV EmotionNet framework. Building on prior research that integrates audio and video modalities for emotion recognition, the analysis explores how each hardware setup influences model efficiency and accuracy. Audio features were extracted using techniques such as energy, zero crossing rate, and Mel-Frequency Cepstral Coefficients (MFCC), while video features were obtained through spatial-temporal Gaussian kernels and Gaussian-weighted functions applied to the second momentum matrix. The Multimodal Feature Aggregation (MFA) method was employed to fuse the audio and video features, creating a comprehensive dataset. The evaluation utilized the Fusion of Emotion Recognition Convolutional Neural Network (FERCNN) model, focusing on the impact of accelerators on performance metrics. Recent advancements often face challenges like high computational costs, scalability issues, and sensitivity to noisy data. This study addresses these challenges by systematically evaluating the computational efficiency and accuracy trade-offs across different hardware accelerators. Results from the RAVDESS and CREMAD datasets revealed notable differences in accuracy, with the P100 demonstrating superior performance on simpler tasks, while TPU VM v3-8 excelled in more complex scenarios. These findings highlight the significance of hardware choice in optimizing multimodal emotion recognition systems, reinforcing the critical role of effective computational resources in enhancing applications across various domains, including human-computer interaction, healthcare, and entertainment.

关键词： Training Emotion recognition Accuracy Fluctuations Computational modeling Graphics processing units parallel processing Hardware Computational efficiency Testing

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