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CAM Based With-Memory Computing for ALU Operations

CAM Based With-Memory Computing for ALU Operations

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IEEE India conference (INDICON)

作者： C Sri Vardhan B N H Nandan P Tej Kumar N Teja Krishna Rangababu Peesapati Vijayakumar Devarakonda Department of ECE IIITDM Kurnool India

ISBN: (数字)9798350391282

ISBN: (纸本)9798350391299

Memory Computing (M-C) is a rapidly growing paradigm designed to overcome the problems caused by traditional Von-Neumann architectures and is highly advantageous for big data computing applications. Leveraging Content Addressable Memory (CAM) to perform memory computing improves the latency and throughput as it can concurrently search through multiple Look-Up Tables (LUTs) containing the precomputed results. SRAM-based CAM design suggests the integration of WMC architectures with rapid search operations, enriching efficiency and performance for various ALU operations. In this work, several arithmetic and logical computations involving word lengths of 32-bit, 64-bit and 128-bit are proposed using Bit-Serial & Word-parallel (BS-WP) and Bit-parallel & Word-Serial (BP-WS) techniques. BS-WP can be used for performance efficient operations, while WS-BP can be used for resource efficient operations. Results indicate the maximum operational frequency goes up to 1.85 GHz for the boolean operations. BS-WP approach can obtain a speedup of 2.03 times in terms of frequency for 128-bit addition, achieving an improvement of 50.76% in performance. Also, the power consumption can be reduced upto 86% utilizing BP-WS technique.

关键词： Associative memory Time-frequency analysis Single instruction multiple data Random access memory Computer architecture Signal processing Throughput Table lookup Registers Pipeline processing

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Satellite Image Classification using Convolutional Neural Network with Huber Loss Function for Land Cover Mapping in Forest Ecosystem

Satellite Image Classification using Convolutional Neural Ne...

引用

distributed Systems, Computer Networks and Cybersecurity (ICDSCNC), international conference on

作者： Ramy Riad Al-Fatlawy P. Raviprakash Gummagatta Yajaman Vybhavi Sripelli Jagadish S Meenakshi Sundaram Department of Computers Techniques Engineering College of Technical Engineering The Islamic University Najaf Iraq Malla Reddy Engineering College for Women (UGC-Autonomous) Hyderabad India Department of CSE Gokaraju Rangaraju Institute of Engineering and Technology Bachupally Hyderabad India School of Computer Science & Artificial Intelligence SR University Warangal India Department of CSE Nitte Meenakshi Institute of Technology Bengaluru India

ISBN: (数字)9798350375442

ISBN: (纸本)9798350375459

Satellite image classification for land cover involves determining high-resolution imagery to recognize and classify various types of land covers. This process assists in monitoring forest health, managing resources, and assessing biodiversity effectively. However, accurately classifying images for land cover is difficult because of diverse and complex nature of forest environments and varying image qualities. In this research, the Convolutional Neural Network with Huber Loss Function (CNN-HLF) is proposed to classify the satellite images accurately for landcover mapping in forest ecosystem. The CNN-HLF effectively manage the variability and complexity of forest environments which improves the performance of land cover. Initially, the Eurosat dataset is used to determine the CNN-HLF performance. Resizing and image sharpening is applied to adjust the size and enhance the clarity of features. DenseNet201 is employed for extracting features effectively from pre-processed images. The proposed CNN-HLF achieves a high accuracy of 99.87% using Eurosat dataset compared to existing methods like GoogleNet with pre-processing and Lightweight parallel CNN (LPCNN).

关键词： Training Accuracy Ecosystems Land surface Forestry Feature extraction Stability analysis Robustness Satellite images Convolutional neural networks

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Design of ASIC accelerators for AI applications

Design of ASIC accelerators for AI applications

引用

international conference on Electrical Engineering and Intelligent Control (EEIC 2024)

作者： Bofei Liang School of Energy and Electrical Engineering Chang'an University Xian People's Republic of China

ISBN: (数字)9781837242160

This paper explores the advantages, architectural advancements, and challenges of ASIC (Application-Specific Integrated Circuits) accelerators in AI applications. Firstly, it provides an in-depth analysis of ASICs compared to different architectures. Due to their specialized design, ASICs exhibit significant advantages in performance and energy efficiency. For instance, architectures like DianNao and DaDianNao excel in handling large-scale neural networks by optimizing data locality and employing tiling techniques. In contrast, GPUs, while excellent in parallel processing, consume more power due to their general-purpose nature. FPGAs strike a balance between computational speed and energy consumption. The paper then delves into the Google TPU as a pivotal case study of ASIC accelerator design architecture for AI applications. The TPU's matrix multiplication unit and high-bandwidth memory optimizations enable high computational throughput and energy efficiency in neural network computations. TPUv4i further enhances performance by incorporating more matrix multiplication units and leveraging compiler optimizations, while also reducing thermal design power for global deployment. Innovations such as Optical Circuit Switching (OCS) and SparseCore integration significantly improve TPUv4's system scale, availability, and performance. Finally, the paper addresses the challenges of ASIC accelerators in AI applications. In high-radiation environments, edge-AI ASICs require radiation-hardened features to ensure reliable performance. In summary, ASICs provide unparalleled performance and energy efficiency owing to their specialized design, but they encounter challenges in high-radiation environments and thermal management. Through ongoing architectural innovations and technological optimizations, ASICs are well-positioned to play a pivotal role in the future of AI hardware design.

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TCP-Based distributed Offloading Architecture for the Future of Untethered Immersive Experiences in Wireless Networks 22

TCP-Based Distributed Offloading Architecture for the Future...

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2022 ACM international conference on Interactive Media Experiences, IMX 2022

作者： González Morín, Diego López Morales, Manuel J. Pérez, Pablo Villegas, Alvaro Nokia Xr Lab Madrid Spain Universidad Carlos Iii Madrid Spain

ISBN: (纸本)9781450392129

Task offloading has become a key term in the field of immersive media technologies: it can enable lighter and cheaper devices while providing them higher remote computational capabilities. In this paper we present our TCP-based offloading architecture. The architecture, has been specifically designed for immersive media offloading tasks with a particular care in reducing any processing overhead which can degrade the network performance. We tested the architecture for different offloading scenarios and conditions on two different wireless networks: WiFi and 5G millimeter wave technologies. Besides, to test the network on alternative millimeter wave configurations, currently not available on the actual 5G millimeter rollouts, we used a 5G Radio Access Network (RAN) real-time emulator. This emulator was also used to test the offloading architecture for an simulated immersive user sharing network resources with other users. We provide insights of the importance of user prioritization techniques for successful immersive media offloading. The results show a great performance for the tested immersive media scenarios, highlighting the relevance of millimeter wave technology for the future of immersive media applications. © 2022 ACM.

关键词： Augmented reality

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Generic and ML Workloads in an HPC Datacenter: Node Energy, Job Failures, and Node-Job Analysis

Generic and ML Workloads in an HPC Datacenter: Node Energy, ...

引用

international conference on parallel and distributed Systems (ICPADS)

作者： Xiaoyu Chu Daniel Hofstätter Shashikant Ilager Sacheendra Talluri Duncan Kampert Damian Podareanu Dmitry Duplyakin Ivona Brandic Alexandru Iosup Vrije Universiteit Amsterdam the Netherlands TU Wien Vienna Austria SURF Amsterdam the Netherlands National Renewable Energy Laboratory Colorado USA

ISBN: (数字)9798331515966

ISBN: (纸本)9798331515973

HPC datacenters offer a backbone to the modern digital society. Increasingly, they run Machine Learning (ML) jobs next to generic, compute-intensive workloads, supporting science, business, and other decision-making processes. However, understanding how ML jobs impact the operation of HPC datacenters, relative to generic jobs, remains desirable but understudied. In this work, we leverage long-term operational data, collected from a national-scale production HPC datacenter, and statistically compare how ML and generic jobs can impact the performance, failures, resource utilization, and energy consumption of HPC datacenters. Our study provides key insights, e.g., ML-related power usage causes GPU nodes to run into temperature limitations, median/mean runtime and failure rates are higher for ML jobs than for generic jobs, both ML and generic jobs exhibit highly variable arrival processes and resource demands, significant amounts of energy are spent on unsuccessfully terminating jobs, and concurrent jobs tend to terminate in the same state. We open-source our cleaned-up data traces on Zenodo (https://doi. org/10.5281/zenodo.13685426), and provide our analysis toolkit as software hosted on GitHub (https://***/atlarge-research/2024-icpads-hpc-workload-characterization). This study offers multiple benefits for data center administrators, who can improve operational efficiency, and for researchers, who can further improve system designs, scheduling techniques, etc.

关键词： Measurement Energy consumption Runtime Graphics processing units Production Machine learning Software Resource management System analysis and design Software development management

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Energy-Efficient Lane Identification Module with Sliding-Based parallel Segment Recognition Accelerator for FPGA

Energy-Efficient Lane Identification Module with Sliding-Bas...

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international conference on Computer and Communications Technologies (ICCCT)

作者： T. Karpagalakshmi M. Malathi Department of Electronics and Communication Engineering Adhiparasakthi Engineering College Melmaruvathur India

ISBN: (数字)9798331537579

ISBN: (纸本)9798331537586

Lane detection is an emerging technology integrated into vehicles to facilitate autonomous navigation. Most existing Lane recognition systems are developed for well-structured roads, trusting on the presence of lane patterns. To address this limitation, we propose a sliding-based K-means parallel segment image dispensation approach. Since most onboard systems in autonomous vehicles are lightweight, the method is optimized to minimize computational load and power consumption. Lane identification is achieved by applying a Hough transform to an image where edge finding has been performed concurrently. The primary goal of edge detection is to recognize and pinpoint abrupt changes in pixel intensity, which define object boundaries and distinct elements within a scene. Various implementations of the Canny algorithm exist, as boundary detection serves as a fundamental step in many computer vision applications, such as edge-based obstacle recognition, facial recognition, target detection, and image compression. These computational techniques help distinguish vertical, flat, step, and corner edges. The effectiveness of edge detection depends on factors like lighting conditions, noise levels, edge density, and intensity variations within the image. Consequently, achieving precise boundary localization is crucial. Therefore, computational methods must account for these intensity fluctuations to establish accurate edge detection correlations. Ultimately, the process ensures lane detection with reduced noise, improved contrast boundaries, and optimized processing time.

关键词： Image segmentation Computer vision Lane detection Image edge detection Roads Face recognition Lighting Transforms Energy efficiency Field programmable gate arrays

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Loupe: A Visualization Tool for High-Level Execution Plans in SystemDS 26th

Loupe: A Visualization Tool for High-Level Execution Plans i...

引用

26th international conference on Database Systems for Advanced applications (DASFAA)

作者： Xu, Zhizhen Chen, Zihao Xu, Chen East China Normal Univ Shanghai Engn Res Ctr Big Data Management Sch Data Sci & Engn Shanghai Peoples R China Sci & Technol Parallel & Distributed Proc Lab PDL Changsha Peoples R China

ISBN: (纸本)9783030731991;9783030732004

The declarative programming language in SystemDS simplifies users to implement machine learning algorithms. It is able to generate execution jobs on different data processing engines including MapReduce and Spark. The GUI in data processing engines typical visualizes the low-level execution process (e.g., RDD transformation in Spark). However, the low-level description in Spark GUI does not show the relationship between DML operations and RDD primitives. In this work, we propose Loupe, a tool to visualize high-level execution plans in SystemDS to ease users to understand the execution process. This paper introduces the design of the tool and demonstrates a visualization case.

关键词： SystemDS Execution plan Visualization

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DCSA: The Deployment Mechanism of Chained Serverless applications in JointCloud Environment

DCSA: The Deployment Mechanism of Chained Serverless Applica...

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IEEE international conference on Joint Cloud Computing (JCC)

作者： Yaojie Li Peichang Shi Jianfei Liu Rui Li Fei Gao Penghui Ma Dong Xie Guodong Yi National Key Laboratory of Parallel and Distributed Processing College of Computer Science National University of Defense Technology Changsha China Xiangjiang Lab Changsha China School of Advanced Interdisciplinary Studies Hunan University Of Technology and Business Changsha China

ISBN: (数字)9798350387339

ISBN: (纸本)9798350387346

Serverless computing, comprised of Function as a Service (FaaS) and Backend as a Service (BaaS), has garnered widespread attention owning to its features such as maintenance-free operations, pay-per-use pricing, and automatic scalability. However, practical usage encounters several challenges: 1) The diversity of user applications makes comprehensive performance evaluation difficult, as benchmark and application tests only reflect performance under specific conditions and cannot fully capture users’ actual experiences across different serverless platforms. 2) Disparities in performance and costs across different serverless platforms make it challenging to achieve optimal performance and cost efficiency through single-cloud deployment, thereby underutilizing the advantages of each platform. 3) Vendor lock-in issues restrict the migration of user applications and exacerbate dependence on a single cloud *** address these challenges, this paper proposes a collaborative mechanism, referred to as DCSA, which integrates FaaS and storage services to achieve automatic cross-cloud deployment of user applications while considering both performance and cost comprehensively. Firstly, we adapt the interfaces of different serverless platforms, effectively reducing the complexity of cross-cloud deployment. Secondly, we develop cost and latency models for the cross-cloud deployment of chained serverless applications and propose a deployment scheduling algorithm that simultaneously considers both latency and cost. Finally, we conduct experiments to evaluate the performance of the proposed algorithm. Results demonstrate that our method can effectively reduce latency (up to 2.3%) and lower costs (up to 9.9%).

关键词： Performance evaluation Adaptation models Costs Scheduling algorithms Scalability Serverless computing Collaboration

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Using parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study 28

Using Parallel Programming Models for Automotive Workloads o...

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28th Euromicro international conference on parallel, distributed and Network-Based processing (PDP)

作者： Sommer, Lukas Stock, Florian Solis-Vasquez, Leonardo Koch, Andreas Tech Univ Darmstadt Embedded Syst & Applicat Grp Darmstadt Germany

ISBN: (纸本)9781728165820

Due to the ever-increasing computational demand of automotive applications, and in particular autonomous driving functionalities, the automotive industry and supply vendors are starling to adopt parallel and heterogeneous embedded platforms for their products. However, C and C++, the currently dominating programming languages in this industry, do not provide sufficient mechanisms to target such platforms. Established parallel programming models such as OpenMP and OpenCI, on the other hand are tailored towards HPC systems. In this case study, we investigate the applicability of established parallel programming models to automotive workloads on heterogeneous platforms. We pursue a practical approach by re-enacting a typical development process for typical embedded platforms and representative benchmarks.

关键词： embedded automotive parallel programming heterogeneous OpenMP OpenCL CUDA

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distributed Acoustic Sensing for Vehicle Speed and Traffic Flow Estimation

Distributed Acoustic Sensing for Vehicle Speed and Traffic F...

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IEEE Intelligent Transportation Systems conference (ITSC)

作者： Wiesmeyr, Christoph Coronel, Carmina Litzenberger, Martin Doeller, Herbert Josef Schweiger, Hans-Bernhard Calbris, Gaetan AIT Austrian Inst Technol GmbH Vienna Austria Dr Doller Vermessung ZT GmbH Vienna Austria Febus Opt Pau France

ISBN: (纸本)9781728191423

For traffic monitoring systems it is desirable to have a low-cost, low-maintenance, and reliable system to facilitate continuous and safe traffic flow. In line with this, we introduce distributed acoustic sensing (DAS) for traffic monitoring applications. In DAS systems, series of light pulses are transmitted along a fiber-optic cable and the back-scattered light, which is affected by the mechanical strain of the fiber-optic cables due to ground vibrations, is measured and analyzed. With fiber-optic cables installed parallel to a highway where ground vibrations are induced by passing vehicles, traffic information such as vehicle flow and average speeds can be estimated from the DAS signals. In this paper, we present an algorithm based on image processing methods that estimates traffic information from image representations generated from 1-minute segments of DAS signals. We tested the results of the algorithm on DAS data recording on a real highway against reference traffic data measured by road-side sensors.

关键词： Vibrations Optical fiber sensors Roads Optical fiber cables Estimation Mechanical cables Image representation

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