In this paper a new framework PMF for the development of parallel 3D mesh generation algorithms is presented allowing an efficient execution on SMP compute nodes. This paper focuses on the global architecture of the f...
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ISBN:
(纸本)1932415262
In this paper a new framework PMF for the development of parallel 3D mesh generation algorithms is presented allowing an efficient execution on SMP compute nodes. This paper focuses on the global architecture of the framework, on an unique parallel data structure for mesh object management, and on basic and common algorithms for subtasks of a meshing method.
The rapidly advancing fields of machine learning and mathematical modeling, greatly enhanced by the recent growth in artificial intelligence, are the focus of this special issue. This issue compiles extensively revise...
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The rapidly advancing fields of machine learning and mathematical modeling, greatly enhanced by the recent growth in artificial intelligence, are the focus of this special issue. This issue compiles extensively revised and improved versions of the top papers from the workshop on Mathematical Modeling and Problem Solving at PDPTA'23, the 29th international conference on parallel and distributed processing techniques and applications. Covering fundamental research in matrix operations and heuristic searches to real-world applications in computer vision and drug discovery, the issue underscores the crucial role of supercomputing and parallel and distributed computing infrastructure in research. Featuring nine key studies, this issue pushes forward computational technologies in mathematical modeling, refines techniques for analyzing images and time-series data, and introduces new methods in pharmaceutical and materials science, making significant contributions to these areas.
In this paper we give a parallel solution to the point location problem. Its running time is Theta(n) using Theta(1) communication cycle on optical bus system of n processors. This algorithm uses as better as possible...
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ISBN:
(纸本)1932415262
In this paper we give a parallel solution to the point location problem. Its running time is Theta(n) using Theta(1) communication cycle on optical bus system of n processors. This algorithm uses as better as possible the main characteristic of optical bus system: the pipeline communication principle.
As the computation cost increases to meet the design requirements for computation-intensive applications on todays systems, the pressure to develop high performance parallel processors on a chip will increase. Network...
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ISBN:
(纸本)9780769543284
As the computation cost increases to meet the design requirements for computation-intensive applications on todays systems, the pressure to develop high performance parallel processors on a chip will increase. Network-on-Chip (NoC) techniques that interconnect multiple processing elements with routers are the solution for reducing computation time and power consumption by parallelprocessing on a chip. The shared communication platform is also essential to meet the scalability and complexity challenges for System-on-Chip (SoC). However not many parallelapplications have been studied for such an architecture and workload characterizations have not been researched to benefit the architecture design optimization. In this paper, we study multiple data-parallelapplications on a multicore NoC architecture with distributed memory space. We introduce an efficient runtime workload distribution algorithm that balances workloads of parallel processors and apply for selected embedded applications. Using our cycle accurate multicore simulator, we simulated our NoC-enabled multicore architecture model and executed data-parallelapplications on various number of processing elements using the proposed runtime load balancing algorithm and analyzed performance and communication overheads.
Spiral Architecture is a relatively new and powerful approach to general-purpose machine vision system. n this novel architecture, Spiral Addition and Multiplication achieve image processing. As we all nown, fractal i...
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ISBN:
(纸本)1932415610
Spiral Architecture is a relatively new and powerful approach to general-purpose machine vision system. n this novel architecture, Spiral Addition and Multiplication achieve image processing. As we all nown, fractal image compression methods have maximal image compression ratio, at the cost Of slow coding speed. This paper presents an algorithm to achieve high image compression ratio without slow coding speed on Spiral Architecture, which also improves the Spiral Architecture s usage in image processing.
This paper describes an object-oriented framework for solving computational fluid dynamics problems on parallel computers. The design and components of the framework are discussed related to design patterns methodolog...
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ISBN:
(纸本)1892512459
This paper describes an object-oriented framework for solving computational fluid dynamics problems on parallel computers. The design and components of the framework are discussed related to design patterns methodology. The proposed framework offers higher-level programming abstractions for parallelization and improves the overall efficiency of implementation.
The use of Web-Based Geographic Information System (Web-Based GIS) with spatial data has become popular and has played an important role in managing resources of humans. However, there are limitations on using this sy...
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ISBN:
(纸本)1932415610
The use of Web-Based Geographic Information System (Web-Based GIS) with spatial data has become popular and has played an important role in managing resources of humans. However, there are limitations on using this system with a typical large size of GIS datasets and complex calculation of GIS functions. In this paper, we propose a new version of Web-Based GIS by applying the parallelprocessing technique to improve the efficiency of data processing. MapServer, which is an open source Web-Based GIS, is used as an original program. Moreover, to develop the parallelprocessing technique, MPI is applied as a standard library. By combining the parallelprocessing technique and MapServer, the new system called parallel MapServer has increasing efficiency of data processing with less than or equal to 12 processors.
Visualization has played a significant role in understanding the behavior of distributed programs. We propose a visualization that shows message exchanges in distributed logic programs using the Program Structure View...
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ISBN:
(纸本)1892512459
Visualization has played a significant role in understanding the behavior of distributed programs. We propose a visualization that shows message exchanges in distributed logic programs using the Program Structure View in NaraView. The behavior of distributed logic programs is easily visualized using the Program Structure View since the messages have three parametric factors: time, derivation, and hierarchical level.
Chip Multi-processing (CMP) is emerging as the next frontier for parallel computers due to the increasing availability of on-die transistors. In order to make the right architectural choices for CMP, we need to unders...
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ISBN:
(纸本)1932415610
Chip Multi-processing (CMP) is emerging as the next frontier for parallel computers due to the increasing availability of on-die transistors. In order to make the right architectural choices for CMP, we need to understand the application characteristics which limit the exploitable parallelism and performance scaling in existing SMP/SMT technologies. Todays E-commerce applications that use Secure Socket Layer (SSL) can benefit from this new form of parallelprocessing. In this paper, we analyze the performance characteristics of a SPECweb99_SSL like workload for a Windows 2003 web server running on an Intel (R) Xeon (TM) platform. We look into the scaling behavior for single and dual processors, with and without Hyper Threading technology enabled. We then profile the Web server components to identify the bottlenecks for SSL processing. We believe that learnings from this study can help towards making architectural recommendations for SMP platforms and evolving CMP architectures for efficiently running certain types of parallelapplications, including e-commerce applications.
Scientific applications often contain large computationally-intensive parallel loops. Loop scheduling techniques aim to achieve load balanced executions of such applications. For distributed-memory systems, existing d...
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ISBN:
(纸本)9781728116440
Scientific applications often contain large computationally-intensive parallel loops. Loop scheduling techniques aim to achieve load balanced executions of such applications. For distributed-memory systems, existing dynamic loop scheduling (DLS) libraries are typically MPI-based, and employ a master-worker execution model to assign variably-sized chunks of loop iterations. The master-worker execution model may adversely impact performance due to the master-level contention. This work proposes a distributed chunk-calculation approach that does not require the master-worker execution scheme. Moreover, it considers the novel features in the latest MPI standards, such as passive-target remote memory access, shared-memory window creation, and atomic read-modify-write operations. To evaluate the proposed approach, five well-known DLS techniques, two applications, and two heterogeneous hardware setups have been considered. The DLS techniques implemented using the proposed approach outperformed their counterparts implemented using the traditional master-worker execution model.
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