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检索条件"任意字段=International Conference on Parallel and Distributed Processing Techniques and Applications"

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Energy efficient techniques using FFT for deep convolutional neural networks 9

Energy efficient techniques using FFT for deep convolutional...

引用

9th international conference on Advanced Technologies for Communications, ATC 2016

作者： Nguyen-Thanh, Nhan Le-Duc, Han Ta, Duc-Tuyen Nguyen, Van-Tam CNRS Télécom ParisTech Université Paris Saclay Paris75013 France Department of Electrical Engineering Stanford University StanfordCA94305 United States

ISBN: (纸本)9781509027101

Deep convolutional neural networks (CNNs) has been developed for a wide range of applications such as image recognition, nature language processing, etc. However, the deployment of deep CNNs in home and mobile devices remains challenging due to substantial requirements for computing resources and energy needed for the computation of high-dimensional convolutions. In this paper, we propose a novel approach designed to minimize energy consumption in the computation of convolutions in deep CNNs. The proposed solution includes (i) an optimal selection method for Fast Fourier Transform (FFT) configuration associated with splitting input feature maps, (ii) a reconfigurable hardware architecture for computing high-dimensional convolutions based on 2D-FFT, and (iii) an optimal pipeline data movement scheduling. The FFT size selecting method enables us to determine the optimal length of the split input for the lowest energy consumption. The hardware architecture contains a processing engine (PE) array, whose PEs are connected to form parallel flexible-length Radix-2 single-delay feedback lines, enabling the computation of variable-size 2D-FFT. The pipeline data movement scheduling optimizes the transition between row-wise FFT and column-wise FFT in a 2D-FFT process and minimizes the required data access for the elementwise accumulation across input channels. Using simulations, we demonstrated that the proposed framework improves the energy consumption by 89.7% in the inference case. © 2016 IEEE.

关键词： Convolution

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Refactoring Conventional Task Schedulers to Exploit Asymmetric ARM *** Architectures in Dense Linear Algebra

Refactoring Conventional Task Schedulers to Exploit Asymmetr...

引用

IEEE international Symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Luis Costero Francisco D. Igual Katzalin Olcoz Sandra Catalán Rafael Rodríguez-Sánchez Enrique S. Quintana-Ortí Dept. Arquitectura de Computadores y Automática Universidad Complutense de Madrid Madrid Spain Dept. Ingeniería y Ciencia de los Computadores Universidad Jaume I de Castellón Castellón Spain

ISBN: (纸本)9781509036837

Dealing with asymmetry in the architecture opens a plethora of questions from the perspective of scheduling task-parallel applications for which there exist early ad-hoc strategies embedded into an asymmetry-conscious runtimes. In this paper we take a different path that addresses the complexity of the problem at the library level, via a few asymmetry-aware fundamental kernels, hiding the architecture heterogeneity from the task scheduler. For the specific domain of dense linear algebra, we show that this elegant solution delivers much higher performance than a naive approach based on an asymmetry-oblivious scheduler. Furthermore, this solution also outperforms an ad-hoc asymmetry-aware scheduler furnished with sophisticated scheduling techniques.

关键词： Runtime Kernel Multicore processing parallel processing Program processors Linear algebra

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Massively parallel technologies based on microelectromechanical systems for improving effective functioning of the aircraft

Massively parallel technologies based on microelectromechani...

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IEEE international conference on Methods and Systems of Navigation and Motion Control (MSNMC)

作者： Tovkach Serhii National Aviation University Kyiv Ukraine

ISBN: (纸本)9781509010547

The problem of development adaptive control systems based on microelectromechanical systems for reduce turbulent flow of the aircraft has been considered. Complex solution based on microelectromechanical systems and graphic processing platform NVIDIA Tegra, which includes massively parallel technology, has been proposed. It develops parallel processing software based on algorithms that delivers scaling and speed up on distributed memory systems for high performance applications. The distributed microelectromechanical systems technique involves spreading integrated sense-compute-act modules over areas to sense the physical world and act upon it. Tiny elements can reduce drag by sensing vortices and interacting with them. It will help to reach better maneuverability, increase the range of aircraft payload and capability.

关键词： Mathematical model Graphics processing units Aerospace control Computational modeling Aircraft Acceleration Aircraft navigation

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A Flexible Profiling Sub-System for Reconfigurable Logic Architectures

A Flexible Profiling Sub-System for Reconfigurable Logic Arc...

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Euromicro conference on parallel, distributed and Network-Based processing

作者： G. Valente V. Muttillo L. Pomante F. Federici M. Faccio A. Moro S. Ferri C. Tieri DEWS Center of Excellence Università Degli Studi Dell'Aquila L'Aquila Italy

In recent years, embedded applications have been characterized by increasingly stringent requirements, both from functional and non-functional point of view. This led to the adoption of complex hardware platforms (multi-core and many-core architectures), able to guarantee high computational power with low energy consumption and reduced footprint. An efficient characterization of these platforms can be problematic, given the large number of hardware resources and the complexity of software applications. For this reason, the need for a runtime analysis support should be taken in account during the design phase (a design "for monitorability"). This paper introduces "Adaptive Profiling Hardware Sub-system" (AIPHS), a hardware profiling tool supporting the development of runtime monitorable systems. Two different multicore platforms are considered in order to evaluate AIPHS functionalities: an asymmetric dual-MicroBlaze system and a quad-Leon3 system supporting symmetric multiprocessing.

关键词： FPGAs Leon3 MicroBlaze Multi-core architectures OpenMP Profiling core construction symmetric multiprocessor Reconfigurable logic Field programmable gate arrays ARCHITECTURE hardware resource applications software low energy consumption computational power Platform design phases Runtime

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Cyclone: Unified Stream and Batch processing

Cyclone: Unified Stream and Batch Processing

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international conference on parallel processing Workshops (ICPPW)

作者： Matú Harvan Thomas Locher Ana Claudia Sima ABB Corporate Research Bäden-Dattwil Switzerland EPFL Lausanne Switzerland

ISBN: (纸本)9781509028269

Due to the rising demand for large-scale data processing, there is a growing interest in both batch processing, where large volumes of data are processed offline, and stream processing, where large quantities of streaming data are processed online. The dichotomy between these vastly different computing paradigms has led to the development of substantially different methodologies and systems. As there is an increasing number of applications requiring stream and batch processing, there is a need to bridge this gap and offer support for both paradigms. We introduce a new direction for the unification of stream and batch processing, which, contrary to other proposed approaches, uses a stream processing platform as its foundation and supports batch processing on top. Our proof-of-concept implementation of such a middleware layer, called Cyclone, offers the widely popular MapReduce programming model and translates MapReduce jobs for execution on the underlying streaming platform. Cyclone not only achieves a tight integration of batch and stream processing, our evaluation further shows significant performance gains, in particular for sequential and iterative jobs, which naturally arise in many applications.

关键词： Cyclones Batch production systems Sparks Computer architecture Computational modeling distributed databases Topology

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Mystic: Predictive Scheduling for GPU Based Cloud Servers Using Machine Learning

Mystic: Predictive Scheduling for GPU Based Cloud Servers Us...

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international Symposium on parallel and distributed processing (IPDPS)

作者： Yash Ukidave Xiangyu Li David Kaeli Department of Electrical & Computer Engineering Northeastern University Boston USA

ISBN: (纸本)9781509021413

GPUs have become the primary choice of accelerators for high-end data centers and cloud servers, which can host thousands of disparate applications. With the growing demands for GPUs on clusters, there arises a need for efficient co-execution of applications on the same accelerator device. However, the resource contention among co-executing applications causes interference which leads to degradation in execution performance, impacts QoS requirements of applications and lowers overall system throughput. While previous work has proposed techniques for detecting interference, the existing solutions are either developed for CPU clusters, or use static profiling approaches which can be computationally intensive and do not scale well. We present Mystic, an interference-aware scheduler for efficient co-execution of applications on GPU-based clusters and cloud servers. The most important feature of Mystic is the use of learning-based analytical models for detecting interference between applications. We leverage a collaborative filtering framework to characterize an incoming application with respect to the interference it may cause when co-executing with other applications while sharing GPU resources. Mystic identifies the similarities between new applications and the executing applications, and guides the scheduler to minimize the interference and improve system throughput. We train the learning model with 42 CUDA applications, and consider another separate set of 55 diverse, real-world GPU applications for evaluation. Mystic is evaluated on a live GPU cluster with 32 NVIDIA GPUs. Our framework achieves performance guarantees for 90.3% of the evaluated applications. When compared with state-of-the art interference-oblivious schedulers, Mystic improves the system throughput by 27.5% on average, and achieves a 16.3% improvement on average in GPU utilization.

关键词： Graphics processing units Servers Interference Throughput Collaboration Processor scheduling Scheduling

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Optimization of complex SPARQL Analytical queries 19

Optimization of complex SPARQL Analytical queries

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19th international conference on Extending Database Technology, EDBT 2016

作者： Ravindra, Padmashree Kim, Hyeongsik Anyanwu, Kemafor Microsoft Corporation Redmond United States North Carolina State University Raleigh United States

ISBN: (纸本)9783893180707

Analytical queries are crucial for many emerging Semantic Web applications such as clinical-trial recruiting in Life Sciences that incorporate patient and drug profile data. Such queries compare aggregates over multiple groupings of data which pose challenges in expression and optimization of complex grouping-aggregation constraints. While these challenges have been addressed in relational models, the semi-structured nature of RDF introduces additional challenges that need further investigation. Each grouping required in an RDF analytical query maps to a graph pattern subquery with related groups leading to overlapping graph patterns within the same query. The resulting algebraic expressions for such queries contain large numbers of joins, groupings and aggregations, posing significant challenges for present-day optimizers. In this paper, we propose an approach for supporting efficient and scalable RDF analytics that follows the well known technique of simplifying algebraic expressions of RDF analytical queries in a way that enables better optimization. Specifically, the approach is based on a refactoring of analytical queries expressed in the relational-like SPARQL algebra based on a new set of logical operators. This refactoring achieves shared execution of common subexpressions that enables parallel evaluation of groupings as well aggregations, leading to reduced I/O and processing costs, particularly beneficial for scale-out processing on distributed Cloud systems. Experiments on real-world and synthetic benchmarks confirm that such a rewriting can achieve up to 10X speedup over relational-style SPARQL query plans executed on popular Cloud systems. © 2016, Copyright is with the authors.

关键词： distributed cloud

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Impact of Memory-Level parallelism on the Performance of GPU Coherence Protocols

Impact of Memory-Level Parallelism on the Performance of GPU...

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Euromicro conference on parallel, distributed and Network-Based processing

作者： Francisco Candel Salvador Petit Julio Sahuquillo José Duato Computer Engineering Department Universitat Politècnica de València Spain

Graphics processing Units (GPUs) are being implemented in heterogeneous CPU/GPU systems due their high efficiency when executing massively parallel applications. New challenges appear to deal with heterogenous coherence in these systems due to the huge amount (hundreds or thousands) of on-going memory requests of GPUs, which is limited by the Miss Status Holding Register (MSHR) file size associated to the L1 cache. This paper analyzes how the number of MSHRs i) affects to typical memory performance metrics and ii) impacts on the system performance under two recent GPU coherence protocols, called NMOESI and SI (Southern Islands), which introduce distinct coherence traffic. We find two key findings that can help improve the performance of coherence protocols. First, there is a strong correlation between system performance and memory subsystem latency regardless of the used protocol. Second, system performance varies with the number of supported cache misses, however, counterintuitively, supporting more cache misses does not always bring enhanced performance but it can turn into performance drops.

关键词： Protocols Silicon Graphics processing units Coherence Benchmark testing System performance

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Exploiting Very-Wide Vectors on Intel Xeon Phi with Lattice-QCD Kernels

Exploiting Very-Wide Vectors on Intel Xeon Phi with Lattice-...

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Euromicro conference on parallel, distributed and Network-Based processing

作者： Andreas Diavastos Giannos Stylianou Giannis Koutsou Computation-based Science and Technology Research Centre The Cyprus Institute Department of Computer Science University of Cyprus

Our target in this work is to study ways of exploring the parallelism offered by vectorization on accelerators with very wide vector units. To this end, we implemented two kernels that derive from the Wilson Dslash operator and investigate several data layout techniques for increasing the scalability of lattice QCD scientific kernels suitable for the Intel Xeon Phi. In parts of the application where real numbers are used for computation, we see a 6.6x increase in bandwidth compared to scalar code, thanks to the auto-vectorization by the compiler. In other kernels where arithmetic operations on complex numbers dominate, our hand-vectorized code out-performs the auto-vectorization of the compiler. In this paper we find that our proposed Hopping Vector-friendly Ordering allows for more efficient vectorization of complex arithmetic floating point operations. Using this data layout, we manage to increase the sustained bandwidth by approximately 1.8x.

关键词： Kernel Lattices Coprocessors Layout Graphics processing units Computer architecture Bandwidth

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Journal of Physics: conference Series

Journal of Physics: Conference Series

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17th international Workshop on Advanced Computing and Analysis techniques in Physics Research, ACAT 2016

The proceedings contain 78 papers. The topics discussed include: ATLAS event-index monitoring system using the Kibana analytics and visualization platform;automated finite state workflow for distributed data production;ATLAS FTK a � very complex � custom super computer;the Run-2 ATLAS trigger system;a new type of smart pointer for data object reference both in memory and in root files;CLARA: CLAS12 reconstruction and analysis framework;bringing experiment software to the web with VISPA;a scalable architecture for online anomaly detection of WLCG batch jobs;data locality via coordinated caching for distributed processing;electromagnetic physics models for parallel computing architectures;federated data storage and management infrastructure;evaluating non-relational storage technology for HEP meta-data and meta-data catalog;dynamic provisioning of a HEP computing infrastructure on a shared hybrid HPC system;cluster optimisation using C-groups at a Tier-2;eSciMart: web platform for scientific software marketplace;elastic extension of a CMS computing centre resources on external clouds;exploiting multicore compute resources in the CMS experiment;integration of PanDA workload management system with supercomputers for ATLAS and data intensive science;and hardware demonstrator of a level-1 track finding algorithm with FPGAs for the phase II CMS experiment.

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