Many features and advantages have been brought to organizations and computer users by Cloud computing. Many applications and services have been distributed by Cloud providers in an economical way. Even though companie...
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ISBN:
(纸本)9781509052646
Many features and advantages have been brought to organizations and computer users by Cloud computing. Many applications and services have been distributed by Cloud providers in an economical way. Even though companies and clients have started using Cloud computing, they are still concerned about their data's security because the data are stored and controlled by the Cloud providers [9]. In this paper, a technique has been explored to improve query processing performance while protecting database tables on a Cloud by encrypting those so that they remain secure. In addition, four techniques have been designed to index and partition the data, and these indexed data will be stored together with the encrypted table on the Cloud or server. The indexes and partitions of the data are used to select part of the data from the Cloud or outsource data depending on the required data. The indexed data can be used to increase the performance when the data are requested from the encrypted table. To compare the efficiency of our proposed methods, results will be presented in forms of graphs. In addition, the paper will explain how to improve performance by combining the two methods to partition the data.
Nowadays, computing hardware continues to move toward more parallelism and more heterogeneity, to obtain more computing power. From personal computers to supercomputers, we can find several levels of parallelism expre...
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Nowadays, computing hardware continues to move toward more parallelism and more heterogeneity, to obtain more computing power. From personal computers to supercomputers, we can find several levels of parallelism expressed by the interconnections of multi-core and many-core accelerators. On the other hand, computing software needs to adapt to this trend, and programmers can use parallel programming models (PPM) to fulfil this difficult task. There are different PPMs available that are based on tasks, directives, or low-level languages or library. These offer higher or lower abstraction levels from the architecture by handling their own syntax. However, to offer an efficient PPM with a greater (additional) high-level abstraction level while saving on performance, one idea is to restrict this to a specific domain and to adapt it to a family of applications. In the present study, we propose a high-level PPM specific to digital signal-processingapplications. It is based on data-flow graph models of computation, and a dynamic run-time model of execution (StarPU). We show how the user can easily express this digital signal-processing application and can take advantage of task, data, and graph parallelism in the implementation, to enhance the performances of targeted heterogeneous clusters composed of CPUs and different accelerators (e.g., GPU and Xeon Phi). Copyright (c) 2015 John Wiley & Sons, Ltd.
Existing control techniques of parallel-connected inverters are often complicated with multiple voltage and current loops. A large amount of tuning effort is required to ensure system stability, and the power quality ...
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ISBN:
(纸本)9781509012114
Existing control techniques of parallel-connected inverters are often complicated with multiple voltage and current loops. A large amount of tuning effort is required to ensure system stability, and the power quality is usually deteriorated due to voltage deviations. This paper proposes a new control method for parallel-connected three-phase voltage source inverters using model predictive control (MPC). High-quality voltages for local loads can be obtained. In addition, each inverter can adjust the output current to achieve proper load sharing according to the power ratings of distributed generation (DG) sources. Hot-swap capability is also achieved to facilitate the connection or disconnection operations to the common AC bus. Started with State-Space function which includes time-consuming matrix calculation can be done in PC. Thus, control gains are found and MPC can be achieved based on a digital signal processor (DSP). The proposed method is simple without complex coordinate transformation or proportional-integral (PI) regulators. The effectiveness of the proposed control strategy are verified by the test results under various scenarios, presenting promising applications in microgrids.
Offline password cracking has seen significant advances in recent years. This is mainly due to a dramatic increase in accessible computational speeds and the increased exploitation of GPUs for parallelprocessing. Che...
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ISBN:
(纸本)9780769557854
Offline password cracking has seen significant advances in recent years. This is mainly due to a dramatic increase in accessible computational speeds and the increased exploitation of GPUs for parallelprocessing. Cheaper and faster hardware, combined with new techniques, have allowed inexpensive GPUs to crack passwords at rates which only supercomputers could achieve previously. One inexpensive mitigation technique that we have uncovered is built on the core idea of pre-hash password manipulations. Our technique is named STUMP. Through rigorous empirical analysis, we demonstrate that STUMP can prevent offline parallel attacks - including pre-computed attacks utilizing rainbow tables - from cracking 9 9 : 7 1 8 % of passwords that are <8-characters in length;STUMP has also shown to completely prevent the attacker from cracking passwords that are >= 8 characters in length i.e., (100% secure). Finally, for all cases, STUMP can be employed to stall the attacks - regardless of whether the attack is a laborious brute-force technique or a more intelligent dictionary attack - as neither will return the user's original password.
The flexibility of Field Programmable Gate Arrays (FPGAs) as well as their parallelprocessing capabilities make them a good choice for digital signal processing in communication systems. However, today, further impro...
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ISBN:
(纸本)9781509012893
The flexibility of Field Programmable Gate Arrays (FPGAs) as well as their parallelprocessing capabilities make them a good choice for digital signal processing in communication systems. However, today, further improvements in performance hang in mid-air as we run into the frequency wall and FPGA based devices are clocked below 1 GHz. New methodologies which can cater performance optimization within the frequency wall limitation become highly essential. In this context, efficient modulation techniques like Quadrature Amplitude Modulation (QAM) and mixed time and frequency domain approach have been utilized in this paper to employ a generic scalable FPGA based QAM transmitter with the filter parallelization being executed in mixed domain. The system developed in this paper achieves a throughput of 4 Gb/s for QAM-16 format with a clock frequency as low as 62.5 MHz, thereby, paves down a promising methodology for applications where having higher clock frequencies is a hard limit.
Drones have become ubiquitous in performing risky and labor intensive areal tasks cheaply and safely. To allow them to be autonomous, their flight plan needs to be pre-built for them. Existing works do not precalculat...
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ISBN:
(纸本)9789897581427
Drones have become ubiquitous in performing risky and labor intensive areal tasks cheaply and safely. To allow them to be autonomous, their flight plan needs to be pre-built for them. Existing works do not precalculate flight paths but instead focus on navigation through camera based image processingtechniques, genetic or geometric algorithms to guide the drone during flight. That makes flight navigation complex and risky. In this paper we present automated flight plan builder DIFPL which pre-builds flight plans for drones to survey a large area. The flight plans are built for subregions and fed into drones which allow them to navigate autonomously. DIFPL employs distributed paradigm on Hadoop MapReduce framework. Distribution is achieved by processing sections or subregions in parallel. Experiments performed with network and elevation datasets validate the efficiency of DIFPL in building optimal flight plans.
The critical impact of air pollution on human health and environment in one hand and the complexity of pollutant concentration behavior in the other hand lead the scientists to look for advance techniques for monitori...
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ISBN:
(纸本)9781629935201
The critical impact of air pollution on human health and environment in one hand and the complexity of pollutant concentration behavior in the other hand lead the scientists to look for advance techniques for monitoring and predicting the urban air quality. Additionally, recent developments in data measurement techniques have led to collection of various types of data about air quality. Such data is extremely voluminous and to be useful it must be processed at high velocity. Due to the complexity of big data analysis especially for dynamic applications, online forecasting of pollutant concentration trends within a reasonable processing time is still an open problem. The purpose of this paper is to present an online forecasting approach based on Support Vector Machine (SVM) to predict the air quality one day in advance. In order to overcome the computational requirements for large-scale data analysis, distributed computing based on the Hadoop platform has been employed to leverage the processing power of multiple processing units. The MapReduce programming model is adopted for massive parallelprocessing in this study. Based on the online algorithm and Hadoop framework, an online forecasting system is designed to predict the air pollution of Tehran for the next 24 hours. The results have been assessed on the basis of processing Time and Efficiency. Quite accurate predictions of air pollutant indicator levels within an acceptable processing time prove that the presented approach is very suitable to tackle large scale air pollution prediction problems.
Power quality problems are disturbances of current/voltage waveform which result in cannot exactly work, to malfunction and to breakdown in the worst case of devices which are connected to power system. Although many ...
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ISBN:
(纸本)9781467373869
Power quality problems are disturbances of current/voltage waveform which result in cannot exactly work, to malfunction and to breakdown in the worst case of devices which are connected to power system. Although many methods are proposed to determine harmonics which are one of the most common power quality problems, Fast Fourier Transforms (FFT) is more preferred because it is simple and easy implementation. Because power system signals are continuously changed in time, Short-Time Fourier Transform (STFT) is used in order to obtain correctly frequency spectrum. It is important that parameters related power system signals can be correctly and on time detected for stable and reliable operation. Therefore, real-time techniques have great interest. Because of computing intensity different methods are used to be compatible with current advances in technology for real-time applications to shorten critical computation time. One of these methods is parallel computing. parallel computing is easily implementation by using MATLAB parallel Computing Toolbox and distributed Computing Server Toolbox. In this study, harmonic analysis of actual data obtained from a power system which may be for real-time applications is implemented and results are presented.
At present scenario Polynomial basis multipliers are used because they are relatively simple to design, and offer scalability for the fields of higher orders. It is used in Cryptographic and FFT applications for secur...
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ISBN:
(纸本)9781467366816
At present scenario Polynomial basis multipliers are used because they are relatively simple to design, and offer scalability for the fields of higher orders. It is used in Cryptographic and FFT applications for secure data encryption and decryption which deals with discrete structure and mathematical arithmetic. Since it uses modular arithmetic operation, it is found that it has the latency of m cycles. To overcome this problem, an efficient low latency polynomial multiplier for Fast Fourier transform (FFT) algorithm which is based on Mastrovito structure has been developed. This multiplier uses the concept of parallelprocessing in which multiplication is decomposed into number of independent units and “pre-computed addition” techniques. Our design has been implemented in VHDL, simulated and synthesized using the Xilinx ISE Design Suite 14.5 tool for supply voltage ranges from 1.2V to 2.5 V. The multiplier is analyzed in terms of speed, Area overhead and memory. The design involves significantly less delay and area overhead complexities than the existing architecture.
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