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System-level State Equality Detection for the Formal Dynamic Verification of Legacy distributed applications 23

System-level State Equality Detection for the Formal Dynamic...

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23rd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Guthmuller, Marion Quinson, Martin Corona, Gabriel Univ Lorraine LORIA UMR 7503 Vandoeuvre Les Nancy France CNRS LORIA UMR 7503 Vandoeuvre Les Nancy France Inria AlGorille Project Team Villers Les Nancy France

ISBN: (纸本)9781479984909

The ever increasing complexity of distributed systems mandates to formally verify their design and implementation. Unfortunately, the common approaches and existing tools to formally establish the correctness of these systems remain hardly applicable to the kind of legacy applications that are commonly found in the HPC community. We present how system-level memory introspection can be achieved directly at runtime without relying on the source code analysis. We use this mechanism to detect the equality of the application's state at system level. As the storage of the system state may be memory expensive, we compact the memory by sharing unchanged memory pages between snapshots. This enables the automated verification of safety and liveness properties on legacy distributed applications written in Fortran or C/C++ using the MPI standard. We demonstrate the effectiveness of our approach on several programs from the MPICH3 test suite.

关键词： Formal Dynamic Verification Legacy applications SimGrid State equality Legacy Equality Source code Memory Memory Verification Computer Programming Languages Snapshots system level distributed Systems Runtime accuracy class legacy application Distribute

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NXgraph: An efficient graph processing system on a single machine

NXgraph: An efficient graph processing system on a single ma...

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international conference on Data Engineering

作者： Yuze Chi Guohao Dai Yu Wang Guangyu Sun Guoliang Li Huazhong Yang Tsinghua National Laboratory for Information Science and Technology Tsinghua University Center for Energy Efficient Computing and Applications Peking University

ISBN: (纸本)9781509020218

Recent studies show that graph processing systems on a single machine can achieve competitive performance compared with cluster-based graph processing systems. In this paper, we present NXgraph, an efficient graph processing system on a single machine. We propose the Destination-Sorted Sub-Shard (DSSS) structure to store a graph. To ensure graph data access locality and enable fine-grained scheduling, NXgraph divides vertices and edges into intervals and sub-shards. To reduce write conflicts among different threads and achieve a high degree of parallelism, NXgraph sorts edges within each sub-shard according to their destination vertices. Then, three updating strategies, i.e., Single-Phase Update (SPU), Double-Phase Update (DPU), and Mixed-Phase Update (MPU), are proposed in this paper. NXgraph can adaptively choose the fastest strategy for different graph problems according to the graph size and the available memory resources to fully utilize the memory space and reduce the amount of data transfer. All these three strategies exploit streamlined disk access patterns. Extensive experiments on three real-world graphs and five synthetic graphs show that NXgraph outperforms GraphChi, TurboGraph, VENUS, and GridGraph in various situations. Moreover, NXgraph, running on a single commodity PC, can finish an iteration of PageRank on the Twitter [1] graph with 1.5 billion edges in 2.05 seconds; while PowerGraph, a distributed graph processing system, needs 3.6s to finish the same task on a 64-node cluster.

关键词： Data transfer Computational modeling Spread spectrum communication Venus parallel processing Twitter Memory management

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parallel implementations of the Particle Filter algorithm for Android mobile devices 23

Parallel implementations of the Particle Filter algorithm fo...

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23rd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Acosta, Alejandro Almeida, Francisco Univ La Laguna E-38207 San Cristobal la Laguna Spain

ISBN: (纸本)9781479984909

The advent of emergent System-on-Chip (SoCs) and multiprocessor System-on-Chip (MPSocs) opens a new era on the small mobile devices (Smartphones, Tablets, ...) in terms of computing capabilities and applications to be addressed. Given the ability of these devices to interact with the real world through the camera, is mandatory the development of efficient algorithms related to image processing and computer vision. We present a parallel implementation on mobile Android devices of the Particle Filter algorithm. We developed three different version of this algorithm. A Java sequential implementation and two Renderscript parallel versions, an ad-hoc implementation and a Paralldroid generated implementation. The results obtained by the parallel versions present an important speedup and a high accurate with a high processing rate of frame per seconds.

关键词： Renderscript Paralldroid Particle Filter Android

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Derivation of parallel and Resilient Programs from Simulink Models 23

Derivation of Parallel and Resilient Programs from Simulink ...

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23rd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Ostroumov, Sergey Bostrom, Pontus Walden, Marina Abo Akad Univ Dept Informat Technol Turku Finland TUCS Turku Ctr Comp Sci Turku Finland

ISBN: (纸本)9781479984909

Modern embedded applications often require high computational power and, on the other hand, fulfilment of real-time constraints and high level of resilience. Simulink is one widely used tool for model-based development of embedded software. In this paper, we focus on the derivation of parallel programs from Simulink models and real-time resilient execution of derived implementations on a many-core platform. The main contribution is a fault-tolerance (FT) mechanism that prevents data loss when the platform is dynamically reconfigured to mask failures of individual cores. Finally, we evaluate the proposed solutions on an industrial case study using a commercially available NoC-based platform. The evaluation shows that the proposed FT mechanism has a marginal overhead.

关键词： Data Loss Prevention Dynamic Reconfiguration Many-Core Platforms parallel Programs Resilience Simulink

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ObsCon: Integrated Monitoring and Control for parallel, Real-time applications

ObsCon: Integrated Monitoring and Control for Parallel, Real...

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IEEE international conference on Cluster Computing (CLUSTER)

作者： Nussbaum, Alan Choodamani, Shwetha Mathangi Chandra Schwan, Karsten Georgia Inst Technol Coll Comp Georgia Tech Res Inst Atlanta GA 30332 USA Georgia Inst Technol Coll Comp Atlanta GA 30332 USA

ISBN: (纸本)9781467365987

A large class of emerging compute-intensive applications demand real-time or near real-time processing guarantees on streaming data. Sensor processing in particular, has stringent latency requirements for carrying out its digital processing for rapidly incoming radar data streams. The consequent demands on the cluster middleware used to run such codes include (i) efficient online observation of current application performance, coupled with (ii) highly responsive controllers able to dynamically adjust the application's input- and data-dependent runtime behavior. We present the Obs(erver)Con(troller) software for online monitoring and control, which based on specifications of acceptable application states and tunable knobs within the execution environment, ensures that application performance falls within acceptable limits. ObsCon topologies are dynamic, making possible the runtime association of ObsCon methods with arbitrary DAG-structured, distributed/parallel stream processing applications running on high end cluster machines. This paper describes the ObsCon software and its 'grey box' use with a high performance cluster code that exports to ObsCon select `hooks' for online monitoring and control Adaptive Digital Beamforming for a phase-array radar system.

关键词： Application Tuning Monitoring Closed-loop control Middleware Real-time Systems distributed Architectures

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Efficient parallelization of the Google Trigram Method for Document Relatedness Computation 44

Efficient Parallelization of the Google Trigram Method for D...

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44th Annual international conference on parallel processing Workshops (ICPPW)

作者： Kou, Xinxin Mei, Jie Yao, Zhimin Rau-Chaplin, Andrew Islam, Aminul Moh'd, Abidalrahman Milios, Evangelos Dalhousie Univ Fac Comp Sci 6050 Univ Ave Halifax NS Canada

ISBN: (纸本)9781467375894

Finding pairwise document relatedness plays an important role in a variety of Natural Language processing problems. Google Trigram Method (GTM) is one of the corpus-based unsupervised method that can be used to capture word relatedness and document relatedness. It has been shown that it is possible to apply GTM to construct high quality document relatedness applications. However, there are challenges in implementing GTM for pair-wise document relatedness computation on a large volume of document set given its high computational complexity. This paper presents time and space efficient methods for the computation of pair-wise document relatedness using GTM. In order to improve the performance algorithmic engineering, data structure enhancement, and parallel computing methods are applied. Two parallel methods are discussed in this paper: shared memory multicore implementation and distributed memory Hadoop implementation. Both parallel methods provide an order of magnitude improvement in accelerating the pair-wise document relatedness computation using GTM.

关键词： Acceleration Arrays Dictionaries Google Multicore processing parallel processing GANG TEMPERATURE MONITOR Dictionaries as Topic parallel processing (COMPUTERS) acceleration Google arrays arithmetic

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parallel and distributed processing techniques and applications

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2015年

作者： Hamid R Arabnia Louis A D'Alotto Hiroshi Ishii Minoru Ito Kazuki Joe Hiroaki Nishikawa Georgios Ch Sirakoulis William Spataro Giuseppe A. Trunfio George A Gravvanis George Jandieri Ashu M G Solo Fernando G Tinetti

ISBN: (纸本)9781601322845

PDPTA is an international conference that serves researchers, scholars, professionals, students, and academicians who are looking to both foster working relationships and gain access to the latest research results. The 2014 Congress was composed of research presentations, keynote lectures, invited presentations, tutorials, panel discussions, and poster presentations. Selected Topics: parallel Computing and Algorithms + Multi-Core and Energy-Aware Computing, Communication Systems and Input Output Systems + Interconnection Networks and Topologies + Routing Methods New Protocols + Vanet + Peer-To-Peer Networks + Sensor Networks and applications, Mathematical Modeling and Problem Solving, MPS, parallel Programming and Novel Frameworks + parallel Architectures and Systems, Systems Software + parallel Programming Models + Petri Nets + Cache Coherence, High-Perfonnance Computing + distributed Algorithms and applications, Big Data and Data Analytics + Related Technologies and Methods, Scientific Computing, FFT, Matrix Problems, Linear Systems, Finite Element Methods, Cloud and Grid Computing, Energy Efficient Networking Systems Applicable to Emergency, Sixth Complex Systems, Theory and applications Workshop, CSTAW 2014, parallel and distributed processing techniques and applications.

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A Responsive Knapsack-based Algorithm for Resource Provisioning and Scheduling of Scientific Workflows in Clouds 44

A Responsive Knapsack-based Algorithm for Resource Provision...

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44th Annual international conference on parallel processing Workshops (ICPPW)

作者： Rodriguez, Maria A. Buyya, Rajkumar Univ Melbourne Dept Comp & Informat Syst Cloud Comp & Distributed Syst CLOUDS Lab Melbourne Vic 3010 Australia

ISBN: (纸本)9781467375887

Scientific workflows are used to process vast amounts of data and to conduct large-scale experiments and simulations. They are time consuming and resource intensive applications that benefit from running in distributed platforms. In particular, scientific workflows can greatly leverage the ease-of-access, affordability, and scalability offered by cloud computing. To achieve this, innovative and efficient ways of orchestrating the workflow tasks and managing the compute resources in a cost-conscious manner need to be developed. We propose an adaptive, resource provisioning and scheduling algorithm for scientific workflows deployed in Infrastructure as a Service clouds. Our algorithm was designed to address challenges specific to clouds such as the pay-as-you-go model, the performance variation of resources and the on-demand access to unlimited, heterogeneous virtual machines. It is capable of responding to the dynamics of the cloud infrastructure and is successful in generating efficient solutions that meet a user-defined deadline and minimise the overall cost of the used infrastructure. Our simulation experiments demonstrate that it performs better than other state-of-the-art algorithms.

关键词： Algorithm design and analysis Cloud computing Dynamic scheduling Heuristic algorithms Pipelines Schedules Cloud Computing Algorithm design and analysis dynamic scheduling Clouds Heuristic algorithms Workflow pipeline INFRASTRUCTURE piping

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An application of GPU parallel computing to power flow calculation in HVDC networks 23

An application of GPU parallel computing to power flow calcu...

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23rd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Blaskiewicz, Przemyslaw Zawada, Marcin Balcerek, Przemyslaw Dawidowski, Pawel Wroclaw Univ Technol Wroclaw Poland ABB Corp Res Krakow Poland

ISBN: (纸本)9781479984909

Numerical computation on GPU has become easily accessible and offers good computation power for relatively little cost. Recently an application of Newton-Raphson method for analyzing power flow in multi-terminal high-voltage direct current (HVDC) networks was proposed and shown to have good results on five terminal grids. Since this method involves costly matrix operation, especially the inverse, increasing the number of terminals in the grid yields prohibitively large execution times in sequential operation. To address this issue, we adjust the algorithm so that it benefits from parallel computation and test our approach on recent GPU from NVidia. We give experimental results for grids up to few thousand terminals and show that execution time is still acceptable for real applications. We also provide some benchmarks of the GPU computation compared with other platforms.

关键词： High-voltage direct current (HVDC) GRAPPER PICK UP Graphics processing Unit parallel processing (COMPUTERS) grids execution time power flow calculation matrix calculation numerical calculation Device Terminal

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The R2-D2 toolchain — Automated porting of safety-critical applications to FPGAs

The R2-D2 toolchain — Automated porting of safety-critical ...

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international conference on Reconfigurable Computing and FPGAs (ReConFig)

作者： Steffen Vaas Marc Reichenbach Ulrich Margull Dietmar Fey Chair of Computer Architecture Friedrich-Alexander-University Erlangen-Nürnberg (FAU) Erlangen Germany Technische Hochschule Ingolstadt Ingolstadt Germany

Safety-critical applications require reliable hardware platforms with deterministic behavior. Concerning the increasing demand for performance, current single core solutions are not sufficient anymore. Classical multi-core processors are designed for a general application case, which provide much performance at the expense of determinism and reliability. In safety-critical applications, all required tasks are already known at development time. They are specified by a system description, like AUTOSAR. Thus, a hardware architecture providing one core for each task and one physical link for each data exchange between different tasks can be derived. However, such a highly application-specific architecture is not available. Latest FPGA technologies provide now enough resources to integrate several soft-core processors in one low-cost chip. Furthermore, the cores and their connections can be arranged flexibly in an FPGA. To bridge the gap between safety-critical applications and FPGAs, this approach provides a toolchain as addition to existing AUTOSAR design tools for automatically generating a specific hardware architecture from metadata of an AUTOSAR description. By reducing the complexity of the hardware platform drastically, a reconfigurable, reliable, deterministic, distributed (R2-D2) hardware architecture can be created. The results show that safety-critical tasks can be executed deterministically on one chip in parallel and multiple applications can be mapped to one low-cost FPGA. Furthermore, the latency of the system could be reduced extensively, so new application areas can be accessed.

关键词： Hardware Multicore processing Program processors Reliability Field programmable gate arrays

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