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Improving Application Concurrency on GPUs by Managing Implicit and Explicit Synchronizations

Improving Application Concurrency on GPUs by Managing Implic...

引用

international conference on parallel and distributed Systems (ICPADS)

作者： Michael Butler Kittisak Sajjapongse Michela Becchi Department of Electrical and Computer Engineering University of Missouri Columbia

ISBN: (纸本)9781467386692

Originally designed to be used as dedicated coprocessors, GPUs have progressively become part of shared computing environments, such as HPC servers and clusters. Commonly used GPU software stacks (e.g., CUDA and OpenCL), however, are designed for the dedicated use of GPUs by a single application, possibly leading to resource underutilization when multiple applications share the GPU resources. In recent years, several node-level runtime components have been proposed to target this problem and allow the efficient sharing of GPUs among concurrent applications. The concurrency enabled by these systems, however, is limited by synchronizations embedded in the applications or implicitly introduced by the GPU software stack. This work targets this problem. We first analyze the effect of explicit and implicit synchronizations on application concurrency and GPU utilization. We then design runtime mechanisms to bypass these synchronizations, along with a memory management scheme that can be integrated with these synchronization avoidance mechanisms to improve GPU utilization and system throughput. We integrate these mechanisms into a recently proposed GPU virtualization runtime named Sync-Free GPU (SF-GPU), thus removing unnecessary blockages caused by multitenancy, ensuring any two applications running on the same device experience limited to no interference, maximizing the level of concurrency supported. We also release our mechanisms in the form of a software API that can be used by programmers to improve the performance of their applications without modifying their code. Finally, we evaluate the impact of our proposed mechanisms on applications run in isolation and concurrently.

关键词： Graphics processing units Runtime Kernel Context Concurrent computing Hardware

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DSLR: A distributed Schedule Length Reduction Algorithm for WSNs

DSLR: A Distributed Schedule Length Reduction Algorithm for ...

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international Symposium on parallel and distributed processing (IPDPS)

作者： Ashutosh Bhatia R.C. Hansdah Dept. of Computer Science and Automation Indian Institute of Science Bangalore

Wireless sensor networks (WSNs) benefit from theMAC protocols that reduce power consumption by avoiding frame collisions. Time Division Multiple Access (TDMA) method provides collision free channel access by employing a pre-defined schedule so that the nodes can transmit at their allotted time slots. Most of the existing distributed TDMA-scheduling techniques for WSNs either try to improve the channel utilization by generating compact schedule which usually takes longer time, or generate schedule quickly, that may not be very efficient in terms of the schedule length. In this paper, we present a new approach to TDMA-scheduling for WSNs, that bridges the gap between these two extreme types of TDMA-scheduling techniques, by providing the flexibility to trade-off the schedule length with the time required to generate the schedule, as per the requirements of the underlying applications and channel conditions. The idea into generate a TDMA-schedule quickly using any of the existing algorithms, and then progressively reduce the TDMA-schedule length. In this context, we provide a distributed schedule length reduction (DSLR) algorithm which can be terminated after the execution of arbitrary number of iterations, and still bereft with a valid schedule. Additionally, unlike other TDMA-scheduling algorithms which use contention-based channel access, the DSLR algorithm uses TDMA-based channel access to perform the schedule reduction. The algorithm has been simulated using the Castalia simulator to compare its performance with those of others in terms of generated schedule length and the time required to generate the TDMA-schedule. Simulation results confirm the effectiveness of the approach, and show that the proposed algorithm generates a compact schedule in much less time in comparison to existing approaches.

关键词： Schedules Wireless sensor networks Interference Time division multiple access Protocols Nickel Receivers

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Analysis of Network User Virtual Identity Based on Hadoop

Analysis of Network User Virtual Identity Based on Hadoop

引用

international conference on Intelligent Human-Machine Systems and Cybernetics, IHMSC

作者： Gang He Wenlong Qiu Dechen Yu Xiaochun Wu Beijing Key Laboratory of Network System Architecture and Convergence Beijing University of Posts and Telecommunications Beijing China

ISBN: (纸本)9781479986477

With the development of the Internet and the explosive growth of business data, there are massive Network User Virtual Identities (NUVIs) on Internet when network user accessing different applications. Compared with previous methods, we will propose an algorithm to analyze which NUVIs belong to the same person. What's more, our approach is based on the cloud computing platform and the cluster system, including the Hadoop distributed File System (HDFS) and the parallel processing software framework MapReduce.

关键词： Monitoring Cloud computing Computational modeling Programming parallel processing Merging

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Experimental Results of a Raspberry Pi Based WMN Testbed for Multiple Flows and distributed Concurrent processing

Experimental Results of a Raspberry Pi Based WMN Testbed for...

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international conference on Broadband, Wireless Computing, Communication and applications (BWCCA)

作者： Tetsuya Oda Donald Elmazi Taro Ishitaki Admir Barolli Keita Matsuo Leonard Barolli Graduate School of Engineering Fukuoka Institute of Technology (FIT) Higashi-Ku Fukuoka Japan Rr. “Dritan Hoxha” Logos University Tirana Albania Fukuoka Prefectural Fukuoka Technical High School Sawara-Ku Fukuoka Japan Department of Information and Communication Engineering Fukuoka Institute of Technology (FIT) Higashi-Ku Fukuoka Japan

ISBN: (纸本)9781467383165

Wireless Mesh Networks (WMNs) are attracting a lot of attention from wireless network researchers, because of their potential use in several fields such as collaborative computing and communications. Considering mobility of the terminals, routing is a key process for operation of WMNs. In this paper, we present the implementation of a testbed for WMNs. We analyze the performance of Optimized Link State Routing (OLSR) protocol and parallel distributed processing in an indoor scenario. For evaluation we considered hop count, delay, jitter and processing time metrics. The experimental results show that the nodes in the testbed were communicating smoothly. The processing time for node 1 is smaller than other nodes.

关键词： Ad hoc networks Routing Wireless sensor networks Wireless communication Delays Network topology

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Measuring delays of ethernet communication for distributed real-time applications using carrier sense

Measuring delays of ethernet communication for distributed r...

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IEEE international conference on Industrial Informatics (INDIN)

作者： Michael Kaliwoda Christian Rehtanz Institute of Energy Systems Energy Efficiency and Energy Economy TU Dortmund University Germany

Ethernet is emerging for many distributed real-time applications in industrial environments. It is also considered for substation automation in power systems with regard to IEC 61850 offering many advantages over conventional parallel wiring with analog signals. Mission-critical for protection and control systems as well as other demanding applications is the end-to-end delay of messages. Beside the frame duration of an Ethernet message on the physical layer, the overall delay is affected by processing times of communication stacks and applications significantly. A timing analysis of Ethernet frames is possible with standard network interface cards (NICs) but a high-resolution is only given with specific hardware or professional network analyzers. Furthermore, to determine stack processing delays, immediate signals are required from the application prior to the transmission and after retrieval additionally. This paper proposes a method to measure delays of Ethernet communication with a common transceiver. The achievable timing resolution is less than 0.1μs using a typical micro-controller unit (MCU).

关键词： Delays IEC Standards Real-time systems Receivers Wires Transceivers

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A harmonic analysis using parallel computing

A harmonic analysis using parallel computing

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IEEE Signal processing and Communications applications (SIU)

作者： İbrahim Sefa Funda Battal Gazi Universitesi Ankara Ankara TR Elektronik ve Otomasyon Bölümü Nevşehir Hacı Bektaş Veli Üniversitesi Türkiye

Power quality problems are disturbances of current/voltage waveform which result in cannot exactly work, to malfunction and to breakdown in the worst case of devices which are connected to power system. Although many methods are proposed to determine harmonics which are one of the most common power quality problems, Fast Fourier Transforms (FFT) is more preferred because it is simple and easy implementation. Because power system signals are continuously changed in time, Short-Time Fourier Transform (STFT) is used in order to obtain correctly frequency spectrum. It is important that parameters related power system signals can be correctly and on time detected for stable and reliable operation. Therefore, real-time techniques have great interest. Because of computing intensity different methods are used to be compatible with current advances in technology for real-time applications to shorten critical computation time. One of these methods is parallel computing. parallel computing is easily implementation by using MATLAB parallel Computing Toolbox and distributed Computing Server Toolbox. In this study, harmonic analysis of actual data obtained from a power system which may be for real-time applications is implemented and results are presented.

关键词： MATLAB Power quality Real-time systems

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Fast and Accurate Simulation of Multithreaded Sparse Linear Algebra Solvers

Fast and Accurate Simulation of Multithreaded Sparse Linear ...

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international conference on parallel and distributed Systems (ICPADS)

作者： Luka Stanisic Emmanuel Agullo Alfredo Buttari Abdou Guermouche Arnaud Legrand Florent Lopez Brice Videau CNRS/Inria/University of Grenoble Alpes France Inria/University of Bordeaux France CNRS/University Paul Sabatier Toulouse France

ISBN: (纸本)9781467386692

The ever growing complexity and scale of parallel architectures imposes to rewrite classical monolithic HPC scientific applications and libraries as their portability and performance optimization only comes at a prohibitive cost. There is thus a recent and general trend in using instead a modular approach where numerical algorithms are written at a high level independently of the hardware architecture as Directed Acyclic Graphs (DAG) of tasks. A task-based runtime system then dynamically schedules the resulting DAG on the different computing resources, automatically taking care of data movement and taking into account the possible speed heterogeneity and variability. Evaluating the performance of such complex and dynamic systems is extremely challenging especially for irregular codes. In this article, we explain how we crafted a faithful simulation, both in terms of performance and memory usage, of the behavior of qr_mumps, a fully-featured sparse linear algebra library, on multi-core architectures. In our approach, the target high-end machines are calibrated only once to derive sound performance models. These models can then be used at will to quickly predict and study in a reproducible way the performance of such irregular and resource-demanding applications using solely a commodity laptop.

关键词： Runtime Computer architecture Linear algebra Predictive models parallel processing Algorithm design and analysis Libraries

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Evaluation of global synchronization for iterative algebra algorithms on many-core

Evaluation of global synchronization for iterative algebra a...

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ACIS international conference on Software Engineering, Artificial Intelligence, Networking, and parallel/distributed Computing (SNPD)

作者： Ayaz ul Hasan Khan Mayez Al-Mouhamed Lutfi A. Firdaus Department of Computer Engineering College of Computer Science & Engineering Dhahran Saudi Arabia

Massively parallel computing is applied extensively in various scientific and engineering domains. With the growing interest in many-core architectures and due to the lack of explicit support for inter-block synchronization specifically in GPUs, synchronization becomes necessary to minimize inter-block communication time. In this paper, we have proposed two new inter-block synchronization techniques: 1) Relaxed Synchronization, and 2) Block-Query Synchronization. These schemes are used in implementing numerical iterative solvers where computation/communication overlapping is one used optimization to enhance application performance. We have evaluated and analyzed the performance of the proposed synchronization techniques using Jacobi Iterative Solver in comparison to the state of the art inter-block lock-free synchronization techniques. We have achieved about 1-8% performance improvement in terms of execution time over lock-free synchronization depending on the problem size and the number of thread blocks. We have also evaluated the proposed algorithm on GPU and MIC architectures and obtained about 8-26% performance improvement over the barrier synchronization available in OpenMP programming environment depending on the problem size and number of cores used.

关键词： Synchronization Graphics processing units Jacobian matrices Instruction sets Kernel Computer architecture Microwave integrated circuits

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Balancing Thread-Level and Task-Level parallelism for Data-Intensive Workloads on Clusters and Clouds

Balancing Thread-Level and Task-Level Parallelism for Data-I...

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IEEE international conference on Cluster Computing

作者： Olivia Choudhury Dinesh Rajan Nicholas Hazekamp Sandra Gesing Douglas Thain Scott Emrich Department of Computer Science and Engineering University of Notre Dame University of Notre Dame Notre Dame IN US

The runtime configuration of parallel and distributed applications remains a mysterious art. To tune an application on a particular system, the end-user must choose the number of machines, the number of cores per task, the data partitioning strategy, and so on, all of which result in a combinatorial explosion of choices. While one might try to exhaustively evaluate all choices in search of the optimal, the end user's goal is simply to run the application once with reasonable performance by avoiding terrible configurations. To address this problem, we present a hybrid technique based on regression models for tuning data intensive bioinformatics applications: the sequential computational kernel is characterized empirically and then incorporated into an ab initio model of the distributed system. We demonstrate this technique on the commonly-used applications BWA, Bowtie2, and BLASR and validate the accuracy of our proposed models on clouds and clusters.

关键词： Computational modeling Data models Bioinformatics Instruction sets Predictive models parallel processing Genomics

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Energy Consumption Reduction with DVFS for Message Passing Iterative applications on Heterogeneous Architectures

Energy Consumption Reduction with DVFS for Message Passing I...

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IEEE international Symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Jean-Claude Charr Raphaël Couturier Ahmed Fanfakh Arnaud Giersch FEMTO-ST Institute IUT de Belfort-Montbéliard Belfort cedex France

Computing platforms are consuming more and more energy due to the increasing number of nodes composing them. To minimize the operating costs of these platforms many techniques have been used. Dynamic voltage and frequency scaling (DVFS) is one of them. It reduces the frequency of a CPU to lower its energy consumption. However, lowering the frequency of a CPU may increase the execution time of an application running on that processor. Therefore, the frequency that gives the best trade-off between the energy consumption and the performance of an application must be selected. In this paper, a new online frequency selecting algorithm for heterogeneous platforms (heterogeneous CPUs) is presented. It selects the frequencies and tries to give the best trade-off between energy saving and performance degradation, for each node computing the message passing iterative application. The algorithm has a small overhead and works without training or profiling. It uses a new energy model for message passing iterative applications running on a heterogeneous platform. The proposed algorithm is evaluated on the SimGrid simulator while running the NAS parallel benchmarks. The experiments show that it reduces the energy consumption by up to 34% while limiting the performance degradation as much as possible. Finally, the algorithm is compared to an existing method, the comparison results show that it outperforms the latter, on average it saves 4% more energy while keeping the same performance.

关键词： Energy consumption Message passing Time-frequency analysis Computational modeling Arrays Degradation Mathematical model

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