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检索条件"任意字段=International Conference on Parallel and Distributed Processing Techniques and Applications"

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A Novel Multiprocessor Architecture For Massively parallel System 3

A Novel Multiprocessor Architecture For Massively Parallel S...

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international conference parallel distributed Grid Computing

作者： Khan, Zaki Ahmad Siddiqui, Jamshed Samad, Abdus Aligarh Muslim Univ Dept Comp Sci Aligarh Uttar Pradesh India Aligarh Muslim Univ Univ Womens Polytech Aligarh Uttar Pradesh India

ISBN: (纸本)9781479976836

Multiprocessor architecture is the main resource to speed up applications by incorporating parallelism among various processing elements. The success of multiprocessor system depends how much efficiently the concurrent processes are managed on the system. This paper proposes a novel multiprocessor architecture which is less complex, easily extensible and inherits most of the desirable topological properties. The proposed system is capable to manage the distributing of parallel tasks efficiently when appropriate scheduling schemes are implemented on it. The comparative study shows that the proposed architecture could be used effectively in various multi-processing applications.

关键词： multiprocessor network parallel system scalability Task scheduling diameter

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A parallel, distributed, High-Performance Architecture for Simulating Particle-based Models 16

A Parallel, Distributed, High-Performance Architecture for S...

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16th international Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC)

作者： Sabou, Adrian Gorgan, Dorian Tech Univ Cluj Napoca Dept Comp Sci Cluj Napoca 400027 Romania

ISBN: (纸本)9781479984480

Particle-based models are widespread in the field of computer graphics and are mostly used in soft-body dynamics, for simulating surfaces such as cloth, fluids and biologic tissue. As model resolution and scenario complexity increases, the computation required for these particular applications becomes overwhelming for a single processing unit, especially when interactivity is required, thus parallelization must be employed in order to provide a fast, flexible and scalable simulation environment. High-performance computing architectures such as graphics clusters may provide the parallel computing and rendering power required, but the distributed and remote nature of the computation and rendering process introduce specific challenges that must be tackled. We propose a parallel, distributed, modular system architecture for a particle-based simulator on GPU clusters, encapsulating powerful parallel and distributed processing, distributed rendering and remote interaction techniques, for flexible, fast simulation of large models and complex scenarios. For validating and evaluating the proposed architecture, we perform a visual comparison of two largely used numeric integration methods, namely the explicit Velocity Verlet and implicit Euler integration techniques.

关键词： particle-based models distributed computing parallel computing high-performance computing simulation graphics cluster GPGPU

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Characterization and Optimization of Memory-Resident MapReduce on HPC Systems

Characterization and Optimization of Memory-Resident MapRedu...

引用

IEEE 28th international parallel & distributed processing Symposium (IPDPS)

作者： Wang, Yandong Goldstone, Robin Yu, Weikuan Wang, Teng Auburn Univ Auburn AL 36849 USA Lawrence Livermore Natl Lab Livermore CA USA

ISBN: (纸本)9780769552071

MapReduce is a widely accepted framework for addressing big data challenges. Recently, it has also gained broad attention from scientists at the U.S. leadership computing facilities as a promising solution to process gigantic simulation results. However, conventional high-end computing systems are constructed based on the compute-centric paradigm while big data analytics applications prefer a data-centric paradigm such as MapReduce. This work characterizes the performance impact of key differences between compute-and data-centric paradigms and then provides optimizations to enable a dual-purpose HPC system that can efficiently support conventional HPC applications and new data analytics applications. Using a state-of-the-art MapReduce implementation Spark and the Hyperion system at Lawrence Livermore National Laboratory, we have examined the impact of storage architectures, data locality and task scheduling to the memory-resident MapReduce jobs. Based on our characterization and findings of the performance behaviors, we have introduced two optimization techniques, namely Enhanced Load Balancer and Congestion-Aware Task Dispatching, to improve the performance of Spark applications.

关键词： Lawrence Livermore National Laboratory High Performance Computing performance behavior TASK SCHEDULING SOLUTION processing

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Hybrid Classification of Resistors through Image processing

Hybrid Classification of Resistors through Image Processing

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22nd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Molina, Romina Federigi, Pablo Gil-Costa, Veronica Printista, A. Marcela Natl Univ San Luis San Luis Argentina UNSL San Luis Argentina Consejo Nacl Invest Cient & Tecn RA-1033 Buenos Aires DF Argentina

ISBN: (纸本)9781479927289

Digital image processing consists of a set of techniques for contrast enhancement, noise reduction, image sharpening, segmentation, object recognition, and quantitative analysis of the image. In this work, we focus on object recognition on images containing electronic resistors. Our system classifies those resistors according to the colored bands of the resistors found in the image. This paper will introduce the system, presenting an architecture that leads to a high performance image processing system and describing a hybrid programming model, through the combined operation of processes and threads to meet the requirements of that system. In addition, the paper presents some discussion about the performance on different resources configuration on a cluster of multi-core nodes.

关键词： image classification image enhancement image segmentation object recognition resistors contrast enhancement digital image processing electronic resistors high performance image processing system hybrid classification hybrid programming model image segmentation image sharpening multicore nodes noise reduction Clustering algorithms Digital images Image color analysis Message systems Resistance Resistors

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SupMR: Circumventing Disk and Memory Bandwidth Bottlenecks for Scale-up MapReduce 28

SupMR: Circumventing Disk and Memory Bandwidth Bottlenecks f...

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28th IEEE international parallel & distributed processing Symposium Workshops (IPDPSW)

作者： Sevilla, Michael Nassi, Ike Ioannidou, Kleoni Brandt, Scott Maltzahn, Carlos Univ Calif Santa Cruz Comp Sci Dept Santa Cruz CA 95060 USA

ISBN: (纸本)9781479941162

Reading input from primary storage (i.e. the ingest phase) and aggregating results (i.e. the merge phase) are important pre- and post-processing steps in large batch computations. Unfortunately, today's data sets are so large that the ingest and merge job phases are now performance bottlenecks. In this paper, we mitigate the ingest and merge bottlenecks by leveraging the scale-up MapReduce model. We introduce an ingest chunk pipeline and a merge optimization that increases CPU utilization (50 - 100%) and job phase speedups (1.16x - 3.13x) for the ingest and merge phases. Our techniques are based on well-known algorithms and scale-out MapReduce optimizations, but applying them to a scale-up computation framework to mitigate the ingest and merge bottlenecks is novel.

关键词： applications Architectures distributed applications distributed systems Performance measurements

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Realm: An Event-Based Low-Level Runtime for distributed Memory Architectures 14

Realm: An Event-Based Low-Level Runtime for Distributed Memo...

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23rd international conference on parallel Architectures and Compilation techniques (PACT)

作者： Treichler, Sean Bauer, Michael Aiken, Alex Stanford Univ Stanford CA 94305 USA

ISBN: (纸本)9781450328098

We present Realm, an event-based runtime system for heterogeneous, distributed memory machines. Realm is fully asynchronous: all runtime actions are non-blocking. Realm supports spawning computations, moving data, and reservations, a novel synchronization primitive. Asynchrony is exposed via a light-weight event system capable of operating without central management. We describe an implementation of Realm that relies on a novel generational event data structure for efficiently handling large numbers of events in a distributed address space. Microbenchmark experiments show our implementation of Realm approaches the underlying hardware performance limits. We measure the performance of three real-world applications on the Keeneland supercomputer. Our results demonstrate that Realm confers considerable latency hiding to clients, attaining significant speedups over traditional bulk-synchronous and independently optimized MPI codes.

关键词： Realm Legion distributed memory deferred execution events reservations heterogeneous architectures runtime

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Automated Instantiation of Heterogeneous FastFlow CPU/GPU parallel Pattern applications in Clouds

Automated Instantiation of Heterogeneous FastFlow CPU/GPU Pa...

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22nd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Boob, Suresh Velez, Horacio Gonzalez Popescu, Alina Madalina Natl Coll Ireland Cloud Competency Ctr Dublin 1 Ireland

ISBN: (纸本)9781479927289

parallel scientific workloads typically entail highly-customised software environments, involving complex data structures, specialised systems software, and even distinct hardware, where virtualisation is not necessarily supported by third-party providers. Considering the expansion of cloud computing in different domains and the development of different proprietary (e.g. Amazon Web Services, Azure) and open source cloud platforms (Eucalyptus, OpenStack, OpenNebula), users should arguably be able to automatically and seamlessly migrate their parallel workloads across cloud platforms using standardised virtual machines. However, even if it is easier to migrate the workload between nodes when the nodes have a similar configuration on the same platform, the transition between different platforms typically raises different issues such as vendor lock-in, portability, and interoperability. In this paper, we describe our work to automatically deploy a complex parallel software stack on heterogeneous hybrid cloud platforms. We have elastically deployed FastFlow-a C/C++ pattern-based programming framework for multi-/many-core and distributed platforms-using virtual machines on both CPU and GPU-based architectures between heterogeneous virtualised platforms. Our approach relies on the standard Open Virtualization Format (OVF) in order to achieve a universal description of virtual appliances. Such a description is not only useful for elastically migrating and deploying, but also to determine the hardware/system software configuration needed switching to any new (cloud) image format. We have successfully evaluated our work using virtual machines based on VirtualBox and Amazon Web Services on local cluster and public cloud providers.

关键词： Algorithmic Skeletons parallel Patterns parallel Programming FastFlow Virtualization Platform Interoperability Cloud Computing

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Searching the Human Genome for Snail and Slug with DNA@Home

Searching the Human Genome for Snail and Slug with DNA@Home

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IEEE international conference on e-Science and Grid Computing

作者： Kristopher Zarns Travis Desell Sergei Nechaev Archana Dhasarathy Department of Computer Science University of North Dakota Grand Forks North Dakota Department of Basic Sciences University of North Dakota Grand Forks North Dakota

DNA@Home is a volunteer computing project that aims to use Gibbs Sampling for the identification and location of DNA control signals on full genome-scale datasets. A fault tolerant and asynchronous implementation of Gibbs sampling using the Berkeley Open Infrastructure for Network Computing (BOINC) was used to identify the location of binding sites of the SNAI1 (Snail) and SNAI2 (Slug) transcription factors across the human genome. Genes regulated by Slug but not Snail, and genes regulated by Snail but not Slug provided two datasets with known motifs. These datasets contained up to 994 DNA sequences which to our knowledge is largest scale use of Gibbs sampling for discovery of binding sites. 1000 parallel sampling walks were used to search for the presence of 1, 2 or 3 possible motifs using small, medium, and full size sets of these sequences. These runs were performed over a period of two months using over 1500 volunteered computing hosts and generated over 2.2 Terabytes of sampling data. High performance computing resources were used for post processing. This paper presents intra and inter walk analyses used to determine walk convergence. The results were validated against current biological knowledge of the Snail and Slug promoter regions and present avenues for further biological study.

关键词： Convergence Genomics Bioinformatics Standards Computer applications distributed processing DNA

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Simulation and Analysis of the Blood Coagulation Cascade Accelerated on GPU

Simulation and Analysis of the Blood Coagulation Cascade Acc...

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22nd Euromicro international conference on parallel, distributed, and Network-Based processing (PDP)

作者： Bellini, Matteo Besozzi, Daniela Cazzaniga, Paolo Mauri, Giancarlo Nobile, Marco S. Univ Milan Dipartimento Informat I-20135 Milan Italy Univ Bergamo Dipartimento Sci Umane & Sociali I-24129 Bergamo Italy Univ Milano Bicocca Dipartimento Informat Sistemist & Comunicaz I-20126 Milan Italy SYSBIO Ctr Syst Biol I-20126 Milan Italy CNR Ist Anal Sistemi & Informat Antonio Ruberti I-00185 Rome Italy

ISBN: (纸本)9781479927289

The use of Graphics processing Units (GPUs) has recently witnessed ever growing applications for different computational analyses in the field of Life Sciences. In this work we present a CUDA-powered computational tool, named coagSODA, that was purposely developed and applied for the analysis of a large model of the blood coagulation cascade defined as a system of ordinary differential equations, based on both mass-action kinetics and Hill functions. We discuss the biological results of the parameter sweep analyses of this model, and show that GPUs can boost the computational performances up to 177x speedup.

关键词： biology computing graphics processing units parallel architectures CUDA-powered computational tool GPU Hill functions blood coagulation cascade coagSODA graphics processing units mass-action kinetics Analytical models Biological system modeling Coagulation Computational modeling Graphics processing units Mathematical model Blood Coagulation Cascade GPGPU computing LSODA Parameter Sweep Analysis

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Reducing MapReduce Abstraction Costs for Text-Centric applications 43

Reducing MapReduce Abstraction Costs for Text-Centric Applic...

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43rd Annual international conference on parallel processing (ICPP)

作者： Hsiao, Chun-Hung Cafarella, Michael Narayanasamy, Satish Univ Michigan Ann Arbor MI 48109 USA

ISBN: (纸本)9781479956180

The MapReduce framework has become widely popular for programming large clusters, even though MapReduce jobs may use underlying resources relatively inefficiently. There has been substantial research in improving MapReduce performance for applications that were inspired by relational database queries, but almost none for text-centric applications, including inverted index construction, processing large log files, and so on. We identify two simple optimizations to improve MapReduce performance on text-centric tasks: frequency-buffering and spill-matcher. The former approach improves buffer efficiency for intermediate map outputs by identifying frequent keys, effectively shrinking the amount of work that the shuffle phase must perform. Spill-matcher is a runtime controller that improves parallelization of MapReduce framework background tasks. Together, our two optimizations improve the performance of text-centric applications by up to 39.1%. We demonstrate gains on both a small local cluster and Amazon's EC2 cloud service. Unlike other MapReduce optimizations, these techniques require no user code changes, and only small changes to the MapReduce system.

关键词： MapReduce

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