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20th international conference on Algorithms and Architectures for parallel processing, ICA3PP 2020

20th International Conference on Algorithms and Architecture...

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20th international conference on Algorithms and Architectures for parallel processing, ICA3PP 2020

ISBN: (纸本)9783030602475

The proceedings contain 145 papers. The special focus in this conference is on Algorithms and Architectures for parallel processing. The topics include: An Improved Heterogeneous Dynamic List Schedule Algorithm;fastThetaJoin: An Optimization on Multi-way Data Stream θ -join with Range Constraints;a distributed Framework for Online Stream Data Clustering;end-System Aware Large File Transfer Solution for Rich Media applications over 5G Mobile Networks;broad Learning System with Proportional-Integral-Differential Gradient Descent;Accelerating De Novo Assembler WTDBG2 on Commodity Servers;Typing Everywhere with an EMG Keyboard: A Novel Myo Armband-Based HCI Tool;accelerating Pattern Matching on Intel Xeon Phi Processors;Redistributing and Optimizing High-Resolution Ocean Model POP2 to Million Sunway Cores;Efficient Sorting and Join on NVM-Based Hybrid Memory;performance Optimization for Feature Extraction Section of DeepChem;principal Component Analysis for Fingerprint Positioning;priority Based Service Placement Strategy in Heterogeneous Mobile Edge Computing;VTC: A Scheduling Framework Between Soft Real-Time and Hard Real-Time on Multimedia OS;A BSP Based Approach for NFAs Intersection;tight Bound of parallel Request Latency for Erasure-Coded distributed Storage System;High-Performance Simulations on GPUs Using Adaptive Time Steps;Performance Modeling of Stencil Computation on SW26010 Processors;Optimizing B+ -Tree Searches on Coupled CPU-GPU Architectures;OCVM: Optimizing the Isolation of Virtual Machines with Open-Channel SSDs;parallel SCC Detection Based on Reusing Warps and Coloring Partitions on GPUs;CANRT: A Client-Active NVM-Based Radix Tree for Fast Remote Access;distributed and parallel Ensemble Classification for Big Data Based on Kullback-Leibler Random Sample Partition;SWAF: A distributed Solar WSN Adaptive Framework.

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processing the v-KNN queries in wireless sensor networks

Processing the v-KNN queries in wireless sensor networks

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36th international conference on parallel processing in Xi'an, ICPP

作者： Lai, Yongxuan Chen, Hong Li, Cuiping School of Information Renmin University Laboratory of Data Engineering and Knowledge Engineering MOE

ISBN: (纸本)076952933X

Recently there have been growing interests in the applications of wireless sensor networks. Given a query point, which is a value, find a set of K nodes whose values are nearest to this point. We call this query the value-based KNN (v-KNN) query. v-KNN is a challenging query in wireless sensor networks because the network is highly distributed and global knowledge of the values are needed before the result set could be constructed. In this paper, we propose a new algorithm called KVC (v-KNN queries based on value clustering ) to process the v-KNN queries in wireless sensor networks in an energy efficient way. KVC takes advantage of the rich resources in the base station to do some optimizations to filter the irrelevant nodes and push down the v-KNN query into the network. The aim of KVC is to reduce the total communication cost as much as possible while processing the v-KNN queries correctly and efficiently. Simulation results on both realistic and synthetical data sets show that KVC outperforms the central processing in both average and hotspot energy consumption in wireless sensor networks. © 2007 IEEE.

关键词： Sensor nodes

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GaN-based Room Temperature Spintronics for Next Generation Low Power Consumption Electronic Devices 16

GaN-based Room Temperature Spintronics for Next Generation L...

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IEEE 16th international conference on Smart Cities - Improving Quality of Life Using ICT and IoT and AI (HONET-ICT)

作者： Saravade, Vishal Ghods, Amirhossein Woode, Andrew P. Zhou, Chuanle Ferguson, Ian Missouri Univ Sci & Technol Dept Elect & Comp Engn Rolla MO 65401 USA Kennesaw State Univ Southern Polytech Coll Engn & Engn Technol Marietta GA 30060 USA

ISBN: (纸本)9781728139715

There has been an exponential growth in the microelectronics industry over the last 70 years with a consistent miniaturization of transistors’ size and increase in the speed and on-chip transistors density with reasonable power consumption, as seen in Figure 1 [1] . This trend will saturate soon especially due to the unintended thermal noise that is dissipated, as the density of transistors on the chips increase and as the corresponding electronics approach their physical limits. There is a need to implement new processing and computing techniques [2] with more compact size, lower power consumption and enhanced performance. Neuromorphic computing mimics the parallel processing of the mammalian brain and the quantum decoherence within the neurons, and seems to be promising for future applications and needs high speed electronics [3] . Quantum computing could enhance the functionalities, storage capabilities, and data manipulation and transmission, for the next generation of devices. Spintronics is an enabling technology to meet the speed, power, and scalability requirements for quantum information and neuromorphic computing [4 , 5] . The non-volatile nature of spintronic memory could help to tackle power efficiency challenges of microelectronics. Spin of a material is directly related with magnetic, electrical, and optical properties. It is necessary to investigate materials and understand their properties to control and manipulate their spin and use for spintronic applications. However, most materials show conducive properties for spintronics at cryogenic temperatures, which limits their practical applications. There is a need to investigate spintronic materials for quantum applications at room temperature (RT).

关键词： Power consumption Spintronics Room temperature Transistor Device Component Microelectronics Neuromorphics QUANTUM DECOHERENCE Materials data manipulation Environmental Temperature cryogenic temperature dynamic efficiency Exponential Growth parallel processing (COMPUTERS) Spin

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An Extensible I/O Performance Analysis Framework for distributed Environments

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15th international Euro-Par conference on parallel Computing

作者： Eckart, Benjamin He, Xabin Ong, Hong Scott, Stephen L. Tennessee Technol Univ Cookeville TN 38505 USA Oak Ridge Natl Lab Oak Ridge TN USA

ISBN: (纸本)9783642038686

As distributed systems increase in both popularity and scale, it becomes increasingly important to understand as well as to systematically identify performance anomalies and potential opportunities for optimization. However;large scale distributed systems are often complex and non-deterministic clue to hardware and software heterogeneity and configurable runtime options that may boost or diminish performance. It is therefore important to be able to disseminate and present the information gleaned from a local system under a common evaluation methodology so that;such efforts can be valuable ill one environment;and provide general guidelines for other environments. Evaluation methodologies can conveniently be encapsulated inside of a common analysis framework that serves as an outer layer upon which appropriate experimental design and relevant workloads (benchmarking and profiling applications) can be supported. In this paper we present ExPerT, an Extensible Performance Toolkit. ExPerT defines a flexible framework from which a, set of benchmarking, tracing, and profiling applications call be correlated together in a unified interface. The framework consists primarily of two parts: all extensible module for profiling and benchmarking support, and a unified data discovery tool for information gathering acid parsing. We include a case study of disk I/O performance in virtualized distributed environments which demonstrates the flexibility of our framework for selecting benchmark suite, creating experimental design, and performing analysis.

关键词： I/O profiling Disk I/O distributed Systems Virtualization

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6th international European conference on parallel Computing, Euro-Par 2000

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6th international European conference on parallel Computing, Euro-Par 2000

ISBN: (纸本)9783540679561

The proceedings contain 189 papers. The special focus in this conference is on Support Tools, Evironments, Performance Evaluation, Prediction and Load Balancing. The topics include: Grid-based asynchronous migration of execution context in java virtual machines;visualization and computational steering in heterogeneous computing environments;a web-based finite element meshes partitioner and load balancer;an infrastructure for the construction of memory hierarchy analysis tools;on combining computational differentiation and toolkits for parallel scientific computing;generating parallel program frameworks from parallel design patterns;a callgraph-based search strategy for automated performance diagnosis;automatic performance analysis of MPI applications based on event traces;an extensible environment for visualizing multi-threaded programs executions;a statistical-empirical hybrid approach to hierarchical memory analysis;use of performance technology for the management of distributed systems;delay behavior in domain decomposition applications;automating performance analysis from UML design patterns;integrating automatic techniques in a performance analysis session;the specific cluster operation and performance evaluation benchmark suite;a fast and accurate approach to analyze cache memory behavior;performance prediction of a NAS benchmark program with chronosmix environment;a hierarchical approach to irregular problems;the impact of migration on parallel job scheduling for distributed systems;exploiting knowledge of temporal behaviour in parallel programs for improving distributed mapping;preemptive task scheduling for distributed systems and scheduling trees with large communication delays on two identical processors.

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PRISMA-MDE - Information visualization environment for multiple display

PRISMA-MDE - Information visualization environment for multi...

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2013 17th international conference on Information Visualisation, IV 2013

作者： Franco, Roberto Yuri Da Silva Meiguins, Bianchi Serique Meiguins, Aruanda Simoes Postgraduate Program in Computer Science - PPGCC Federal University of Pará Brazil

ISBN: (纸本)9780769550497

This paper aims to minimize the problems encountered in the handling of large amounts of visual data, proposing a scalable environment for distributed applications and information visualization (IV) with multiple coordinated views. The benefits of this architecture are improving the processing power for visualization tools, reduce the rendering time of visualization techniques, reducing the problem of occlusion and aggregation, among others. We will be presented usability testing, and comparative testing of performance (rendering time, memory usage, and processor) with an application of IV in a single desktop. © 2013 IEEE.

关键词： distributed computer systems

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Handling Big Data Efficiently by using Map Reduce Technique

Handling Big Data Efficiently by using Map Reduce Technique

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2015 IEEE international conference on Computational Intelligence & Communication Technology (CICT 2015)

作者： Maitrey, Seema Jha, C. K. Krishna Inst Engn & Technol Dept CSE Ghaziabad UP India Banasthali Univ Dept CSE Niwai Rajasthan India

ISBN: (纸本)9781479960224

Extremely large amount of data is being captured by today's organizations and is continue to increase. It becomes computationally inefficient to analyze such huge data. Research in data mining has addressed problem in discovering knowledge from these continuously growing large data sets. The amount of raw data available has been increasing at an exponential rate. The valuable information is hidden in large databases. Data mining has become an interesting area to extract the embedded precious information from them. For many years it has been found its root in all kinds of application areas. Thus, gave evolution to many data mining methods which started to get applied in several real life fields. But not all the methods possess the capability to deal with and handle the huge collection of data. In recent years, numbers of computation and data intensive scientific data analyses are established. To perform the large scale data mining analyses so as to meet the scalability and performance requirements of big data, several efficient parallel and concurrent algorithms got applied. A lot of parallel algorithms are put into action using different parallelization techniques. Among them, some common techniques used are threads, MPI, MapReduce etc. which yield different performance and usability characteristics. In computing rigorous problems, the MPI model works efficiently. But it is a complicated task to bring this model into the practical use. There is currently considerable enthusiasm around the MapReduce paradigm for large-scale data analysis. It is inspired by functional programming which allows expressing distributed computations on massive amounts of data. It is designed for large-scale data processing as it allows to run on clusters of commodity hardware. A prominent parallel data processing tool MapReduce is gaining significant momentum from both industry and academia as the volume of data to analyze grows rapidly. In this paper, we are going to work around MapReduce

关键词： Data Mining Clustering DBMS parallel processing Hadoop MapReduce

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A flexible hardware accelerator for morphological filters on FPGA 8

A flexible hardware accelerator for morphological filters on...

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8th international conference on Control, Decision and Information Technologies (CoDIT)

作者： Elloumi, Hejer Sellami, Dorra Rabah, Hassan Natl Engn Sch Sfax Elect Dept CEM Res Lab Sfax 3038 Tunisia Digital Res Ctr Sfax Km 10 3021 Tunis Rd Sfax Tunisia

ISBN: (纸本)9781665496070

Nowadays, the demand for embedded image processing, especially for computer vision applications is growing. Digital image processing is seeing intensive use in real time applications for several areas, such as the industrial environment, military equipment, automobile, entertainment, and medical instruments. Mathematical Morphological theory, offers a wide variety of tools, applied efficiently in most image processing steps at different scales, like image enhancement, segmentation, and classification. Therefore, such features yield a high potential of reconfiguration in image processing blocks. Morphological opening and closing operators are used as primary blocks in diverse image processing applications such as image cleaning and contrast enhancement. Moreover, using appropriate shapes and scales of structuring elements(SE), provides more flexibility and can significantly improve the enhancement performance. Nevertheless, such operators can be computationally intensive due to the increased complexity and the significant memory requirement. Also, the use of high image resolution and re-configurable size and shape of structuring elements may deepen this limitation significantly. In this paper, we consider hardware acceleration on FPGA as a promising solution to raise the above mentioned-challenges. Both intra-level and inter-level parallelism techniques based on the reuse of optimized dilation and erosion blocs are exploited to accelerate computation and save memory consumption. Unlike most existing works, this paper proposes a highly flexible architecture for opening and closing-based morphological filters. The architecture supports re-configurable shapes and sizes of structuring elements while keeping a high ability to meet real-time processing requirements and low power consumption. An improvement in terms of frame rates up to 8% with more than 2000 Fps for moderate size of structuring elements and high image resolution is achieved.

关键词： Image resolution Shape Memory management parallel processing Real-time systems Filtering theory Cleaning

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7th IFIP WG 6.1 international conference on distributed applications and Interoperable Systems, DAIS 2007

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7th IFIP WG 6.1 international conference on distributed applications and Interoperable Systems, DAIS 2007

ISBN: (纸本)3540728813

The proceedings contain 24 papers. The special focus in this conference is on Context-Awareness, distributed applications, Adaptation, Peer-to-Peer and Mobility. The topics include: Integrating facts and beliefs to model and reason about context;situation specification and realization in rule-based context-aware applications;observability and controllability of wireless software components;service level agreement management in federated virtual organizations;construction and execution of adaptable applications using an aspect-oriented and model driven approach;component adaptation in contemporary execution environments;managing distributed adaptation of mobile applications;middleware support for peer-to-peer distributed shared objects;peer-to-peer based QOS registry architecture for web services;a serialisation based approach for processes strong mobility;parallel state transfer in object replication systems;an agent-based recommender system for the semantic web;an html fragments based approach for portlet interoperability;scalable processing of context information with cosmos;experiences from developing a distributed context management system for enabling adaptivity;a flexible architecture for enforcing and composing policies in a service-oriented environment;managing concern interactions in middleware;an improved genetic algorithm for web services selection;a UML profile for modeling mobile information systems;a planning method for component placement in smart item environments using heuristic search and a generic infrastructure for decentralised dynamic loading of platform-specific code.

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High Performance Implementation of ARIA Encryption Algorithm on Graphics processing Units

High Performance Implementation of ARIA Encryption Algorithm...

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15th IEEE international conference on High Performance Computing and Communications (HPCC) /11th IEEE/IFIP international conference on Embedded and Ubiquitous Computing (EUC)

作者： Xiao, Limin Li, Yongnan Ruan, Li Yao, Guangchao Li, Deguo Beihang Univ State Key Lab Software Dev Environm Beijing 100191 Peoples R China Beihang Univ Sch Comp Sci & Engn Beijing 100191 Peoples R China

ISBN: (纸本)9780769550886

It becomes increasingly common to use GPU (Graphics processing Units) as accelerators to speed up compute-intensive sections of applications. Since block ciphers are supposed to be used for high speed encryption, it is important to implement them as fast as possible. Block cipher ARIA is a new type of encryption standard with four different Sboxes. This paper proposes three methods of high performance implementations of ARIA encryption algorithm on GPU. In order to reduce the data dependency, the round function of ARIA are merged into lookup tables and XOR operations. Encrypting process is performed in parallel and all the data in different GPU memory spaces are arranged properly. Experimental results demonstrate that these techniques accelerate the speed of ARIA encryption significantly. The quantitative performance comparison demonstrates acceleration up to 18 - 45 times speedup while the size of plaintext varies from 4M to 256M.

关键词： Cryptography ARIA parallel algorithm CUDA

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