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检索条件"任意字段=International Conference on Parallel and Distributed Processing Techniques and Applications"

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A New Segmentation-Based GPU-Accelerated Sparse Matrix-Vector Multiplication 57

A New Segmentation-Based GPU-Accelerated Sparse Matrix-Vecto...

引用

57th IEEE international Midwest Symposium on Circuits and Systems (MWSCAS)

作者： He, Kai Tan, Sheldon X-D Tlelo-Cuautle, Esteban Wang, Hai Tang, He Univ Calif Riverside Dept Elect Engn Riverside CA 92521 USA INAOE Puebla Mexico UESTC Sch Microelect & Solid State Elect Chengdu 610051 Peoples R China

ISBN: (纸本)9781479941322

In this paper, we propose a new fast parallel sparse matrix-vector multiplication (SpMV) algorithm on GPU platforms. The new algorithm, called segSpMV, is based on the compressed sparse row (CSR) format and can be applied to wide computational applications with both structured and unstructured matrices. The SpMV operation has very low computing to communication ratio and is bandwidth-limited. The new SpMV algorithm tries to reduce the memory access by partitioning the rows, whose nonzero patterns are irregular in general, into a number of fixed-length segments. As a result, both multiplication and summation phases now can enjoy the coalesced memory access and they can be finished in one kernel launch. The summation phase can also be further improved by using GPU reduction techniques for large segment lengths. The resulting SpMV method constantly outperforms all published algorithms and the SpMV method in the recent CUSPARSE library based on a set of public matrix benchmarks.

关键词： Graphics processing units Instruction sets Kernel Memory management Multicore processing Sparse matrices Vectors instruction sets Store management Sparse matrix Graphics processing Unit Kernel Multiplication Seeds fixed length Cloning Vectors

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A Survey on Recent Hardware and Software-Level Cache Management techniques

A Survey on Recent Hardware and Software-Level Cache Managem...

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international Symposium on parallel and distributed processing with applications, ISPA

作者： Alberto Scolari Filippo Sironi Donatella Sciuto Marco Domenico Santambrogio Dipartimento di Elettronica Informazione e Bioingegneria Milano Italy

Multi and many-core processors have emerged as the dominant solution for processing in the whole range of computer system, from small devices to large-scale installations. Chip multi-processors, which are homogeneous, multi and manycore processors, offer an unprecedented amount of on-chip, shared resources and brings a unique set of challenges. Given the importance of the Last-Level Cache management techniques to achieve near-perfect isolation, we survey the state of the art and propose research directions to address the most pressing issues in modern computer systems. To better understand the various research directions in the field, we propose a classification of the presented techniques. Finally, we discuss possible research directions.

关键词： Hardware Runtime Color Instruction sets Image color analysis History

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Scaling data mining in massively parallel dataflow systems

Scaling data mining in massively parallel dataflow systems

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2014 ACM SIGMOD/PODS Ph.D. Symposium, SIGMOD 2014

作者： Schelter, Sebastian Technische Universität Berlin Germany

ISBN: (纸本)9781450329248

The demand for mining large datasets using shared-nothing clusters is steadily on the rise. Despite the availability of parallel processing paradigms such as MapReduce, scalable data mining is still a tough problem. Naïve ports of existing algorithms to platforms like Hadoop exhibit various scalability bottlenecks, which prevent their application to large real-world datasets. These bottlenecks arise from various pitfalls that have to be overcome, including the scalability of the mathematical operations of the algorithm, the performance of the system when executing iterative computations, as well as its ability to efficiently execute meta learning techniques such as cross-validation and ensemble learning. In this paper, we present our work on overcoming these pitfalls. In particular, we show how to scale the mathematical operations of two popular recommendation mining algorithms, discuss an optimistic recovery mechanism that improves the performance of distributed iterative data processing, and outline future work on efficient sample generation for scalable meta learning. Early results of our work have been contributed to open source libraries, such as Apache Mahout and Stratosphere, and are already deployed in industry use cases. Copyright is held by the owner/author(s).

关键词： Data mining

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Modeling CPU Energy Consumption of HPC applications on the IBM POWER7

Modeling CPU Energy Consumption of HPC Applications on the I...

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Euromicro conference on parallel, distributed and Network-Based processing

作者： Philipp Gschwandtner Michael Knobloch Bernd Mohr Dirk Pleiter Thomas Fahringer University of Innsbruck Innsbruck Austria Forschungszentrum Jülich GmbH Jülich Supercomputing Centre Jülich Germany

Energy consumption optimization of HPC applications inherently requires measurements for reference and comparison. However, most of today's systems lack the necessary hardware support for power or energy measurements. Furthermore, in-band data availability is preferred for specific optimization techniques such as auto-tuning. For this reason, we present in-band energy consumption models for the IBM POWER7 processor based on hardware counters. We demonstrate that linear regression is a suitable means for modeling energy consumption, and we rely on already available, high-level benchmarks for training instead of self-written or hand-tuned micro-kernels. We compare modeling efforts for different instruction mixes caused by two compilers (GCC and IBM XL) as well as various multi-threading usage scenarios, and validate across our training benchmarks and two real-world applications. Results show mean errors of approximately 1% and overall max errors of 5.3% for GCC.

关键词： Hardware Energy consumption Radiation detectors Benchmark testing Vectors Training Energy measurement

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Implementation of parallel computing FAST Algorithm on mobile GPU

引用

2012 international conference on Electrical and Electronics Engineering, ICEE 2012

作者： Chou, Chien-Hsing Liu, Peter Wu, Taiyi Chien, Yihsiang Zhao, Yuxiang Department of Electrical Engineering Tamkang University New Taipei City Taiwan Department of Computer Science and Information Engineering National Quemoy University Quemoy Taiwan

ISBN: (纸本)9781461449805

Corner detection is an extremely important technique in image recognition, which is widely employed in various applications for image recognition. With the widespread use of mobile devices, image recognition techniques are frequently applied in such devices. However, the hardware resource of smartphones is lacking and restricted;it is a difficult task to apply the techniques of corner detection smoothly in these devices. To enhance the computational speed, the FAST corner detection algorithm is implemented with parallel computing of GPU in mobile devices. In the experiments, the computational speed of the FAST corner detection algorithm increases 24 times after using GPU parallel computing. Compared with the widely known SURF algorithm, which is computed with mobile CPU only, the proposed technique in this study is 468 times faster than SURF algorithm. © 2014 Springer Science+Business Media New York.

关键词： Graphics processing unit

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Effective integrated parallel distributed processing approach in optimized multi-cloud computing environment 6

Effective integrated parallel distributed processing approac...

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6th international conference on Advanced Computing, ICoAC 2014

作者： Indira, K. Kavithadevi, M.K. Thiagarajar College of Engineering India

ISBN: (纸本)9781479984664

Cloud computing service make possible applications by given that visualized resources that can be energetically allocated to virtual clusters. Nowadays IT companies and business companies make use of cloud environment for virtual storage and managing users. The job organization is the input position in cloud service and job arrangement troubles is vital competence of the whole cloud services. Job arrangement mechanism is the range of appropriate property for job implementation. A job arrangement has to make happy for virtual users to decide about Quality of Service. In this paper, the proposed method is used to enhance job arrangement and resource allotment by minimizing make span and reducing source price and safeguard error acceptance and quality service. The proposed algorithms have been evaluated with existing scheduling policies through CloudSim toolkit. The experimental results show that proposed framework gives better results in terms of execution time, user response, execution cost and time on different cloud workloads as compared to existing algorithms. © 2014 IEEE.

关键词： Cloud computing

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processing big data graphs on memory-restricted systems

Processing big data graphs on memory-restricted systems

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international conference on parallel Architecture and Compilation techniques (PACT)

作者： Harshvardhan Nancy M. Amato Lawrence Rauchwerger Parasol Laboratory Department of Computer Science and Engineering Texas A&M University

ISBN: (纸本)9781509066070

With the advent of big-data, processing large graphs quickly has become increasingly important. Most existing approaches either utilize in-memory processing techniques, which can only process graphs that fit completely in RAM, or disk-based techniques that sacrifice performance. Contribution. In this work, we propose a novel RAM-Disk hybrid approach to graph processing that can scale well from a single shared-memory node to large distributed-memory systems. It works by partitioning the graph into subgraphs that fit in RAM and uses a paging-like technique to load subgraphs. We show that without modifying the algorithms, this approach can scale from small memory-constrained systems (such as tablets) to large-scale distributed machines with 16, 000+ cores.

关键词： Random access memory Libraries parallel processing Twitter Software algorithms Programming Optimization

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17th East European conference on advances in databases and information systems, ADBIS 2013

17th East European conference on advances in databases and i...

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17th East European conference on Advances in Databases and Information Systems, ADBIS 2013

ISBN: (纸本)9783319018621

The proceedings contain 51 papers. The special focus in this conference is ADBIS Short Contributions, Special Session on Big Data: New Trends and applications, The Second international Workshop on GPUs in Databases, The Second international Workshop on Ontologies Meet Advanced Information Systems, The First international Workshop on Social Business Intelligence: Integrating Social Content in Decision Making and Doctoral Consortium. The topics include: New Trends in databases and information systems;New trends in databases and information systems;New ontological alignment system based on a non-monotonic description logic;spatiotemporal co-occurrence rules;An efficient spatial access method for highly redundant point data;Labeling association rule clustering through a genetic algorithm approach, Time series queries processing with GPU support;Rule-based multi-dialect infrastructure for conceptual problem solving over heterogeneous distributed information resources;distributed processing of Xpath queries using mapreduce;A Query language for workflow instance data;When too similar is bad;Viable systems model based information flows;On materializing paths for faster recursive querying;XSLTmark II - a simple, extensible and portable XSLT benchmark;ReMoSSA;DSD;Designing parallel relational data warehouses;Big data new frontiers;Extraction, sentiment analysis and visualization of massive public messages;Desidoo, a big-data application to join the online and real-world marketplaces;GraphDB - storing large graphs on secondary memory;Hadoop on a low-budget general purpose hpc cluster in academia and Discovering contextual association rules in relational databases.

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Adaptive Dynamic On-chip Memory Management for FPGA-based reconfigurable architectures 24

Adaptive Dynamic On-chip Memory Management for FPGA-based re...

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24th international conference on Field Programmable Logic and applications, FPL 2014

作者： Dessouky, Ghada Klaiber, Michael J. Bailey, Donald G. Simon, Sven Institute for Parallel and Distributed Systems University of Stuttgart Germany School of Engineering and Advanced Technology Massey University Palmerston North New Zealand

ISBN: (纸本)9783000446450

In this paper, an adaptive architecture for dynamic management and allocation of on-chip FPGA Block Random Access Memory (BRAM) resources is presented. This facilitates the dynamic sharing of valuable and scarce on-chip memory among several processing elements (PEs), according to their dynamic run-time memory requirements. Different real-time applications are becoming increasingly dynamic which leads to unexpected and variable memory footprints, and static allocation of the worst-case memory requirements would result in costly overheads and inefficient memory utilization. The proposed scalable BRAM memory management architecture adaptively manages these dynamic memory requirements and balances the buffer memory over several PEs to reduce the total memory required, compared to the worst-case memory footprint for all PEs. The run-time adaptive system allocates BRAM to each PE sufficiently fast enough as required and utilized. In a case study, a significant improvement in BRAM utilization with limited overhead has been achieved due to the adaptive memory management architecture. The proposed system supports different BRAM types and configurations, and automated dynamic allocation and deallocation of BRAM resources, and is therefore well suited for the dynamic memory footprints of FPGA-based reconfigurable architectures. © 2014 Technical University of Munich (TUM).

关键词： Field programmable gate arrays (FPGA)

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Designing Bit-Reproducible Portable High-Performance applications

Designing Bit-Reproducible Portable High-Performance Applica...

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international Symposium on parallel and distributed processing (IPDPS)

作者： Andrea Arteaga Oliver Fuhrer Torsten Hoefler ETH Zurich Switzerland Federal Office for Meteorology and Climatology MeteoSwiss Zurich Switzerland

ISBN: (纸本)9781479938018

Bit-reproducibility has many advantages in the context of high-performance computing. Besides simplifying and making more accurate the process of debugging and testing the code, it can allow the deployment of applications on heterogeneous systems, maintaining the consistency of the computations. In this work we analyze the basic operations performed by scientific applications and identify the possible sources of non-reproducibility. In particular, we consider the tasks of evaluating transcendental functions and performing reductions using non-associative operators. We present a set of techniques to achieve reproducibility and we propose improvements over existing algorithms to perform reproducible computations in a portable way, at the same time obtaining good performance and accuracy. By applying these techniques to more complex tasks we show that bit-reproducibility can be achieved on a broad range of scientific applications.

关键词： Standards Libraries Meteorology Computer architecture Accuracy Computational modeling Graphics processing units

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