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On Using distributed Extended XQuery for Web Data Sources as Services

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9th international conference on Web Engineering

作者： Ali, Muhammad Intizar Pichler, Reinhard Truong, Hong-Linh Dustdar, Schahram Vienna Univ Technol Database & Artificial Intelligence Grp Vienna Austria Vienna Univ Technol Distributed Syst Grp Vienna Austria

ISBN: (纸本)9783642028175

DeXIN (distributed extended XQuery for data INtegration) integrates multiple, heterogeneous, highly distributed and rapidly changing web data sources in different formats, e.g. XML, RDF and relational data. DeXIN is a RESTful data integration web service which integrates heterogeneous distributed data sources, including data services (DaaS - data as a service). At the heart of DeXIN is an XQuery extension that allows users/applications to execute a single query against distributed, heterogeneous web data sources or data services. In this system demo, we show how DeXIN can provide an optimized, distributed and parallel query processing and data integration at the same time.

关键词： Data integration

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Towards Automating Integration Testing of .NET applications using Roslyn

Towards Automating Integration Testing of .NET Applications ...

引用

IEEE international conference on Software Quality, Reliability and Security (Companion Volume)

作者： Saadatmand, Mehrdad Res Inst Sweden RISE RISE SICS Vasteras Boras Sweden

ISBN: (纸本)9781538620724

The increasing complexity and size of software products combined with pressure to have shorter time-to-market is making manual testing techniques too costly and unscalable. This is particularly observed in industrial systems where continuous integration and deployment are applied. Therefore, there is a growing need to automate the testing process and make it scalable with respect to the context of real-world and large industrial applications. While there are already some solutions for generation of unit level test cases, automatic generation of integration level test cases to verify interaction of software components poses specific challenges especially in object-oriented applications. In this paper, we describe our ongoing work in introducing a solution to automate generation of integration test cases for C# applications by exploiting the code analysis capabilities of Microsoft. NET compiler platform known as Roslyn. This is done in collaboration with ABB Industrial Automation Control Technologies (IACT) in Vasteras-Sweden, where the software for the ABB Ability (TM) 800xA distributed control system is developed.

关键词： Estimation Field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Target Container: A Target-Centric parallel Programming Abstraction for Video-based Surveillance

Target Container: A Target-Centric Parallel Programming Abst...

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13th international conference on Advanced Concepts for Intelligent Vision Systems (ACIVS) / 5th ACM/IEEE international conference on distributed Smart Cameras (ICDSC)

作者： Hong, Kirak Smaldone, Stephen Shin, Junsuk Lillethun, David Iftode, Liviu Ramachandran, Umakishore Georgia Inst Technol Atlanta GA 30332 USA Rutgers State Univ New Brunswick NJ USA

ISBN: (纸本)9781457717079

We introduce a novel abstraction, the target container (TC), which serves as a parallel programming model and execution framework for developing complex applications for tracking multiple targets in a large-scale camera network. The key insight is to allow the domain expert (e.g., a vision researcher) to focus on the algorithmic details of target tracking and let the system deal with providing the computational resources (cameras, networking, and processing) to enable target tracking. Each TC has a one-to-one correspondence with a target, possibly tracked from multiple cameras. The domain expert provides the code modules for target tracking (such as detectors and trackers) as handlers to the TC system. The handlers are invoked dynamically by the TC system to discover new targets (detector) and to follow existing targets (tracker). The TC system also provides an interface for merging TCs whenever they are determined to be corresponding to the same target. This paper presents the design of the TC system, details of an experimental prototype, and an example application to demonstrate the simplicity of using the TC programming model.

关键词： Cameras Computational modeling Data structures Detectors Programming Surveillance Target tracking

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A High Throughput parallel Hash Table Accelerator on HBM-enabled FPGAs

A High Throughput Parallel Hash Table Accelerator on HBM-ena...

引用

19th international conference on Field-Programmable Technology (ICFPT)

作者： Yang, Yang Kuppannagari, Sanmukh R. Prasanna, Viktor K. Univ Southern Calif Dept Elect & Comp Engn Los Angeles CA 90007 USA

ISBN: (纸本)9781665423021

Hash table is a key component in a number of AI algorithms such as Graph Convolutional Neural Networks, Approximate Nearest Neighbor Search, Bag-of-Words based Text Mining algorithms, etc. Efficient implementation of hash tables is needed for a wide range of AI applications. High bandwidth memory (HBM), which provides significantly higher memory bandwidth than traditional DDR, has recently gained popularity. In this work, we propose a high throughput parallel hash table targeting HBM-enabled FPGAs. Our design is tailored for HBM architecture, allowing flexible and balanced mapping between processing engines and HBM channels at design time given query distribution and hash table properties (key/value length, collision handling, and hash table size). We further develop a novel data organization and query flow which enable our accelerator to scale up to 16 processing engines (PEs). The proposed design supports parallel search, insert, and delete queries. Experimental results demonstrate that our hash table accelerator can achieve up to 3575 million operations per second (MOPS) for search-only queries and up to 1470 MOPS for 50%/50% distributed search/update queries on HBM-enabled FPGAs. It achieves better throughput than the state-of-the-art GPU and FPGA designs by up to 3.5 x and 3.2 x respectively.

关键词： hash table High bandwidth Memory parallel computing

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Concept of User-PC Computing System 2

Concept of User-PC Computing System

引用

IEEE international conference on Consumer Electronics - Taiwan (ICCE-TW 2015)

作者： Funabiki, Nobuo Kim, Bongsu Aoyagi, Yuki Okayama Univ Okayama 7008530 Japan

ISBN: (纸本)9781479987450

The User-PC computing system (UPC) is a technology of realizing a parallel computing environment using idling computing resources (CPU cycles) in Personal Computers (PCs) of members in the same organization or group such as a laboratory in a university and a section in a company. UPC can resolve drawbacks in the registration of computing projects, the reliability of computing results, and the continuity of computations that may often happen in Volunteer Computing (VC) systems using voluntary PCs in the Internet. Thus, UPC can be easily and comfortably used by computing users. In this paper, we show the concept of UPC and preliminary evaluations.

关键词： Browsers Computational modeling Computer applications distributed processing Instruction sets Web servers

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Coherence, Synchronization and State-sharing in distributed Shared-memory applications

Coherence, Synchronization and State-sharing in Distributed ...

引用

1993 international conference on parallel processing, ICPP 1993

作者： Ananthanarayanan, R. Ahamad, Mustaque LeBlanc, Richard J. College of Computing Georgia Institute of Technology AtlantaGA30332-0280 United States

ISBN: (纸本)0849389836

distributed shared memory consistency protocols suffer from poor performance due their lack of application spe cific knowledge which can be exploited in message passing systems. Explicit synchronization can be used in mem ory coherence activities to realize the benefits of applica tion specific information if the user is allowed to associate data with synchronization operations. In this paper, we present a refinement of synchronization and data sharing patterns and identify attributes that can be used to asso ciate data with suitably modified synchronization primi tives. We present modifications for semaphores, read-write locks, and barriers which can be used to implement a va riety of interaction patterns including mutual exclusion, producers-consumers, readers-writers etc. We claim that the performance of applications programmed using shared memory can be comparable to their message passing imple mentation which use intermediary entities such as mail boxes. On the other hand, programming is easier with our system, since it allows for richer patterns of interaction than when directly using low-level messages. © 1993 IEEE.

关键词： Synchronization

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An FPGA distributed Implementation Model for Embedded SOM with On-Line Learning

An FPGA Distributed Implementation Model for Embedded SOM wi...

引用

international Joint conference on Neural Networks (IJCNN)

作者： de Abreu de Sousa, Miguel Angelo Del-Moral-Hernandez, Emilio Univ Sao Paulo Sch Engn Dept Elect Syst Engn Sao Paulo Brazil Fed Inst Educ Sci & Technol IFSP Elect Dept Sao Paulo Brazil

ISBN: (纸本)9781509061822

Neuroengineering has contributed to the increasing capability of embedded hardware to efficiently execute neural computation models. These hardware structures, suitable for implementing only the recall phase or both phases learning and recall - of artificial neural networks (ANNs) are generally identified as neuromorphic systems. Some features of the FPGA technology resemble characteristics usually associated to ANNs, such as the parallel processing and the configurability of digital circuits. Embedded neural systems elaborated to execute Self-Organizing Maps (SOMs) can take advantage of the circuit parallelism to speed-up training process and also of the design flexibility by the hardware reconfiguration enabled by FPGA chips. Hardware-based SOMs capable of executing the training process on chip are relevant because they can be employed in a wide variety of stand-alone applications. IoT and mobile robotics are examples of some challenging research fields that use unsupervised learning to extract information from the surrounding environment and require the portability of embedded systems. This work presents a distributed architecture to implement SOM learning and recall algorithms into FPGAs. The distributed model does not employ any type of central control unit hence allowing a simple hardware redesign process during the configuration of the neural system. The set of experiments used for verifying the proposed architecture is specified in a data stream format. The aim of choosing streaming condition is to simulate applications in which the FPGA-based SOM must process a continuous flow of information autonomously. All the steps of the SOM learning algorithm to process an input sample are performed in a single clock cycle and implementation results show a maximum clock speed of 2.38 MHz. Synthesis reports on FPGA implementation of the distributed architecture for the experiments carried out herein also indicate that the factor of increase in consumption of chip resou

关键词： Embedded neural systems Self-Organizing Maps Neuromorphic hardware On-line learning FPGA

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Intelligent SVM Based Food Intake Measurement System

Intelligent SVM Based Food Intake Measurement System

引用

IEEE international conference on Computational Intelligence and Virtual Environments for Measurement Systems and applications (CIVEMSA)

作者： Pouladzadeh, Parisa Shirmohammadi, Shervin Arici, Tarik Univ Ottawa Distributed & Collaborat Virtual Environments Res Ottawa ON Canada Istanbul Sehir Univ Coll Engn & Nat Sci Istanbul Turkey

ISBN: (纸本)9781467347037

As people across the globe are becoming more interested in watching their weight, eating more healthily, and avoiding obesity, a system that can measure calories and nutrition in everyday meals can be very useful. Recently, due to ubiquity of mobile devices such as smart phones, Net books and tablets, the health monitoring applications are accessible by the patients practically all the time. A semi-automated food intake measurement application, running on a mobile device, could assist the patient to estimate his/her consumption calories. In this paper, to improve the accuracy of the current state of the art technologies, we have engaged color k-mean clustering along with color mean shift and texture segmentation schemes to get more accurate results in segmentation phase. Furthermore, the proposed system is built on food image processing techniques and uses nutritional fact tables. Via a special calibration technique, our system uses the built-in camera of such mobile devices and records a photo of the food before and after eating it in order to measure the consumption of calorie and nutrient components. The proposed algorithm extracts important features such as shape, color, size and texture. Using various combinations of these features and adopting computational intelligence techniques, such as support vector machine, as a classifier, accurate results are achieved which are very close to the real calorie of the food.

关键词： Food recognition Shape Color Size and Texture detection Support vector machine (SVM) Calorie measurement

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An Improved and Efficient distributed Computing Framework with Intelligent Task Scheduling 20th

An Improved and Efficient Distributed Computing Framework wi...

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20th international conference on distributed Computing and Intelligent Technology (ICDCIT)

作者： Venkatesh, Pruthvi Raj Krishna, P. Radha Natl Inst Technol Dept Comp Sci & Engn Warangal Telangana India

ISBN: (纸本)9783031505829;9783031505836

distributed Computing platforms involve multiple processing systems connected through a network and support the parallel execution of applications. They enable huge computational power and data processing with a quick response time. Examples of use cases requiring distributed computing are stream processing, batch processing, and client-server models. Most of these use cases involve tasks executed in a sequence on different computers to arrive at the results. Numerous distributed computing algorithms have been suggested in the literature, focusing on efficiently utilizing compute nodes to handle tasks within a workflow on on-premises setups. Industries that previously relied on on-premises setups for big data processing are shifting to cloud environments offered by providers such as Azure, Amazon, and Google. This transition is driven by the convenience of Platform-as-a-Service offerings scuh as Batch Services, Hadoop, and Spark. These PaaS services, coupled with auto-provisioning and auto-scaling, reduce costs through a Pay-As-You-Go model. However, a significant challenge with cloud services is configuring them with only a single type of machine for performing all the tasks in the distributed workflow, although each task has diverse compute node requirements. To address this issue in this paper, we propose an Intelligent task scheduling framework that uses a classifier-based dynamic task scheduling approach to determine the best available node for each task. The proposed framework improves the overall performance of the distributed computing workflow by optimizing task allocation and utilization of resources. Although Azure Batch Service is used in this paper to illustrate the proposed framework, our approach can also be implemented on other PaaS distributed computing platforms.

关键词： distributed Computing Azure Batch Decision Tree PaaS CSP

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On-the-Fly Calculation of Model Factors for Multi-paradigm applications 28th

On-the-Fly Calculation of Model Factors for Multi-paradigm A...

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28th international conference on parallel and distributed Computing (Euro-Par)

作者： Protze, Joachim Orland, Fabian Haldar, Kingshuk Koritzius, Thore Terboven, Christian Rhein Westfal TH Aachen IT Ctr Aachen Germany Univ Stuttgart HLRS Stuttgart Germany

ISBN: (纸本)9783031125973;9783031125966

Model factors provide initial insight into fundamental issues of parallel applications. These metrics elaborate beyond conventional HPC metrics to indicate whether an application suffers from systemic or local load imbalances, or high cost for synchronization or data transfer. The metrics are also useful to compare the parallel characteristics of different versions of the same application. This work proposes a model of separating the impact factors of different layered parallelism paradigms. In contrast to previous work in this area, we successfully separate all factors and can prove all efficiency values to be between 0 and 1. While we use MPI OpenMP as an example in this work, the general concepts also apply to layering other parallel programming paradigms. As a proof of concept, we present a tool that collects the necessary performance data and determines different critical paths in the execution without measurable runtime overhead. We evaluate the methodology with synthetic source code examples but also with a real-world application and an application using the latest or future MPI and OpenMP features in order to evaluate the methodology on applications with an overlap of asynchronous computation and communication at the highest possible concurrency.

关键词： Data transfer

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