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检索条件"任意字段=International Conference on Parallel and Distributed Processing Techniques and Applications"

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Applying speculation techniques to implement functional units

Applying speculation techniques to implement functional unit...

引用

IEEE Workshop on Machine Learning for Signal processing

作者： Del Barrio, Alberto A. Molina, Maria C. Mendias, Jose M. Andres, Esther Hermida, Roman Tirado, Francisco Univ Complutense Madrid Dpto Arquitectura Comp & Automat E-28040 Madrid Spain

ISBN: (纸本)9781424426577

This paper justifies the use of estimation and prediction of carries to increase the performance of functional units built with the replication of full adders while keeping a low area penalization. Adders and multipliers are the most representative modules in this group of functional units. The use of these design techniques allows the implementation of modules with performance improvements ranging from 20% to 50% with only an area overheads around 5%. These functional units are suitable for asynchronous circuits but they could also be introduced in synchronous circuits with speculative techniques. The basic idea consists in estimating the carry out from some parts of the functional units, allowing every part to operate independently and in parallel. These modules are connected to build bigger ones. Results from simulations show that for some applications it is possible to make predictions even more accurate that the bit-based estimation. Predictions have also the advantage they can be introduced in the multipliers design, whether estimators cannot. These predictions are similar to the ones used in the branch prediction in a processor.

关键词： functional units design prediction techniques high-performance

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Formal techniques for Networked and distributed Systems: FORTE 2001

引用

2013年

作者： Myungchul Kim Byoungmoon Chin Sungwon Kang Danhyung Lee

ISBN: (纸本)9781475788259

This book presents the latest worldwide results in theory and practice of formal techniques for networked and distributed systems. The theme of the book is addressed by specialized papers in the following areas: Formal Methods in Software Development, Process Algebra, Timed Automata, Theories and applications of Verification, distributed Systems Testing, Test Sequence Derivation. In addition, the last part of the book contains special contributions by leading researchers in the above areas to add breadth and give more perspectives to the results. This volume contains the selected proceedings of the international conference on Formal techniques for Networked and distributed Systems (Forte 2001), which was sponsored by the international Federation for Information processing (Ifip) and held in Cheju Island, Korea in August 2001. Forte 2001 combines two prestigious conferences, Forte (Formal Description techniques for distributed Systems and Communication Protocols) and Pstv (Protocol Specification Testing and Verification), and has more than 20 years of history. Formal techniques for Networked and distributed Systems will be essential reading for researchers and engineers working in the fields of communications, test equipment R&D, and telecommunications, as well as to software engineering tool developers.

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Multiprocessing Performance Analysis Using Numerical Integration techniques

Multiprocessing Performance Analysis Using Numerical Integra...

引用

2024 international conference on Computing, Communication, Cybersecurity and AI

作者： Yadav, Kartikey Kothari, Soham Prajapat, Shaligram Int Inst Profess Studies DAVV Indore India

ISBN: (纸本)9783031744426;9783031744433

Weddle's rule is one of the best for high-order numerical integration solving techniques. For better accuracy, more step sizes are used to compute the end result, but this leads to an increased number of computations. parallel and multicore computations help us better enhance this computation. To maximize the performance ofWeddle's rule on contemporary processors, this research will investigate the role of multiprocessing. Utilizing multiprocessing and parallel computing techniques can significantly enhance the efficiency, accuracy, and scalability of these computations. In theory, this should reduce the computation time of the integration process as the workload is divided among multiple processors, resulting in better performance. Despite the theoretical promise of reduced computation times through multiprocessing, practical applications often reveal a discrepancy between expected and actual performance gains. This study analyzes the time consumed in computation over the number of processors (1 to 12) and the number of subintervals used in computation during the execution of the integration process. Also, the machine learning technique Gradient Descent can be used to predict time consumption using features like time taken, input size, and number of processors. The model has a 95% accuracy.

关键词： Numerical integration Weddle's rule Gradient descent Multi processing Multi-core performance

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distributed Training Based on Horizontal Scaling for Food Image Classification 4

Distributed Training Based on Horizontal Scaling for Food Im...

引用

4th international conference on Embedded and distributed Systems, EDiS 2024

作者： El Amin, Gasbaoui Mohammed Soumia, Benkrama Mostefa, Bendjima Sofiane, Abden Ikram, Kourtiche Tahri Mohammed University Laboratory of Tit Mathematics and Computer Science Department Bechar Algeria

ISBN: (纸本)9798331519872

Deep learning models for food image classification rely on vast amounts of data to effectively recognize and differentiate between various food items. However, training these models on such extensive datasets presents significant computational challenges. Big data and distributed training are inherently complementary in addressing these challenges. Big data involves large volumes of information that traditional single-machine processing cannot handle efficiently. distributed training offers a solution by enabling machine learning models to scale across multiple machines or nodes, thereby more effectively processing and learning from extensive datasets. By partitioning tasks into smaller chunks processed in parallel, distributed training optimizes computational resources, ensuring efficient analysis of big data while maintaining fault tolerance and performance scalability. This paper explores various strategies for distributed training and communication between GPUs. We compare the performance and utilization of a single P100 GPU versus two T4 GPUs on the Food-11 dataset, focusing on accuracy and training time. Our results indicate that using two GPUs yields slightly better performance than a single GPU, reducing the training time by 125 seconds, decreasing the validation dataset loss by 0.02, and increasing the accuracy by 1%. The overall accuracy achieved is 92%, with a corresponding loss of 0.28. © 2024 IEEE.

关键词： big data data distribution deep learning food images GPUs parallel processing PyTorch

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Research on the Key Technology of Big Data Service in University Library 13

Research on the Key Technology of Big Data Service in Univer...

引用

13th international conference on Natural Computation, Fuzzy Systems and Knowledge Discovery (ICNC-FSKD)

作者： Ye, Chunlei Lib Beijing Univ Agr Informat Consultat Dept Beijing Peoples R China

ISBN: (纸本)9781538621653

With the development of information technology of university library, the mass data of the university library has the basic characteristics of Big Data. However, the current situation of the university library is the lack of distributed storage and computing model for massive data, the lack of capacity to handl the diverse data sources, including the structured, semi structured and unstructured data, the lack of a simple, flexible application model of big data *** order to solve the problems in the service innovation of University Libraries in China, such as the problem of distributed storage and computation of massive data, the distributed management of diverse data sources, the simple and flexible application of big data services, this paper analyzes the research contents of big data processing, Hadoop ecosystem and the demand for big data services in University Libraries, and presents a technology framework for big data service in University Libraries based Hadoop. The framework includes the distributed storage and parallel computing model of mass data, the distributed management model of diverse data sources and the model of diversified service application for university libraries. This framework takes full account of the service innovation change of University Library under the environment of big data, such as data storage and calculation, data management and service applications et al. It can solve the key technical problems of big data service of University Library in a certain extent.

关键词： Hadoop Big Data hadoop big data service University Libraries

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Online Automated Reliability Classification of Queueing Models for Streaming processing Using Support Vector Machines 21st

Online Automated Reliability Classification of Queueing Mode...

引用

21st international conference on parallel and distributed Computing (Euro-Par)

作者： Beard, Jonathan C. Epstein, Cooper Chamberlain, Roger D. Washington Univ Dept Comp Sci & Engn St Louis MO 63130 USA

ISBN: (纸本)9783662480960;9783662480953

When do you trust a performance model? More specifically, when can a particular model be used for a specific application? Once a stochastic model is selected, its parameters must be determined. This involves instrumentation, data collection, and finally interpretation;which are very time consuming. Even when done correctly, the results hold for only the conditions under which the system was characterized. For modern, dynamic stream processing systems, this is far too slow if a model-based approach to performance tuning is to be considered. This work demonstrates the use of a Support Vector Machine (SVM) to determine if a stochastic queueing model is usable or not for a particular queueing station within a streaming application. When combined with methods for online service rate approximation, our SVM approach can select models while the application is executing (online). The method is tested on a variety of hardware and software platforms. The technique is shown to be highly effective for determining the applicability of M/M/1 and M/D/1 queueing models to stream processing applications.

关键词： Support vector machines

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A parallel Algorithm for Compression of Big Next-Generation Sequencing Datasets 14

A Parallel Algorithm for Compression of Big Next-Generation ...

引用

13th IEEE international Symposium on parallel and distributed processing with applications

作者： Perez, Sandino Vargas Saeed, Fahad Western Michigan Univ Dept Comp Sci Kalamazoo MI 49008 USA Western Michigan Univ Dept Elect & Comp Engn Kalamazoo MI 49008 USA

ISBN: (纸本)9781467379526

The amount of big data from high-throughput Next-Generation Sequencing (NGS) techniques represents various challenges such as storage, analysis and transmission of massive datasets. One solution to storage and transmission of data is compression using specialized compression algorithms. The existing specialized algorithms suffer from poor scalability with increasing size of the datasets and best available solutions can take hours to compress gigabytes of data. Compression and decompression using these techniques for peta-scale data sets is prohibitively expensive in terms of time and energy. In this paper we introduce paraDSRC, a parallel implementation of the DNA Sequence Reads Compression (DSRC) application using a message passing model that presents reduction of the compression time complexity by a factor of O(1/p) (where p is the number of processing units). Our experimental results show that paraDSRC achieves compression times that are 43% to 99% faster than DSRC and compression throughputs of up to 8.4GB/s on a moderate size cluster. For many of the datasets used in our experiments super-linear speedups have been registered making the implementation strongly scalable. We also show that paraDSRC is more than 25.6x faster than comparable parallel compression algorithms.

关键词： Next-Generation Sequencing parallel implementation DSRC MPI big data FASTQ

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Efficient parallel programming with algorithmic skeletons 2nd

引用

2nd international European conference on parallel processing, Euro-Par 1996

作者： Botorog, George Horatiu Kuchen, Herbert Aachen University of Technology Lehrstuhl für Informatik II Ahornstr. 55 AachenD-52074 Germany

ISBN: (纸本)9783540616269

Algorithmic skeletons are polymorphic higher-order functions representing common parallelization patterns and implemented in parallel. They can be used as the building blocks of parallel and distributed applications by integrating them into a sequential language. In this paper, we present a new approach to programming with skeletons. We integrate the skeletons into an imperative host language enhanced with higher-order functions and currying, as well as with a polymorphic type system. We thus obtain a high-level programming language which can be implemented very efficiently. After describing a series of skeletons which work with distributed arrays, we give two examples of parallel algorithms implemented in our language, namely matrix multiplication and a statistical numerical algorithm for solving partial differential equations. Rml-time measurements show that we approach the efficiency of message-passing C up to a factor between 1 and 1.75. © Springer-Verlag Berlin Heidelberg 1996.

关键词： Message passing

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parallel algorithm for approximate string matching with K differences

Parallel algorithm for approximate string matching with K di...

引用

2013 IEEE 8th international conference on Networking, Architecture and Storage, NAS 2013

作者： Guo, Longjiang Du, Shufang Ren, Meirui Liu, Yu Li, Jinbao He, Jing Tian, Ning Li, Keqin Heilongjiang University School of Computer Science and Technology Harbin 150080 China Key Laboratory of Database and Parallel Computing Heilongjiang China Kennesaw State University Department of Computer Science Kennesaw GA 30144 United States State University of New York Department of Computer Science New Paltz NY 12561 United States

ISBN: (纸本)9780769550343

Approximate string matching using the k-difference technique has been widely applied to many fields such as pattern recognition and computational biology. Data dependency exists in the traditional sequential algorithm. Therefore, it is hard to design a parallel algorithm for approximate string matching with k differences. This paper presents a technique to eliminate data dependency. Based on this technique, this paper also presents a parallel algorithm which can calculate the elements in the same row of the edit distance matrix in parallel by eliminating data dependency. The algorithm has high parallelism, but requires synchronization. To validate the proposed algorithm, it is implemented on GPU and multiple-core CPUs. Moreover, the CUDA optimization techniques are also presented in the paper. Finally, experimental results show that, compared with the traditional sequential algorithm on CPU with twenty-four cores, the proposed parallel algorithm achieves speedup of 7-42 on GPU. © 2013 IEEE.

关键词： Graphics processing unit

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MOSFET Circuit Simulation by using Nonlinear Relaxation and GPU 6

MOSFET Circuit Simulation by using Nonlinear Relaxation and ...

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6th international conference on Computing, Communication and Networking Technologies (ICCCNT)

作者： Chen, Chun-Jung Hsiao, Bo-Yi Chinese Culture Univ Dept Comp Sci Taipei Taiwan

ISBN: (纸本)9781479979837

Circuit simulation is very important and time-consuming. parallel computing does well accelerate the calculating speeds of many applications. GPU cards have thousands of threads, so it's a good strategy to use GPU cards to perform circuit simulation. This paper use appropriate numerical methods, including techniques used by SPICE and Nonlinear Relaxation (relaxation-based method for solving nonlinear equations), to perform the circuit simulation. We assign the heaviest calculation portion of the simulation program to the GPU card, i.e. the nonlinear equation (derived by Newton Raphson iteration) solving portion. The complete circuit simulation program based on proposed methods has been coded and tested by solving some MOSFET circuits. The resulted speedup justifies the success of this research.

关键词： circuit simulation graphic processing card parallel computing Relaxation-based algorithm

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